MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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mxc_pins.h
1
6/******************************************************************************
7 *
8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
9 * Analog Devices, Inc.),
10 * Copyright (C) 2023-2024 Analog Devices, Inc.
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *
24 ******************************************************************************/
25
26#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_MXC_PINS_H_
27#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_MXC_PINS_H_
28
29#include "gpio.h"
30
31/***** Global Variables *****/
32// Predefined GPIO Configurations
33extern const mxc_gpio_cfg_t gpio_cfg_hfextclk;
34#define gpio_cfg_extclk gpio_cfg_hfextclk
35/* ^ Defined for backwards compatability after renaming
36 gpio_cfg_extclk -> gpio_cfg_hfextclk
37*/
38extern const mxc_gpio_cfg_t gpio_cfg_i2c0;
39extern const mxc_gpio_cfg_t gpio_cfg_i2c1;
40extern const mxc_gpio_cfg_t gpio_cfg_i2c2;
41
42extern const mxc_gpio_cfg_t gpio_cfg_uart0;
43extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow;
44extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow_disable;
45extern const mxc_gpio_cfg_t gpio_cfg_uart1;
46extern const mxc_gpio_cfg_t gpio_cfg_uart1_flow;
47extern const mxc_gpio_cfg_t gpio_cfg_uart2;
48extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow;
49extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow_disable;
50extern const mxc_gpio_cfg_t gpio_cfg_uart3;
51extern const mxc_gpio_cfg_t gpio_cfg_uart3_flow;
52extern const mxc_gpio_cfg_t gpio_cfg_uart3_flow_disable;
53
54// NOTE: SPI1 definied here with SS1 only.
55extern const mxc_gpio_cfg_t gpio_cfg_spi1;
56// NOTE: SPI2 defined here with SS0 only.
57extern const mxc_gpio_cfg_t gpio_cfg_spi2;
58
59// Timers are only defined once, depending on package, each timer could be mapped to other pins
60extern const mxc_gpio_cfg_t gpio_cfg_tmr0;
61extern const mxc_gpio_cfg_t gpio_cfg_tmr1;
62extern const mxc_gpio_cfg_t gpio_cfg_tmr2;
63extern const mxc_gpio_cfg_t gpio_cfg_tmr3;
64extern const mxc_gpio_cfg_t gpio_cfg_tmr4;
65extern const mxc_gpio_cfg_t gpio_cfg_tmr5;
66
67extern const mxc_gpio_cfg_t gpio_cfg_i2s0;
68
69//extern const mxc_gpio_cfg_t gpio_cfg_rtcsqw;
70//extern const mxc_gpio_cfg_t gpio_cfg_rtcsqwb;
71
72extern const mxc_gpio_cfg_t gpio_cfg_lc1;
73extern const mxc_gpio_cfg_t gpio_cfg_mon_lc1;
74extern const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc1;
75extern const mxc_gpio_cfg_t gpio_cfg_chrg_lc1;
76extern const mxc_gpio_cfg_t gpio_cfg_lc2;
77extern const mxc_gpio_cfg_t gpio_cfg_mon_lc2;
78extern const mxc_gpio_cfg_t gpio_cfg_cmd_rs_lc2;
79extern const mxc_gpio_cfg_t gpio_cfg_chrg_lc2;
80
81// SPI v2 Pin Definitions
82extern const mxc_gpio_cfg_t gpio_cfg_spi1_standard;
83extern const mxc_gpio_cfg_t gpio_cfg_spi1_3wire;
84// MXC_SPI1 does not support Dual or Quad modes.
85extern const mxc_gpio_cfg_t gpio_cfg_spi2_standard;
86extern const mxc_gpio_cfg_t gpio_cfg_spi2_3wire;
87// MXC_SPI2 does not support Dual or Quad modes.
88
89// SPI v2 Target Selects Pin Definitions
90extern const mxc_gpio_cfg_t gpio_cfg_spi1_ts0;
91extern const mxc_gpio_cfg_t gpio_cfg_spi2_ts0;
92
93#endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_MXC_PINS_H_
mxc_gpio_cfg_t
Structure type for configuring a GPIO port.
Definition: gpio.h:165