MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Modules
tmr.h
1
6/******************************************************************************
7 *
8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
9 * Analog Devices, Inc.),
10 * Copyright (C) 2023-2024 Analog Devices, Inc.
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *
24 ******************************************************************************/
25
26/* Define to prevent redundant inclusion */
27#ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_TMR_H_
28#define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_TMR_H_
29
30/* **** Includes **** */
31#include <stdint.h>
32#include <stdbool.h>
33#include "mxc_device.h"
34#include "tmr_regs.h"
35#include "mxc_sys.h"
36#include "gcr_regs.h"
37#include "mcr_regs.h"
38
39#ifdef __cplusplus
40extern "C" {
41#endif
42
52typedef enum {
66
67 // Legacy names
68 TMR_PRES_1 = MXC_TMR_PRES_1,
69 TMR_PRES_2 = MXC_TMR_PRES_2,
70 TMR_PRES_4 = MXC_TMR_PRES_4,
71 TMR_PRES_8 = MXC_TMR_PRES_8,
72 TMR_PRES_16 = MXC_TMR_PRES_16,
73 TMR_PRES_32 = MXC_TMR_PRES_32,
74 TMR_PRES_64 = MXC_TMR_PRES_64,
75 TMR_PRES_128 = MXC_TMR_PRES_128,
76 TMR_PRES_256 = MXC_TMR_PRES_256,
77 TMR_PRES_512 = MXC_TMR_PRES_512,
78 TMR_PRES_1024 = MXC_TMR_PRES_1024,
79 TMR_PRES_2048 = MXC_TMR_PRES_2048,
80 TMR_PRES_4096 = MXC_TMR_PRES_4096
82
86typedef enum {
96
97 // Legacy names
98 TMR_MODE_ONESHOT = MXC_TMR_MODE_ONESHOT,
99 TMR_MODE_CONTINUOUS = MXC_TMR_MODE_CONTINUOUS,
100 TMR_MODE_COUNTER = MXC_TMR_MODE_COUNTER,
101 TMR_MODE_PWM = MXC_TMR_MODE_PWM,
102 TMR_MODE_CAPTURE = MXC_TMR_MODE_CAPTURE,
103 TMR_MODE_COMPARE = MXC_TMR_MODE_COMPARE,
104 TMR_MODE_GATED = MXC_TMR_MODE_GATED,
105 TMR_MODE_CAPTURE_COMPARE = MXC_TMR_MODE_CAPTURE_COMPARE,
106 TMR_MODE_DUAL_EDGE = MXC_TMR_MODE_DUAL_EDGE
108
113typedef enum {
117
118 // Legacy names
119 TMR_BIT_MODE_32 = MXC_TMR_BIT_MODE_32,
120 TMR_BIT_MODE_16A = MXC_TMR_BIT_MODE_16A,
121 TMR_BIT_MODE_16B = MXC_TMR_BIT_MODE_16B,
123
127typedef enum {
132
133 // Legacy names
134 TMR_UNIT_NANOSEC = MXC_TMR_UNIT_NANOSEC,
135 TMR_UNIT_MICROSEC = MXC_TMR_UNIT_MICROSEC,
136 TMR_UNIT_MILLISEC = MXC_TMR_UNIT_MILLISEC,
137 TMR_UNIT_SEC = MXC_TMR_UNIT_SEC,
139
145typedef enum {
151
152 // Legacy names
158
162typedef struct {
167 uint32_t cmp_cnt;
168 unsigned pol;
170
171/* **** Definitions **** */
172typedef void (*mxc_tmr_complete_t)(int error);
173
174/* **** Function Prototypes **** */
175
190int MXC_TMR_Init(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg, bool init_pins);
191
197
203
209
217int MXC_TMR_SetPWM(mxc_tmr_regs_t *tmr, uint32_t pwm);
218
225
232
239
248uint32_t MXC_TMR_GetPeriod(mxc_tmr_regs_t *tmr, mxc_tmr_clock_t clock, uint32_t prescalar,
249 uint32_t frequency);
250
256
263
270
277
285
293
300void MXC_TMR_SetCompare(mxc_tmr_regs_t *tmr, uint32_t cmp_cnt);
301
307void MXC_TMR_SetCount(mxc_tmr_regs_t *tmr, uint32_t cnt);
308
315void MXC_TMR_Delay(mxc_tmr_regs_t *tmr, uint32_t us);
316
324void MXC_TMR_TO_Start(mxc_tmr_regs_t *tmr, uint32_t us);
325
334
341
348
357
366
373
382
393int MXC_TMR_GetTime(mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, mxc_tmr_unit_t *units);
394
397#ifdef __cplusplus
398}
399#endif
400
401#endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32675_TMR_H_
Registers, Bit Masks and Bit Positions for the GCR Peripheral Module.
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_128
Definition: tmr_regs.h:209
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_8
Definition: tmr_regs.h:201
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_1024
Definition: tmr_regs.h:215
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_1
Definition: tmr_regs.h:195
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_64
Definition: tmr_regs.h:207
#define MXC_V_TMR_CTRL0_MODE_A_GATED
Definition: tmr_regs.h:183
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_256
Definition: tmr_regs.h:211
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_2048
Definition: tmr_regs.h:217
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_4
Definition: tmr_regs.h:199
#define MXC_V_TMR_CTRL0_MODE_A_DUAL_EDGE
Definition: tmr_regs.h:187
#define MXC_V_TMR_CTRL0_MODE_A_CAPCOMP
Definition: tmr_regs.h:185
#define MXC_V_TMR_CTRL0_MODE_A_COMPARE
Definition: tmr_regs.h:181
#define MXC_V_TMR_CTRL0_MODE_A_CONTINUOUS
Definition: tmr_regs.h:173
#define MXC_V_TMR_CTRL0_MODE_A_CAPTURE
Definition: tmr_regs.h:179
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_16
Definition: tmr_regs.h:203
#define MXC_V_TMR_CTRL0_MODE_A_ONE_SHOT
Definition: tmr_regs.h:171
#define MXC_V_TMR_CTRL0_MODE_A_PWM
Definition: tmr_regs.h:177
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_4096
Definition: tmr_regs.h:219
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_512
Definition: tmr_regs.h:213
#define MXC_V_TMR_CTRL0_MODE_A_COUNTER
Definition: tmr_regs.h:175
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_32
Definition: tmr_regs.h:205
#define MXC_S_TMR_CTRL0_CLKDIV_A_DIV_BY_2
Definition: tmr_regs.h:197
Definition: tmr_regs.h:76
mxc_tmr_clock_t clock
Desired clock source.
Definition: tmr.h:166
unsigned pol
Polarity (0 or 1)
Definition: tmr.h:168
mxc_tmr_pres_t pres
Desired timer prescaler.
Definition: tmr.h:163
mxc_tmr_bit_mode_t bitMode
Desired timer bits.
Definition: tmr.h:165
uint32_t cmp_cnt
Compare register value in timer ticks.
Definition: tmr.h:167
mxc_tmr_mode_t mode
Desired timer mode.
Definition: tmr.h:164
void MXC_TMR_EnableInt(mxc_tmr_regs_t *tmr)
enable interupt
void MXC_TMR_EnableWakeup(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg)
Enable wakeup from sleep.
uint32_t MXC_TMR_GetCount(mxc_tmr_regs_t *tmr)
Get the timer count.
void MXC_TMR_ClearFlags(mxc_tmr_regs_t *tmr)
Clear the timer interrupt.
int MXC_TMR_GetTime(mxc_tmr_regs_t *tmr, uint32_t ticks, uint32_t *time, mxc_tmr_unit_t *units)
Get time from timer.
void MXC_TMR_Shutdown(mxc_tmr_regs_t *tmr)
Shutdown timer module clock.
uint32_t MXC_TMR_GetCompare(mxc_tmr_regs_t *tmr)
Get the timer compare count.
int MXC_TMR_SetPWM(mxc_tmr_regs_t *tmr, uint32_t pwm)
Set the value of the first transition in PWM mode.
unsigned int MXC_TMR_SW_Stop(mxc_tmr_regs_t *tmr)
Stopwatch stop.
unsigned int MXC_TMR_TO_Remaining(mxc_tmr_regs_t *tmr)
Amount of time remaining until timeour.
mxc_tmr_clock_t
Clock settings.
Definition: tmr.h:145
int MXC_TMR_Init(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg, bool init_pins)
Initialize timer module clock.
uint32_t MXC_TMR_GetCapture(mxc_tmr_regs_t *tmr)
Get the timer capture count.
void MXC_TMR_Stop(mxc_tmr_regs_t *tmr)
Stop the timer.
void MXC_TMR_TO_Stop(mxc_tmr_regs_t *tmr)
Stop the Timeout timer.
void MXC_TMR_SetCount(mxc_tmr_regs_t *tmr, uint32_t cnt)
Set the timer count.
int MXC_TMR_TO_Check(mxc_tmr_regs_t *tmr)
Check on time out timer.
void MXC_TMR_Start(mxc_tmr_regs_t *tmr)
Start the timer counting.
mxc_tmr_unit_t
Timer units of time enumeration.
Definition: tmr.h:127
mxc_tmr_bit_mode_t
Timer bit mode.
Definition: tmr.h:113
void MXC_TMR_SetCompare(mxc_tmr_regs_t *tmr, uint32_t cmp_cnt)
Set the timer compare count.
mxc_tmr_mode_t
Timer modes.
Definition: tmr.h:86
mxc_tmr_pres_t
Timer prescaler values.
Definition: tmr.h:52
void MXC_TMR_SW_Start(mxc_tmr_regs_t *tmr)
Start stopwatch.
uint32_t MXC_TMR_GetPeriod(mxc_tmr_regs_t *tmr, mxc_tmr_clock_t clock, uint32_t prescalar, uint32_t frequency)
Calculate count for required frequency.
uint32_t MXC_TMR_GetFlags(mxc_tmr_regs_t *tmr)
Get the timer interrupt status.
void MXC_TMR_TO_Start(mxc_tmr_regs_t *tmr, uint32_t us)
Start a timer that will time out after a certain number of microseconds.
void MXC_TMR_TO_Clear(mxc_tmr_regs_t *tmr)
Clear timeout timer back to zero.
void MXC_TMR_DisableWakeup(mxc_tmr_regs_t *tmr, mxc_tmr_cfg_t *cfg)
Disable wakeup from sleep.
void MXC_TMR_Delay(mxc_tmr_regs_t *tmr, uint32_t us)
Dealay for a set periord of time measured in microseconds.
void MXC_TMR_DisableInt(mxc_tmr_regs_t *tmr)
disable interupt
unsigned int MXC_TMR_TO_Elapsed(mxc_tmr_regs_t *tmr)
Get elapsed time of timeout timer.
@ MXC_TMR_APB_CLK
PCLK CLock.
Definition: tmr.h:146
@ MXC_TMR_80K_CLK
80KHz Clock
Definition: tmr.h:156
@ MXC_TMR_32K_CLK
32KHz Clock (NOT SUPPORTED as TMR clock source)
Definition: tmr.h:155
@ MXC_TMR_EXT_CLK
External Clock.
Definition: tmr.h:147
@ MXC_TMR_8M_CLK
8MHz Clock
Definition: tmr.h:153
@ MXC_TMR_32M_CLK
32MHz Clock
Definition: tmr.h:154
@ MXC_TMR_ERFO_CLK
32MHz Clock
Definition: tmr.h:149
@ MXC_TMR_IBRO_CLK
7.3728MHz Clock
Definition: tmr.h:148
@ MXC_TMR_INRO_CLK
80Khz Clock
Definition: tmr.h:150
@ MXC_TMR_UNIT_SEC
Second Unit Indicator.
Definition: tmr.h:131
@ MXC_TMR_UNIT_MILLISEC
Millisecond Unit Indicator.
Definition: tmr.h:130
@ MXC_TMR_UNIT_MICROSEC
Microsecond Unit Indicator.
Definition: tmr.h:129
@ MXC_TMR_UNIT_NANOSEC
Nanosecond Unit Indicator.
Definition: tmr.h:128
@ MXC_TMR_BIT_MODE_16A
Timer Mode Lower 16 bit.
Definition: tmr.h:115
@ MXC_TMR_BIT_MODE_16B
Timer Mode Upper 16 bit.
Definition: tmr.h:116
@ MXC_TMR_BIT_MODE_32
Timer Mode 32 bit.
Definition: tmr.h:114
@ MXC_TMR_MODE_PWM
Timer Mode PWM.
Definition: tmr.h:90
@ MXC_TMR_MODE_CAPTURE_COMPARE
Timer Mode CAPTURECOMPARE.
Definition: tmr.h:94
@ MXC_TMR_MODE_ONESHOT
Timer Mode ONESHOT.
Definition: tmr.h:87
@ MXC_TMR_MODE_CAPTURE
Timer Mode CAPTURE.
Definition: tmr.h:91
@ MXC_TMR_MODE_CONTINUOUS
Timer Mode CONTINUOUS.
Definition: tmr.h:88
@ MXC_TMR_MODE_COMPARE
Timer Mode COMPARE.
Definition: tmr.h:92
@ MXC_TMR_MODE_GATED
Timer Mode GATED.
Definition: tmr.h:93
@ MXC_TMR_MODE_DUAL_EDGE
Timer Mode DUALEDGE.
Definition: tmr.h:95
@ MXC_TMR_MODE_COUNTER
Timer Mode COUNTER.
Definition: tmr.h:89
@ MXC_TMR_PRES_4
Divide input clock by 4.
Definition: tmr.h:55
@ MXC_TMR_PRES_2
Divide input clock by 2.
Definition: tmr.h:54
@ MXC_TMR_PRES_64
Divide input clock by 64.
Definition: tmr.h:59
@ MXC_TMR_PRES_8
Divide input clock by 8.
Definition: tmr.h:56
@ MXC_TMR_PRES_1024
Divide input clock by 1024.
Definition: tmr.h:63
@ MXC_TMR_PRES_128
Divide input clock by 128.
Definition: tmr.h:60
@ MXC_TMR_PRES_32
Divide input clock by 32.
Definition: tmr.h:58
@ MXC_TMR_PRES_256
Divide input clock by 256.
Definition: tmr.h:61
@ MXC_TMR_PRES_1
Divide input clock by 1.
Definition: tmr.h:53
@ MXC_TMR_PRES_4096
Divide input clock by 4096.
Definition: tmr.h:65
@ MXC_TMR_PRES_2048
Divide input clock by 2048.
Definition: tmr.h:64
@ MXC_TMR_PRES_512
Divide input clock by 512.
Definition: tmr.h:62
@ MXC_TMR_PRES_16
Divide input clock by 16.
Definition: tmr.h:57
Timer Configuration.
Definition: tmr.h:162
Registers, Bit Masks and Bit Positions for the MCR Peripheral Module.
Registers, Bit Masks and Bit Positions for the TMR Peripheral Module.