sema_regs.h

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/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78002_INCLUDE_SEMA_REGS_H_
#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78002_INCLUDE_SEMA_REGS_H_
 
/* **** Includes **** */
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined (__ICCARM__)
  #pragma system_include
#endif
 
#if defined (__CC_ARM)
  #pragma anon_unions
#endif
/*
    If types are not defined elsewhere (CMSIS) define them here
*/
#ifndef __IO
#define __IO volatile
#endif
#ifndef __I
#define __I  volatile const
#endif
#ifndef __O
#define __O  volatile
#endif
#ifndef __R
#define __R  volatile const
#endif
 
/* **** Definitions **** */
 
typedef struct {
    __IO uint32_t semaphores[8];        
    __R  uint32_t rsv_0x20_0x3f[8];
    __IO uint32_t irq0;                 
    __IO uint32_t mail0;                
    __IO uint32_t irq1;                 
    __IO uint32_t mail1;                
    __R  uint32_t rsv_0x50_0xff[44];
    __IO uint32_t status;               
} mxc_sema_regs_t;
 
/* Register offsets for module SEMA */
#define MXC_R_SEMA_SEMAPHORES              ((uint32_t)0x00000000UL) 
#define MXC_R_SEMA_IRQ0                    ((uint32_t)0x00000040UL) 
#define MXC_R_SEMA_MAIL0                   ((uint32_t)0x00000044UL) 
#define MXC_R_SEMA_IRQ1                    ((uint32_t)0x00000048UL) 
#define MXC_R_SEMA_MAIL1                   ((uint32_t)0x0000004CUL) 
#define MXC_R_SEMA_STATUS                  ((uint32_t)0x00000100UL) 
#define MXC_F_SEMA_SEMAPHORES_SEMA_POS                 0 
#define MXC_F_SEMA_SEMAPHORES_SEMA                     ((uint32_t)(0x1UL << MXC_F_SEMA_SEMAPHORES_SEMA_POS)) 
#define MXC_F_SEMA_IRQ0_EN_POS                         0 
#define MXC_F_SEMA_IRQ0_EN                             ((uint32_t)(0x1UL << MXC_F_SEMA_IRQ0_EN_POS)) 
#define MXC_F_SEMA_IRQ0_CM4_IRQ_POS                    16 
#define MXC_F_SEMA_IRQ0_CM4_IRQ                        ((uint32_t)(0x1UL << MXC_F_SEMA_IRQ0_CM4_IRQ_POS)) 
#define MXC_F_SEMA_MAIL0_DATA_POS                      0 
#define MXC_F_SEMA_MAIL0_DATA                          ((uint32_t)(0xFFFFFFFFUL << MXC_F_SEMA_MAIL0_DATA_POS)) 
#define MXC_F_SEMA_IRQ1_EN_POS                         0 
#define MXC_F_SEMA_IRQ1_EN                             ((uint32_t)(0x1UL << MXC_F_SEMA_IRQ1_EN_POS)) 
#define MXC_F_SEMA_IRQ1_RV32_IRQ_POS                   16 
#define MXC_F_SEMA_IRQ1_RV32_IRQ                       ((uint32_t)(0x1UL << MXC_F_SEMA_IRQ1_RV32_IRQ_POS)) 
#define MXC_F_SEMA_MAIL1_DATA_POS                      0 
#define MXC_F_SEMA_MAIL1_DATA                          ((uint32_t)(0xFFFFFFFFUL << MXC_F_SEMA_MAIL1_DATA_POS)) 
#define MXC_F_SEMA_STATUS_STATUS0_POS                  0 
#define MXC_F_SEMA_STATUS_STATUS0                      ((uint32_t)(0x1UL << MXC_F_SEMA_STATUS_STATUS0_POS)) 
#define MXC_F_SEMA_STATUS_STATUS1_POS                  1 
#define MXC_F_SEMA_STATUS_STATUS1                      ((uint32_t)(0x1UL << MXC_F_SEMA_STATUS_STATUS1_POS)) 
#define MXC_F_SEMA_STATUS_STATUS2_POS                  2 
#define MXC_F_SEMA_STATUS_STATUS2                      ((uint32_t)(0x1UL << MXC_F_SEMA_STATUS_STATUS2_POS)) 
#define MXC_F_SEMA_STATUS_STATUS3_POS                  3 
#define MXC_F_SEMA_STATUS_STATUS3                      ((uint32_t)(0x1UL << MXC_F_SEMA_STATUS_STATUS3_POS)) 
#define MXC_F_SEMA_STATUS_STATUS4_POS                  4 
#define MXC_F_SEMA_STATUS_STATUS4                      ((uint32_t)(0x1UL << MXC_F_SEMA_STATUS_STATUS4_POS)) 
#define MXC_F_SEMA_STATUS_STATUS5_POS                  5 
#define MXC_F_SEMA_STATUS_STATUS5                      ((uint32_t)(0x1UL << MXC_F_SEMA_STATUS_STATUS5_POS)) 
#define MXC_F_SEMA_STATUS_STATUS6_POS                  6 
#define MXC_F_SEMA_STATUS_STATUS6                      ((uint32_t)(0x1UL << MXC_F_SEMA_STATUS_STATUS6_POS)) 
#define MXC_F_SEMA_STATUS_STATUS7_POS                  7 
#define MXC_F_SEMA_STATUS_STATUS7                      ((uint32_t)(0x1UL << MXC_F_SEMA_STATUS_STATUS7_POS)) 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78002_INCLUDE_SEMA_REGS_H_