spi_regs.h

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/******************************************************************************
 *
 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
 * Analog Devices, Inc.),
 * Copyright (C) 2023-2024 Analog Devices, Inc.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 ******************************************************************************/
 
#ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78002_INCLUDE_SPI_REGS_H_
#define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78002_INCLUDE_SPI_REGS_H_
 
/* **** Includes **** */
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined (__ICCARM__)
  #pragma system_include
#endif
 
#if defined (__CC_ARM)
  #pragma anon_unions
#endif
/*
    If types are not defined elsewhere (CMSIS) define them here
*/
#ifndef __IO
#define __IO volatile
#endif
#ifndef __I
#define __I  volatile const
#endif
#ifndef __O
#define __O  volatile
#endif
#ifndef __R
#define __R  volatile const
#endif
 
/* **** Definitions **** */
 
typedef struct {
    union {
        __IO uint32_t fifo32;           
        __IO uint16_t fifo16[2];        
        __IO uint8_t  fifo8[4];         
    };
    __IO uint32_t ctrl0;                
    __IO uint32_t ctrl1;                
    __IO uint32_t ctrl2;                
    __IO uint32_t sstime;               
    __IO uint32_t clkctrl;              
    __R  uint32_t rsv_0x18;
    __IO uint32_t dma;                  
    __IO uint32_t intfl;                
    __IO uint32_t inten;                
    __IO uint32_t wkfl;                 
    __IO uint32_t wken;                 
    __I  uint32_t stat;                 
} mxc_spi_regs_t;
 
/* Register offsets for module SPI */
#define MXC_R_SPI_FIFO32                   ((uint32_t)0x00000000UL) 
#define MXC_R_SPI_FIFO16                   ((uint32_t)0x00000000UL) 
#define MXC_R_SPI_FIFO8                    ((uint32_t)0x00000000UL) 
#define MXC_R_SPI_CTRL0                    ((uint32_t)0x00000004UL) 
#define MXC_R_SPI_CTRL1                    ((uint32_t)0x00000008UL) 
#define MXC_R_SPI_CTRL2                    ((uint32_t)0x0000000CUL) 
#define MXC_R_SPI_SSTIME                   ((uint32_t)0x00000010UL) 
#define MXC_R_SPI_CLKCTRL                  ((uint32_t)0x00000014UL) 
#define MXC_R_SPI_DMA                      ((uint32_t)0x0000001CUL) 
#define MXC_R_SPI_INTFL                    ((uint32_t)0x00000020UL) 
#define MXC_R_SPI_INTEN                    ((uint32_t)0x00000024UL) 
#define MXC_R_SPI_WKFL                     ((uint32_t)0x00000028UL) 
#define MXC_R_SPI_WKEN                     ((uint32_t)0x0000002CUL) 
#define MXC_R_SPI_STAT                     ((uint32_t)0x00000030UL) 
#define MXC_F_SPI_FIFO32_DATA_POS                      0 
#define MXC_F_SPI_FIFO32_DATA                          ((uint32_t)(0xFFFFFFFFUL << MXC_F_SPI_FIFO32_DATA_POS)) 
#define MXC_F_SPI_FIFO16_DATA_POS                      0 
#define MXC_F_SPI_FIFO16_DATA                          ((uint16_t)(0xFFFFUL << MXC_F_SPI_FIFO16_DATA_POS)) 
#define MXC_F_SPI_FIFO8_DATA_POS                       0 
#define MXC_F_SPI_FIFO8_DATA                           ((uint8_t)(0xFFUL << MXC_F_SPI_FIFO8_DATA_POS)) 
#define MXC_F_SPI_CTRL0_EN_POS                         0 
#define MXC_F_SPI_CTRL0_EN                             ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_EN_POS)) 
#define MXC_F_SPI_CTRL0_MST_MODE_POS                   1 
#define MXC_F_SPI_CTRL0_MST_MODE                       ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_MST_MODE_POS)) 
#define MXC_F_SPI_CTRL0_SS_IO_POS                      4 
#define MXC_F_SPI_CTRL0_SS_IO                          ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_SS_IO_POS)) 
#define MXC_F_SPI_CTRL0_START_POS                      5 
#define MXC_F_SPI_CTRL0_START                          ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_START_POS)) 
#define MXC_F_SPI_CTRL0_SS_CTRL_POS                    8 
#define MXC_F_SPI_CTRL0_SS_CTRL                        ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_SS_CTRL_POS)) 
#define MXC_F_SPI_CTRL0_SS_ACTIVE_POS                  16 
#define MXC_F_SPI_CTRL0_SS_ACTIVE                      ((uint32_t)(0xFUL << MXC_F_SPI_CTRL0_SS_ACTIVE_POS)) 
#define MXC_V_SPI_CTRL0_SS_ACTIVE_SS0                  ((uint32_t)0x1UL) 
#define MXC_S_SPI_CTRL0_SS_ACTIVE_SS0                  (MXC_V_SPI_CTRL0_SS_ACTIVE_SS0 << MXC_F_SPI_CTRL0_SS_ACTIVE_POS) 
#define MXC_V_SPI_CTRL0_SS_ACTIVE_SS1                  ((uint32_t)0x2UL) 
#define MXC_S_SPI_CTRL0_SS_ACTIVE_SS1                  (MXC_V_SPI_CTRL0_SS_ACTIVE_SS1 << MXC_F_SPI_CTRL0_SS_ACTIVE_POS) 
#define MXC_V_SPI_CTRL0_SS_ACTIVE_SS2                  ((uint32_t)0x4UL) 
#define MXC_S_SPI_CTRL0_SS_ACTIVE_SS2                  (MXC_V_SPI_CTRL0_SS_ACTIVE_SS2 << MXC_F_SPI_CTRL0_SS_ACTIVE_POS) 
#define MXC_V_SPI_CTRL0_SS_ACTIVE_SS3                  ((uint32_t)0x8UL) 
#define MXC_S_SPI_CTRL0_SS_ACTIVE_SS3                  (MXC_V_SPI_CTRL0_SS_ACTIVE_SS3 << MXC_F_SPI_CTRL0_SS_ACTIVE_POS) 
#define MXC_F_SPI_CTRL1_TX_NUM_CHAR_POS                0 
#define MXC_F_SPI_CTRL1_TX_NUM_CHAR                    ((uint32_t)(0xFFFFUL << MXC_F_SPI_CTRL1_TX_NUM_CHAR_POS)) 
#define MXC_F_SPI_CTRL1_RX_NUM_CHAR_POS                16 
#define MXC_F_SPI_CTRL1_RX_NUM_CHAR                    ((uint32_t)(0xFFFFUL << MXC_F_SPI_CTRL1_RX_NUM_CHAR_POS)) 
#define MXC_F_SPI_CTRL2_CLKPHA_POS                     0 
#define MXC_F_SPI_CTRL2_CLKPHA                         ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_CLKPHA_POS)) 
#define MXC_F_SPI_CTRL2_CLKPOL_POS                     1 
#define MXC_F_SPI_CTRL2_CLKPOL                         ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_CLKPOL_POS)) 
#define MXC_F_SPI_CTRL2_SCLK_FB_INV_POS                4 
#define MXC_F_SPI_CTRL2_SCLK_FB_INV                    ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_SCLK_FB_INV_POS)) 
#define MXC_F_SPI_CTRL2_NUMBITS_POS                    8 
#define MXC_F_SPI_CTRL2_NUMBITS                        ((uint32_t)(0xFUL << MXC_F_SPI_CTRL2_NUMBITS_POS)) 
#define MXC_V_SPI_CTRL2_NUMBITS_0                      ((uint32_t)0x0UL) 
#define MXC_S_SPI_CTRL2_NUMBITS_0                      (MXC_V_SPI_CTRL2_NUMBITS_0 << MXC_F_SPI_CTRL2_NUMBITS_POS) 
#define MXC_F_SPI_CTRL2_DATA_WIDTH_POS                 12 
#define MXC_F_SPI_CTRL2_DATA_WIDTH                     ((uint32_t)(0x3UL << MXC_F_SPI_CTRL2_DATA_WIDTH_POS)) 
#define MXC_V_SPI_CTRL2_DATA_WIDTH_MONO                ((uint32_t)0x0UL) 
#define MXC_S_SPI_CTRL2_DATA_WIDTH_MONO                (MXC_V_SPI_CTRL2_DATA_WIDTH_MONO << MXC_F_SPI_CTRL2_DATA_WIDTH_POS) 
#define MXC_V_SPI_CTRL2_DATA_WIDTH_DUAL                ((uint32_t)0x1UL) 
#define MXC_S_SPI_CTRL2_DATA_WIDTH_DUAL                (MXC_V_SPI_CTRL2_DATA_WIDTH_DUAL << MXC_F_SPI_CTRL2_DATA_WIDTH_POS) 
#define MXC_V_SPI_CTRL2_DATA_WIDTH_QUAD                ((uint32_t)0x2UL) 
#define MXC_S_SPI_CTRL2_DATA_WIDTH_QUAD                (MXC_V_SPI_CTRL2_DATA_WIDTH_QUAD << MXC_F_SPI_CTRL2_DATA_WIDTH_POS) 
#define MXC_F_SPI_CTRL2_THREE_WIRE_POS                 15 
#define MXC_F_SPI_CTRL2_THREE_WIRE                     ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_THREE_WIRE_POS)) 
#define MXC_F_SPI_CTRL2_SS_POL_POS                     16 
#define MXC_F_SPI_CTRL2_SS_POL                         ((uint32_t)(0xFFUL << MXC_F_SPI_CTRL2_SS_POL_POS)) 
#define MXC_V_SPI_CTRL2_SS_POL_SS0_HIGH                ((uint32_t)0x1UL) 
#define MXC_S_SPI_CTRL2_SS_POL_SS0_HIGH                (MXC_V_SPI_CTRL2_SS_POL_SS0_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS) 
#define MXC_V_SPI_CTRL2_SS_POL_SS1_HIGH                ((uint32_t)0x2UL) 
#define MXC_S_SPI_CTRL2_SS_POL_SS1_HIGH                (MXC_V_SPI_CTRL2_SS_POL_SS1_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS) 
#define MXC_V_SPI_CTRL2_SS_POL_SS2_HIGH                ((uint32_t)0x4UL) 
#define MXC_S_SPI_CTRL2_SS_POL_SS2_HIGH                (MXC_V_SPI_CTRL2_SS_POL_SS2_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS) 
#define MXC_V_SPI_CTRL2_SS_POL_SS3_HIGH                ((uint32_t)0x8UL) 
#define MXC_S_SPI_CTRL2_SS_POL_SS3_HIGH                (MXC_V_SPI_CTRL2_SS_POL_SS3_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS) 
#define MXC_F_SPI_SSTIME_PRE_POS                       0 
#define MXC_F_SPI_SSTIME_PRE                           ((uint32_t)(0xFFUL << MXC_F_SPI_SSTIME_PRE_POS)) 
#define MXC_V_SPI_SSTIME_PRE_256                       ((uint32_t)0x0UL) 
#define MXC_S_SPI_SSTIME_PRE_256                       (MXC_V_SPI_SSTIME_PRE_256 << MXC_F_SPI_SSTIME_PRE_POS) 
#define MXC_F_SPI_SSTIME_POST_POS                      8 
#define MXC_F_SPI_SSTIME_POST                          ((uint32_t)(0xFFUL << MXC_F_SPI_SSTIME_POST_POS)) 
#define MXC_V_SPI_SSTIME_POST_256                      ((uint32_t)0x0UL) 
#define MXC_S_SPI_SSTIME_POST_256                      (MXC_V_SPI_SSTIME_POST_256 << MXC_F_SPI_SSTIME_POST_POS) 
#define MXC_F_SPI_SSTIME_INACT_POS                     16 
#define MXC_F_SPI_SSTIME_INACT                         ((uint32_t)(0xFFUL << MXC_F_SPI_SSTIME_INACT_POS)) 
#define MXC_V_SPI_SSTIME_INACT_256                     ((uint32_t)0x0UL) 
#define MXC_S_SPI_SSTIME_INACT_256                     (MXC_V_SPI_SSTIME_INACT_256 << MXC_F_SPI_SSTIME_INACT_POS) 
#define MXC_F_SPI_CLKCTRL_LO_POS                       0 
#define MXC_F_SPI_CLKCTRL_LO                           ((uint32_t)(0xFFUL << MXC_F_SPI_CLKCTRL_LO_POS)) 
#define MXC_V_SPI_CLKCTRL_LO_DIS                       ((uint32_t)0x0UL) 
#define MXC_S_SPI_CLKCTRL_LO_DIS                       (MXC_V_SPI_CLKCTRL_LO_DIS << MXC_F_SPI_CLKCTRL_LO_POS) 
#define MXC_F_SPI_CLKCTRL_HI_POS                       8 
#define MXC_F_SPI_CLKCTRL_HI                           ((uint32_t)(0xFFUL << MXC_F_SPI_CLKCTRL_HI_POS)) 
#define MXC_V_SPI_CLKCTRL_HI_DIS                       ((uint32_t)0x0UL) 
#define MXC_S_SPI_CLKCTRL_HI_DIS                       (MXC_V_SPI_CLKCTRL_HI_DIS << MXC_F_SPI_CLKCTRL_HI_POS) 
#define MXC_F_SPI_CLKCTRL_CLKDIV_POS                   16 
#define MXC_F_SPI_CLKCTRL_CLKDIV                       ((uint32_t)(0xFUL << MXC_F_SPI_CLKCTRL_CLKDIV_POS)) 
#define MXC_F_SPI_CLKCTRL_AFP_FCD_POS                  24 
#define MXC_F_SPI_CLKCTRL_AFP_FCD                      ((uint32_t)(0x7UL << MXC_F_SPI_CLKCTRL_AFP_FCD_POS)) 
#define MXC_F_SPI_DMA_TX_THD_VAL_POS                   0 
#define MXC_F_SPI_DMA_TX_THD_VAL                       ((uint32_t)(0x1FUL << MXC_F_SPI_DMA_TX_THD_VAL_POS)) 
#define MXC_F_SPI_DMA_TX_FIFO_EN_POS                   6 
#define MXC_F_SPI_DMA_TX_FIFO_EN                       ((uint32_t)(0x1UL << MXC_F_SPI_DMA_TX_FIFO_EN_POS)) 
#define MXC_F_SPI_DMA_TX_FLUSH_POS                     7 
#define MXC_F_SPI_DMA_TX_FLUSH                         ((uint32_t)(0x1UL << MXC_F_SPI_DMA_TX_FLUSH_POS)) 
#define MXC_F_SPI_DMA_TX_LVL_POS                       8 
#define MXC_F_SPI_DMA_TX_LVL                           ((uint32_t)(0x3FUL << MXC_F_SPI_DMA_TX_LVL_POS)) 
#define MXC_F_SPI_DMA_DMA_TX_EN_POS                    15 
#define MXC_F_SPI_DMA_DMA_TX_EN                        ((uint32_t)(0x1UL << MXC_F_SPI_DMA_DMA_TX_EN_POS)) 
#define MXC_F_SPI_DMA_RX_THD_VAL_POS                   16 
#define MXC_F_SPI_DMA_RX_THD_VAL                       ((uint32_t)(0x1FUL << MXC_F_SPI_DMA_RX_THD_VAL_POS)) 
#define MXC_F_SPI_DMA_RX_FIFO_EN_POS                   22 
#define MXC_F_SPI_DMA_RX_FIFO_EN                       ((uint32_t)(0x1UL << MXC_F_SPI_DMA_RX_FIFO_EN_POS)) 
#define MXC_F_SPI_DMA_RX_FLUSH_POS                     23 
#define MXC_F_SPI_DMA_RX_FLUSH                         ((uint32_t)(0x1UL << MXC_F_SPI_DMA_RX_FLUSH_POS)) 
#define MXC_F_SPI_DMA_RX_LVL_POS                       24 
#define MXC_F_SPI_DMA_RX_LVL                           ((uint32_t)(0x3FUL << MXC_F_SPI_DMA_RX_LVL_POS)) 
#define MXC_F_SPI_DMA_DMA_RX_EN_POS                    31 
#define MXC_F_SPI_DMA_DMA_RX_EN                        ((uint32_t)(0x1UL << MXC_F_SPI_DMA_DMA_RX_EN_POS)) 
#define MXC_F_SPI_INTFL_TX_THD_POS                     0 
#define MXC_F_SPI_INTFL_TX_THD                         ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_TX_THD_POS)) 
#define MXC_F_SPI_INTFL_TX_EM_POS                      1 
#define MXC_F_SPI_INTFL_TX_EM                          ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_TX_EM_POS)) 
#define MXC_F_SPI_INTFL_RX_THD_POS                     2 
#define MXC_F_SPI_INTFL_RX_THD                         ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_RX_THD_POS)) 
#define MXC_F_SPI_INTFL_RX_FULL_POS                    3 
#define MXC_F_SPI_INTFL_RX_FULL                        ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_RX_FULL_POS)) 
#define MXC_F_SPI_INTFL_SSA_POS                        4 
#define MXC_F_SPI_INTFL_SSA                            ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_SSA_POS)) 
#define MXC_F_SPI_INTFL_SSD_POS                        5 
#define MXC_F_SPI_INTFL_SSD                            ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_SSD_POS)) 
#define MXC_F_SPI_INTFL_FAULT_POS                      8 
#define MXC_F_SPI_INTFL_FAULT                          ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_FAULT_POS)) 
#define MXC_F_SPI_INTFL_ABORT_POS                      9 
#define MXC_F_SPI_INTFL_ABORT                          ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_ABORT_POS)) 
#define MXC_F_SPI_INTFL_MST_DONE_POS                   11 
#define MXC_F_SPI_INTFL_MST_DONE                       ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_MST_DONE_POS)) 
#define MXC_F_SPI_INTFL_TX_OV_POS                      12 
#define MXC_F_SPI_INTFL_TX_OV                          ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_TX_OV_POS)) 
#define MXC_F_SPI_INTFL_TX_UN_POS                      13 
#define MXC_F_SPI_INTFL_TX_UN                          ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_TX_UN_POS)) 
#define MXC_F_SPI_INTFL_RX_OV_POS                      14 
#define MXC_F_SPI_INTFL_RX_OV                          ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_RX_OV_POS)) 
#define MXC_F_SPI_INTFL_RX_UN_POS                      15 
#define MXC_F_SPI_INTFL_RX_UN                          ((uint32_t)(0x1UL << MXC_F_SPI_INTFL_RX_UN_POS)) 
#define MXC_F_SPI_INTEN_TX_THD_POS                     0 
#define MXC_F_SPI_INTEN_TX_THD                         ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_TX_THD_POS)) 
#define MXC_F_SPI_INTEN_TX_EM_POS                      1 
#define MXC_F_SPI_INTEN_TX_EM                          ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_TX_EM_POS)) 
#define MXC_F_SPI_INTEN_RX_THD_POS                     2 
#define MXC_F_SPI_INTEN_RX_THD                         ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_RX_THD_POS)) 
#define MXC_F_SPI_INTEN_RX_FULL_POS                    3 
#define MXC_F_SPI_INTEN_RX_FULL                        ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_RX_FULL_POS)) 
#define MXC_F_SPI_INTEN_SSA_POS                        4 
#define MXC_F_SPI_INTEN_SSA                            ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_SSA_POS)) 
#define MXC_F_SPI_INTEN_SSD_POS                        5 
#define MXC_F_SPI_INTEN_SSD                            ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_SSD_POS)) 
#define MXC_F_SPI_INTEN_FAULT_POS                      8 
#define MXC_F_SPI_INTEN_FAULT                          ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_FAULT_POS)) 
#define MXC_F_SPI_INTEN_ABORT_POS                      9 
#define MXC_F_SPI_INTEN_ABORT                          ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_ABORT_POS)) 
#define MXC_F_SPI_INTEN_MST_DONE_POS                   11 
#define MXC_F_SPI_INTEN_MST_DONE                       ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_MST_DONE_POS)) 
#define MXC_F_SPI_INTEN_TX_OV_POS                      12 
#define MXC_F_SPI_INTEN_TX_OV                          ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_TX_OV_POS)) 
#define MXC_F_SPI_INTEN_TX_UN_POS                      13 
#define MXC_F_SPI_INTEN_TX_UN                          ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_TX_UN_POS)) 
#define MXC_F_SPI_INTEN_RX_OV_POS                      14 
#define MXC_F_SPI_INTEN_RX_OV                          ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_RX_OV_POS)) 
#define MXC_F_SPI_INTEN_RX_UN_POS                      15 
#define MXC_F_SPI_INTEN_RX_UN                          ((uint32_t)(0x1UL << MXC_F_SPI_INTEN_RX_UN_POS)) 
#define MXC_F_SPI_WKFL_TX_THD_POS                      0 
#define MXC_F_SPI_WKFL_TX_THD                          ((uint32_t)(0x1UL << MXC_F_SPI_WKFL_TX_THD_POS)) 
#define MXC_F_SPI_WKFL_TX_EM_POS                       1 
#define MXC_F_SPI_WKFL_TX_EM                           ((uint32_t)(0x1UL << MXC_F_SPI_WKFL_TX_EM_POS)) 
#define MXC_F_SPI_WKFL_RX_THD_POS                      2 
#define MXC_F_SPI_WKFL_RX_THD                          ((uint32_t)(0x1UL << MXC_F_SPI_WKFL_RX_THD_POS)) 
#define MXC_F_SPI_WKFL_RX_FULL_POS                     3 
#define MXC_F_SPI_WKFL_RX_FULL                         ((uint32_t)(0x1UL << MXC_F_SPI_WKFL_RX_FULL_POS)) 
#define MXC_F_SPI_WKEN_TX_THD_POS                      0 
#define MXC_F_SPI_WKEN_TX_THD                          ((uint32_t)(0x1UL << MXC_F_SPI_WKEN_TX_THD_POS)) 
#define MXC_F_SPI_WKEN_TX_EM_POS                       1 
#define MXC_F_SPI_WKEN_TX_EM                           ((uint32_t)(0x1UL << MXC_F_SPI_WKEN_TX_EM_POS)) 
#define MXC_F_SPI_WKEN_RX_THD_POS                      2 
#define MXC_F_SPI_WKEN_RX_THD                          ((uint32_t)(0x1UL << MXC_F_SPI_WKEN_RX_THD_POS)) 
#define MXC_F_SPI_WKEN_RX_FULL_POS                     3 
#define MXC_F_SPI_WKEN_RX_FULL                         ((uint32_t)(0x1UL << MXC_F_SPI_WKEN_RX_FULL_POS)) 
#define MXC_F_SPI_STAT_BUSY_POS                        0 
#define MXC_F_SPI_STAT_BUSY                            ((uint32_t)(0x1UL << MXC_F_SPI_STAT_BUSY_POS)) 
#ifdef __cplusplus
}
#endif
 
#endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78002_INCLUDE_SPI_REGS_H_