no-OS
AD917x.h
Go to the documentation of this file.
1 
17 #ifndef __AD917XAPI_H__
18 #define __AD917XAPI_H__
19 
20 #include "api_def.h"
21 #include "no_os_util.h"
22 
28 typedef enum {
34 
36 typedef enum {
44 
46 typedef enum {
62 
64 typedef struct {
68  uint8_t frame_sync_stat;
74 
76 typedef enum {
82 
84 typedef struct {
85  void *user_data;
89  uint64_t dac_freq_hz;
100 
121 int32_t ad917x_init(ad917x_handle_t *h);
122 
138 int32_t ad917x_deinit(ad917x_handle_t *h);
139 
162 int32_t ad917x_reset(ad917x_handle_t *h, uint8_t hw_reset);
163 
179 
180 
195  const uint16_t address, const uint8_t data);
212  const uint16_t address, uint8_t *data);
224 int32_t ad917x_get_revision(ad917x_handle_t *h, uint8_t *rev_major,
225  uint8_t *rev_minor, uint8_t *rev_rc);
226 
227 
256 int32_t ad917x_set_dac_pll_config(ad917x_handle_t *h, uint8_t dac_pll_en,
257  uint8_t m_div, uint8_t n_div, uint8_t vco_div);
280  uint64_t dac_clk_freq_hz);
281 
303  uint64_t *dac_clk_freq_hz);
322  uint8_t *pll_lock_stat, uint8_t *dll_lock_stat);
323 
334 int32_t ad917x_set_clkout_config(ad917x_handle_t *h, uint8_t l_div);
335 
368  uint64_t dac_clk_freq_hz, uint8_t dac_pll_en, uint64_t ref_clk_freq_hz);
369 
397 int32_t ad917x_jesd_config_datapath(ad917x_handle_t *h, uint8_t dual_en,
398  uint8_t jesd_mode, uint8_t ch_intpl, uint8_t dp_intpl);
399 
418 int32_t ad917x_jesd_get_cfg_status(ad917x_handle_t *h, uint8_t *cfg_valid);
419 
437  jesd_param_t *jesd_param);
438 
454 int32_t ad917x_jesd_set_sysref_enable(ad917x_handle_t *h, uint8_t en);
472 int32_t ad917x_jesd_get_sysref_enable(ad917x_handle_t *h, uint8_t *en);
473 
474 
491  uint8_t delay, uint8_t var);
514  jesd_syncoutb_t syncoutb, uint8_t en);
515 
529 int32_t ad917x_jesd_set_scrambler_enable(ad917x_handle_t *h, uint8_t en);
530 
551  uint8_t logical_lane, uint8_t physical_lane);
552 
570 int32_t ad917x_jesd_get_lane_xbar(ad917x_handle_t *h, uint8_t *phy_log_map);
571 
591  uint8_t logical_lane, uint8_t invert);
611  uint8_t lanes_msk, uint8_t run_cal, uint8_t en);
633 int32_t ad917x_jesd_get_pll_status(ad917x_handle_t *h, uint8_t *pll_status);
634 
655  jesd_link_t link, uint8_t en);
656 
676  jesd_link_t link, ad917x_jesd_link_stat_t *link_status);
677 
699 int32_t ad917x_set_page_idx(ad917x_handle_t *h, const uint32_t dac,
700  const uint32_t channel);
701 
714 int32_t ad917x_get_page_idx(ad917x_handle_t *h, int32_t *dac, int32_t *channel);
715 
729 int32_t ad917x_set_channel_gain(ad917x_handle_t *h, const uint16_t gain);
730 
744 int32_t ad917x_get_channel_gain(ad917x_handle_t *h, uint16_t *gain);
745 
746 
761 int32_t ad917x_set_dc_cal_tone_amp(ad917x_handle_t *h, const uint16_t amp);
762 
790  const ad917x_dac_select_t dacs, uint16_t *dacs_po,
791  const ad917x_channel_select_t channels, uint16_t *ch_po);
792 
819  const ad917x_dac_select_t dacs, const uint16_t dacs_po,
820  const ad917x_channel_select_t channels, const uint16_t ch_po);
821 
841  const ad917x_dds_select_t nco,
842  const uint64_t ftw,
843  const uint64_t acc_modulus,
844  const uint64_t acc_delta);
845 
865  const ad917x_dds_select_t nco,
866  uint64_t *ftw,
867  uint64_t *acc_modulus,
868  uint64_t *acc_delta);
869 
897  const ad917x_dac_select_t dacs,
898  const ad917x_channel_select_t channels,
899  const int64_t carrier_freq_hz,
900  const uint16_t amplitude,
901  int32_t dc_test_tone_en,
902  int32_t ddsm_cal_dc_input_en);
903 
928  const ad917x_dac_select_t dacs,
929  const ad917x_channel_select_t channels);
930 
948  int32_t ddsm_cal_dc_input_en);
949 
967  int32_t *ddsm_cal_dc_input_en);
968 
984 int32_t ad917x_dc_test_tone_set(ad917x_handle_t *h, int32_t dc_test_tone_en);
985 
1001 int32_t ad917x_dc_test_tone_get(ad917x_handle_t *h, int32_t *dc_test_tone_en);
1002 
1025  ad917x_channel_select_t channel,
1026  int64_t *carrier_freq_hz);
1027 
1046  ad917x_dac_select_t dac,
1047  int64_t *carrier_freq_hz);
1048 
1051 #endif /* !__AD917XAPI_H__ */
ad917x_deinit
int32_t ad917x_deinit(ad917x_handle_t *h)
De-initialize the AD917X Device.
Definition: ad917x_api.c:199
ad917x_handle_t::hw_open
hw_open_t hw_open
Definition: AD917x.h:96
AD917X_PLL_REG_RDY
@ AD917X_PLL_REG_RDY
Definition: AD917x.h:78
ad917x_jesd_set_sysref_enable
int32_t ad917x_jesd_set_sysref_enable(ad917x_handle_t *h, uint8_t en)
Enable SysRef Input.
Definition: ad917x_jesd_api.c:245
tx_en_pin_ctrl_t
int(* tx_en_pin_ctrl_t)(void *user_data, uint8_t enable)
TX_ENABLE PIN CONTROL FUNCTION.
Definition: api_def.h:133
AD917X_CH_0
@ AD917X_CH_0
Definition: AD917x.h:50
ad917x_init
int32_t ad917x_init(ad917x_handle_t *h)
Initialize AD917X Device This API must be called first before any other API calls....
Definition: ad917x_api.c:167
ad917x_jesd_set_lane_xbar
int32_t ad917x_jesd_set_lane_xbar(ad917x_handle_t *h, uint8_t logical_lane, uint8_t physical_lane)
Configure the Lane Cross Bar in the JESD datalink layer.
Definition: ad917x_jesd_api.c:486
ad917x_jesd_serdes_pll_flg_t
ad917x_jesd_serdes_pll_flg_t
Definition: AD917x.h:76
signal_type_t
signal_type_t
Definition: api_def.h:193
ad917x_jesd_invert_lane
int32_t ad917x_jesd_invert_lane(ad917x_handle_t *h, uint8_t logical_lane, uint8_t invert)
Invert or un-invert logical lanes.
Definition: ad917x_jesd_api.c:520
AD917X_CH_5
@ AD917X_CH_5
Definition: AD917x.h:60
ad917x_reset
int32_t ad917x_reset(ad917x_handle_t *h, uint8_t hw_reset)
Reset the AD917X.
Definition: ad917x_api.c:245
ad917x_jesd_get_cfg_status
int32_t ad917x_jesd_get_cfg_status(ad917x_handle_t *h, uint8_t *cfg_valid)
Get JESD Configuration Status.
Definition: ad917x_jesd_api.c:191
AD917X_CH_4
@ AD917X_CH_4
Definition: AD917x.h:58
ad917x_set_dac_clk_freq
int32_t ad917x_set_dac_clk_freq(ad917x_handle_t *h, uint64_t dac_clk_freq_hz)
Set the DAC CLK Frequency.
Definition: ad917x_api.c:421
ad917x_jesd_get_cfg_param
int32_t ad917x_jesd_get_cfg_param(ad917x_handle_t *h, jesd_param_t *jesd_param)
Read back all current JESD parameter settings.
Definition: ad917x_jesd_api.c:210
hw_close_t
int(* hw_close_t)(void *user_data)
Closes any platform hardware resources for the AD9164 Device.
Definition: api_def.h:98
ad917x_jesd_set_lmfc_delay
int32_t ad917x_jesd_set_lmfc_delay(ad917x_handle_t *h, jesd_link_t link, uint8_t delay, uint8_t var)
Set the LMFC Delay and Variance for the JESD Links.
Definition: ad917x_jesd_api.c:636
ad917x_dac_select_t
ad917x_dac_select_t
Definition: AD917x.h:36
ad917x_dds_select_t
ad917x_dds_select_t
Definition: AD917x.h:28
ad917x_handle_t::hw_close
hw_close_t hw_close
Definition: AD917x.h:98
ad917x_get_dac_clk_status
int32_t ad917x_get_dac_clk_status(ad917x_handle_t *h, uint8_t *pll_lock_stat, uint8_t *dll_lock_stat)
Get DAC CLK Status.
Definition: ad917x_api.c:472
AD917X_PLL_LOCK_STAT
@ AD917X_PLL_LOCK_STAT
Definition: AD917x.h:77
spi_sdo_config_t
spi_sdo_config_t
Definition: api_def.h:175
ad917x_jesd_set_scrambler_enable
int32_t ad917x_jesd_set_scrambler_enable(ad917x_handle_t *h, uint8_t en)
Enable the de-scrambler for the JESD Interface.
Definition: ad917x_jesd_api.c:306
ad917x_handle_t::delay_us
delay_us_t delay_us
Definition: AD917x.h:91
AD917X_PLL_LOSSLOCK
@ AD917X_PLL_LOSSLOCK
Definition: AD917x.h:80
AD917X_CH_1
@ AD917X_CH_1
Definition: AD917x.h:52
signal_coupling_t
signal_coupling_t
Definition: api_def.h:200
ad917x_handle_t::sysref
signal_coupling_t sysref
Definition: AD917x.h:88
jesd_param_t
Definition: api_def.h:230
AD917X_DDSM
@ AD917X_DDSM
Definition: AD917x.h:30
ad917x_get_page_idx
int32_t ad917x_get_page_idx(ad917x_handle_t *h, int32_t *dac, int32_t *channel)
Get select page index.
Definition: ad917x_api.c:620
AD917X_DAC1
@ AD917X_DAC1
Definition: AD917x.h:42
ad917x_jesd_get_lane_xbar
int32_t ad917x_jesd_get_lane_xbar(ad917x_handle_t *h, uint8_t *phy_log_map)
Get current Lane Cross Bar configuration for the JESD datalink layer.
Definition: ad917x_jesd_api.c:548
ad917x_handle_t::dac_freq_hz
uint64_t dac_freq_hz
Definition: AD917x.h:89
ad917x_jesd_set_syncoutb_enable
int32_t ad917x_jesd_set_syncoutb_enable(ad917x_handle_t *h, jesd_syncoutb_t syncoutb, uint8_t en)
Enable the SYNCOUTB Output Signal.
Definition: ad917x_jesd_api.c:435
ad917x_set_page_idx
int32_t ad917x_set_page_idx(ad917x_handle_t *h, const uint32_t dac, const uint32_t channel)
Select Page.
Definition: ad917x_api.c:610
ad917x_set_clkout_config
int32_t ad917x_set_clkout_config(ad917x_handle_t *h, uint8_t l_div)
Set CLKOUT configuration.
Definition: ad917x_api.c:497
ad917x_nco_set_phase_offset
int32_t ad917x_nco_set_phase_offset(ad917x_handle_t *h, const ad917x_dac_select_t dacs, const uint16_t dacs_po, const ad917x_channel_select_t channels, const uint16_t ch_po)
Set NCO phase offset.
Definition: ad917x_nco_api.c:262
AD917X_DDSC
@ AD917X_DDSC
Definition: AD917x.h:32
ad917x_register_read
int32_t ad917x_register_read(ad917x_handle_t *h, const uint16_t address, uint8_t *data)
Perform SPI register read access to AD917X Device.
Definition: ad917x_reg.c:42
delay_us_t
int(* delay_us_t)(void *user_data, unsigned int us)
Delay for specified number of microseconds. Platform Dependant.
Definition: api_def.h:62
ad917x_dc_test_tone_set
int32_t ad917x_dc_test_tone_set(ad917x_handle_t *h, int32_t dc_test_tone_en)
Set DC Test Tone enable status.
Definition: ad917x_nco_api.c:689
ad917x_set_dac_clk
int32_t ad917x_set_dac_clk(ad917x_handle_t *h, uint64_t dac_clk_freq_hz, uint8_t dac_pll_en, uint64_t ref_clk_freq_hz)
Configure the DAC Clock Input path based on a the desired dac clock frequency, the applied reference ...
Definition: ad917x_api.c:518
ad917x_get_revision
int32_t ad917x_get_revision(ad917x_handle_t *h, uint8_t *rev_major, uint8_t *rev_minor, uint8_t *rev_rc)
Get API Revision Data.
Definition: ad917x_api.c:303
ad917x_get_channel_gain
int32_t ad917x_get_channel_gain(ad917x_handle_t *h, uint16_t *gain)
Get Channel gain.
Definition: ad917x_nco_api.c:606
spi_xfer_t
int(* spi_xfer_t)(void *user_data, uint8_t *indata, uint8_t *outdata, int size_bytes)
Platform dependent SPI access functions.
Definition: api_def.h:47
ad917x_jesd_get_pll_status
int32_t ad917x_jesd_get_pll_status(ad917x_handle_t *h, uint8_t *pll_status)
Get SERDES PLL Status.
Definition: ad917x_jesd_api.c:471
AD917X_PLL_CAL_STAT
@ AD917X_PLL_CAL_STAT
Definition: AD917x.h:79
ad917x_jesd_enable_datapath
int32_t ad917x_jesd_enable_datapath(ad917x_handle_t *h, uint8_t lanes_msk, uint8_t run_cal, uint8_t en)
Enable the JESD Interface.
Definition: ad917x_jesd_api.c:340
reset_pin_ctrl_t
int(* reset_pin_ctrl_t)(void *user_data, uint8_t enable)
RESETB PIN CONTROL FUNCTION.
Definition: api_def.h:152
ad917x_nco_get_ftw
int32_t ad917x_nco_get_ftw(ad917x_handle_t *h, const ad917x_dds_select_t nco, uint64_t *ftw, uint64_t *acc_modulus, uint64_t *acc_delta)
Get FTW, ACC and MOD values.
Definition: ad917x_nco_api.c:466
ad917x_jesd_get_link_status
int32_t ad917x_jesd_get_link_status(ad917x_handle_t *h, jesd_link_t link, ad917x_jesd_link_stat_t *link_status)
Get JESD Link Status.
Definition: ad917x_jesd_api.c:597
ad917x_handle_t::tx_en_pin_ctrl
tx_en_pin_ctrl_t tx_en_pin_ctrl
Definition: AD917x.h:93
ad917x_nco_set_ftw
int32_t ad917x_nco_set_ftw(ad917x_handle_t *h, const ad917x_dds_select_t nco, const uint64_t ftw, const uint64_t acc_modulus, const uint64_t acc_delta)
Set FTW, ACC and MOD values.
Definition: ad917x_nco_api.c:363
api_def.h
API definitions header file.
ad917x_ddsm_cal_dc_input_set
int32_t ad917x_ddsm_cal_dc_input_set(ad917x_handle_t *h, int32_t ddsm_cal_dc_input_en)
Set Main DAC Cal DC Input.
Definition: ad917x_nco_api.c:728
ad917x_handle_t::sdo
spi_sdo_config_t sdo
Definition: AD917x.h:86
NO_OS_BIT
#define NO_OS_BIT(x)
Definition: no_os_util.h:45
ad917x_set_channel_gain
int32_t ad917x_set_channel_gain(ad917x_handle_t *h, const uint16_t gain)
Set Channel gain.
Definition: ad917x_nco_api.c:576
ad917x_jesd_get_sysref_enable
int32_t ad917x_jesd_get_sysref_enable(ad917x_handle_t *h, uint8_t *en)
Get the current SYSREF Input.
Definition: ad917x_jesd_api.c:287
AD917X_CH_2
@ AD917X_CH_2
Definition: AD917x.h:54
ad917x_nco_channel_freq_get
int32_t ad917x_nco_channel_freq_get(ad917x_handle_t *h, ad917x_channel_select_t channel, int64_t *carrier_freq_hz)
Get Channel NCO frequency.
Definition: ad917x_nco_api.c:967
ad917x_get_chip_id
int32_t ad917x_get_chip_id(ad917x_handle_t *h, adi_chip_id_t *chip_id)
Get Chip Identification Data.
Definition: ad917x_api.c:212
ad917x_nco_set
int32_t ad917x_nco_set(ad917x_handle_t *h, const ad917x_dac_select_t dacs, const ad917x_channel_select_t channels, const int64_t carrier_freq_hz, const uint16_t amplitude, int32_t dc_test_tone_en, int32_t ddsm_cal_dc_input_en)
Set NCO.
Definition: ad917x_nco_api.c:772
ad917x_handle_t::dev_xfer
spi_xfer_t dev_xfer
Definition: AD917x.h:90
AD917X_DAC0
@ AD917X_DAC0
Definition: AD917x.h:40
adi_chip_id_t
Definition: api_def.h:163
ad917x_get_dac_clk_freq
int32_t ad917x_get_dac_clk_freq(ad917x_handle_t *h, uint64_t *dac_clk_freq_hz)
Get the DAC CLK Frequency.
Definition: ad917x_api.c:461
AD917X_CH_NONE
@ AD917X_CH_NONE
Definition: AD917x.h:48
ad917x_set_dc_cal_tone_amp
int32_t ad917x_set_dc_cal_tone_amp(ad917x_handle_t *h, const uint16_t amp)
Set DC Calibration tone.
Definition: ad917x_nco_api.c:591
ad917x_nco_get_phase_offset
int32_t ad917x_nco_get_phase_offset(ad917x_handle_t *h, const ad917x_dac_select_t dacs, uint16_t *dacs_po, const ad917x_channel_select_t channels, uint16_t *ch_po)
Get NCO phase offset.
Definition: ad917x_nco_api.c:311
AD917X_CH_3
@ AD917X_CH_3
Definition: AD917x.h:56
ad917x_nco_main_freq_get
int32_t ad917x_nco_main_freq_get(ad917x_handle_t *h, ad917x_dac_select_t dac, int64_t *carrier_freq_hz)
Get Main DAC NCO frequency.
Definition: ad917x_nco_api.c:949
ad917x_dc_test_tone_get
int32_t ad917x_dc_test_tone_get(ad917x_handle_t *h, int32_t *dc_test_tone_en)
Get DC Test Tone enable status.
Definition: ad917x_nco_api.c:709
ad917x_handle_t::reset_pin_ctrl
reset_pin_ctrl_t reset_pin_ctrl
Definition: AD917x.h:95
ad917x_handle_t::user_data
void * user_data
Definition: AD917x.h:85
ad917x_handle_t::syncoutb
signal_type_t syncoutb
Definition: AD917x.h:87
hw_open_t
int(* hw_open_t)(void *user_data)
Platform hardware initialisation for the AD9164 Device.
Definition: api_def.h:80
ad917x_nco_enable
int32_t ad917x_nco_enable(ad917x_handle_t *h, const ad917x_dac_select_t dacs, const ad917x_channel_select_t channels)
NCO Enable.
Definition: ad917x_nco_api.c:624
AD917X_DAC_NONE
@ AD917X_DAC_NONE
Definition: AD917x.h:38
jesd_link_t
jesd_link_t
Definition: api_def.h:207
no_os_util.h
Header file of utility functions.
ad917x_set_dac_pll_config
int32_t ad917x_set_dac_pll_config(ad917x_handle_t *h, uint8_t dac_pll_en, uint8_t m_div, uint8_t n_div, uint8_t vco_div)
Configure the On Chip DAC PLL.
Definition: ad917x_api.c:325
ad917x_register_write
int32_t ad917x_register_write(ad917x_handle_t *h, const uint16_t address, const uint8_t data)
Perform SPI register write access to AD917X Device.
Definition: ad917x_reg.c:22
ad917x_ddsm_cal_dc_input_get
int32_t ad917x_ddsm_cal_dc_input_get(ad917x_handle_t *h, int32_t *ddsm_cal_dc_input_en)
Get Main DAC Cal DC Input.
Definition: ad917x_nco_api.c:749
ad917x_handle_t
Definition: AD917x.h:84
ad917x_jesd_enable_link
int32_t ad917x_jesd_enable_link(ad917x_handle_t *h, jesd_link_t link, uint8_t en)
Enable JESD Link.
Definition: ad917x_jesd_api.c:571
ad917x_jesd_config_datapath
int32_t ad917x_jesd_config_datapath(ad917x_handle_t *h, uint8_t dual_en, uint8_t jesd_mode, uint8_t ch_intpl, uint8_t dp_intpl)
Configure the JESD Datapath for AD917X.
Definition: ad917x_jesd_api.c:134
chip_id
chip_id
Definition: ad9172.h:51
jesd_syncoutb_t
jesd_syncoutb_t
Definition: api_def.h:214
ad917x_channel_select_t
ad917x_channel_select_t
Definition: AD917x.h:46