Go to the documentation of this file.
54 #define AD7779_REG_CH_CONFIG(ch) (0x00 + (ch)) // Channel Configuration
55 #define AD7779_REG_CH_DISABLE 0x08 // Disable clocks to ADC channel
56 #define AD7779_REG_CH_SYNC_OFFSET(ch) (0x09 + (ch)) // Channel SYNC Offset
57 #define AD7779_REG_GENERAL_USER_CONFIG_1 0x11 // General User Config 1
58 #define AD7779_REG_GENERAL_USER_CONFIG_2 0x12 // General User Config 2
59 #define AD7779_REG_GENERAL_USER_CONFIG_3 0x13 // General User Config 3
60 #define AD7779_REG_DOUT_FORMAT 0x14 // Data out format
61 #define AD7779_REG_ADC_MUX_CONFIG 0x15 // Main ADC meter and reference Mux control
62 #define AD7779_REG_GLOBAL_MUX_CONFIG 0x16 // Global diagnostics mux
63 #define AD7779_REG_GPIO_CONFIG 0x17 // GPIO config
64 #define AD7779_REG_GPIO_DATA 0x18 // GPIO Data
65 #define AD7779_REG_BUFFER_CONFIG_1 0x19 // Buffer Config 1
66 #define AD7779_REG_BUFFER_CONFIG_2 0x1A // Buffer Config 2
67 #define AD7779_REG_CH_OFFSET_UPPER_BYTE(ch) (0x1C + (ch) * 6) // Channel offset upper byte
68 #define AD7779_REG_CH_OFFSET_MID_BYTE(ch) (0x1D + (ch) * 6) // Channel offset middle byte
69 #define AD7779_REG_CH_OFFSET_LOWER_BYTE(ch) (0x1E + (ch) * 6) // Channel offset lower byte
70 #define AD7779_REG_CH_GAIN_UPPER_BYTE(ch) (0x1F + (ch) * 6) // Channel gain upper byte
71 #define AD7779_REG_CH_GAIN_MID_BYTE(ch) (0x20 + (ch) * 6) // Channel gain middle byte
72 #define AD7779_REG_CH_GAIN_LOWER_BYTE(ch) (0x21 + (ch) * 6) // Channel gain lower byte
73 #define AD7779_REG_CH_ERR_REG(ch) (0x4C + (ch)) // Channel Status Register
74 #define AD7779_REG_CH0_1_SAT_ERR 0x54 // Channel 0/1 DSP errors
75 #define AD7779_REG_CH2_3_SAT_ERR 0x55 // Channel 2/3 DSP errors
76 #define AD7779_REG_CH4_5_SAT_ERR 0x56 // Channel 4/5 DSP errors
77 #define AD7779_REG_CH6_7_SAT_ERR 0x57 // Channel 6/7 DSP errors
78 #define AD7779_REG_CHX_ERR_REG_EN 0x58 // Channel 0-7 Error Reg Enable
79 #define AD7779_REG_GEN_ERR_REG_1 0x59 // General Errors Register 1
80 #define AD7779_REG_GEN_ERR_REG_1_EN 0x5A // General Errors Register 1 Enable
81 #define AD7779_REG_GEN_ERR_REG_2 0x5B // General Errors Register 2
82 #define AD7779_REG_GEN_ERR_REG_2_EN 0x5C // General Errors Register 2 Enable
83 #define AD7779_REG_STATUS_REG_1 0x5D // Error Status Register 1
84 #define AD7779_REG_STATUS_REG_2 0x5E // Error Status Register 2
85 #define AD7779_REG_STATUS_REG_3 0x5F // Error Status Register 3
86 #define AD7779_REG_SRC_N_MSB 0x60 // Decimation Rate (N) MSB
87 #define AD7779_REG_SRC_N_LSB 0x61 // Decimation Rate (N) LSB
88 #define AD7779_REG_SRC_IF_MSB 0x62 // Decimation Rate (IF) MSB
89 #define AD7779_REG_SRC_IF_LSB 0x63 // Decimation Rate (IF) LSB
90 #define AD7779_REG_SRC_UPDATE 0x64 // SRC load source and load update
93 #define AD7779_CH_GAIN(x) (((x) & 0x3) << 6)
94 #define AD7779_CH_RX (1 << 4)
97 #define AD7779_CH_DISABLE(x) (1 << (x))
100 #define AD7779_ALL_CH_DIS_MCLK_EN (1 << 7)
101 #define AD7779_MOD_POWERMODE (1 << 6)
102 #define AD7779_PDB_VCM (1 << 5)
103 #define AD7779_PDB_REFOUT_BUF (1 << 4)
104 #define AD7779_PDB_SAR (1 << 3)
105 #define AD7779_PDB_RC_OSC (1 << 2)
106 #define AD7779_SOFT_RESET(x) (((x) & 0x3) << 0)
109 #define AD7771_FILTER_MODE (1 << 6)
110 #define AD7779_SAR_DIAG_MODE_EN (1 << 5)
111 #define AD7779_SDO_DRIVE_STR(x) (((x) & 0x3) << 3)
112 #define AD7779_DOUT_DRIVE_STR(x) (((x) & 0x3) << 1)
113 #define AD7779_SPI_SYNC (1 << 0)
116 #define AD7779_CONVST_DEGLITCH_DIS(x) (((x) & 0x3) << 6)
117 #define AD7779_SPI_SLAVE_MODE_EN (1 << 4)
118 #define AD7779_CLK_QUAL_DIS (1 << 0)
121 #define AD7779_DOUT_FORMAT(x) (((x) & 0x3) << 6)
122 #define AD7779_DOUT_HEADER_FORMAT (1 << 5)
123 #define AD7779_DCLK_CLK_DIV(x) (((x) & 0x7) << 1)
126 #define AD7779_REF_MUX_CTRL(x) (((x) & 0x3) << 6)
129 #define AD7779_GLOBAL_MUX_CTRL(x) (((x) & 0x1F) << 3)
132 #define AD7779_REF_BUF_POS_EN (1 << 4)
133 #define AD7779_REF_BUF_NEG_EN (1 << 3)
136 #define AD7779_REFBUFP_PREQ (1 << 7)
137 #define AD7779_REFBUFN_PREQ (1 << 6)
138 #define AD7779_PDB_ALDO1_OVRDRV (1 << 2)
139 #define AD7779_PDB_ALDO2_OVRDRV (1 << 1)
140 #define AD7779_PDB_DLDO_OVRDRV (1 << 0)
143 #define AD7779_MEMMAP_CRC_TEST_EN (1 << 5)
144 #define AD7779_ROM_CRC_TEST_EN (1 << 4)
145 #define AD7779_SPI_CLK_COUNT_TEST_EN (1 << 3)
146 #define AD7779_SPI_INVALID_READ_TEST_EN (1 << 2)
147 #define AD7779_SPI_INVALID_WRITE_TEST_EN (1 << 1)
148 #define AD7779_SPI_CRC_TEST_EN (1 << 0)
150 #define AD7779_CRC8_POLY 0x07
273 uint8_t sync_offset[8];
274 uint32_t offset_corr[8];
275 uint32_t gain_corr[8];
308 uint8_t sync_offset[8];
309 uint32_t offset_corr[8];
310 uint32_t gain_corr[8];
398 uint8_t sync_offset);
402 uint8_t *sync_offset);
#define AD7779_REG_GLOBAL_MUX_CONFIG
Definition: ad7779.h:62
ad7779_ctrl_mode ctrl_mode
Definition: ad7779.h:299
#define AD7779_MOD_POWERMODE
Definition: ad7779.h:101
@ AD7779_AVDD2A_AVSSX_ATT
Definition: ad7779.h:235
ad7779_ref_type ref_type
Definition: ad7779.h:305
int32_t ad7779_spi_int_reg_read_mask(ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t *data)
Definition: ad7779.c:174
#define AD7779_REG_CH_SYNC_OFFSET(ch)
Definition: ad7779.h:56
int32_t ad7779_get_sar_cfg(ad7779_dev *dev, ad7779_state *state, ad7779_sar_mux *mux)
Definition: ad7779.c:1325
ad7779_pwr_mode pwr_mode
Definition: ad7779.h:306
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
@ AD7779_PIN_CTRL
Definition: ad7779.h:156
#define AD7779_REG_BUFFER_CONFIG_2
Definition: ad7779.h:66
uint8_t ad7779_compute_crc8(uint8_t *data, uint8_t data_size)
Definition: ad7779.c:82
@ AD7779_EXT_REF_INV
Definition: ad7779.h:209
#define AD7779_REG_CH_GAIN_UPPER_BYTE(ch)
Definition: ad7779.h:70
uint16_t dec_rate_int
Definition: ad7779.h:268
int32_t ad7779_get_gain(ad7779_dev *dev, ad7779_ch ch, ad7779_gain *gain)
Definition: ad7779.c:563
ad7779_state sinc5_state
Definition: ad7779.h:279
#define AD7779_REG_CH_OFFSET_UPPER_BYTE(ch)
Definition: ad7779.h:67
struct no_os_spi_desc * spi_desc
Definition: ad7779.h:250
struct no_os_gpio_desc * gpio_dclk0
Definition: ad7779.h:257
int32_t ad7779_get_state(ad7779_dev *dev, ad7779_ch ch, ad7779_state *state)
Definition: ad7779.c:479
int32_t ad7779_spi_int_reg_write(ad7779_dev *dev, uint8_t reg_addr, uint8_t reg_data)
Definition: ad7779.c:146
#define AD7779_REG_SRC_UPDATE
Definition: ad7779.h:90
uint8_t cached_reg_val[AD7779_REG_SRC_UPDATE+1]
Definition: ad7779.h:281
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:165
#define AD7779_CRC8_POLY
Definition: ad7779.h:150
int32_t ad7779_spi_sar_read_code(ad7779_dev *dev, ad7779_sar_mux mux_next_conv, uint16_t *sar_code)
Definition: ad7779.c:242
uint16_t dec_rate_dec
Definition: ad7779.h:304
int32_t ad7779_get_dec_rate(ad7779_dev *dev, uint16_t *int_val, uint16_t *dec_val)
Definition: ad7779.c:647
@ AD7779_DCLK_DIV_32
Definition: ad7779.h:195
struct no_os_gpio_desc * gpio_reset
Definition: ad7779.h:252
int32_t ad7779_spi_int_reg_write_mask(ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
Definition: ad7779.c:196
int32_t ad7779_get_state(ad7779_dev *dev, ad7779_ch ch, ad7779_state *state)
Definition: ad7779.c:479
@ AD7779_SD_CONV
Definition: ad7779.h:162
Header file of SPI Interface.
int32_t ad7779_set_sync_offset(ad7779_dev *dev, ad7779_ch ch, uint8_t sync_offset)
Definition: ad7779.c:868
int32_t ad7779_get_sync_offset(ad7779_dev *dev, ad7779_ch ch, uint8_t *sync_offset)
Definition: ad7779.c:903
@ AD7779_REFX_N
Definition: ad7779.h:214
int32_t ad7779_set_dclk_div(ad7779_dev *dev, ad7779_dclk_div div)
Definition: ad7779.c:806
ad7779_sar_mux sar_mux
Definition: ad7779.h:278
@ AD7779_DGND_AVSS1A_ATT
Definition: ad7779.h:239
int32_t ad7779_spi_int_reg_read(ad7779_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
Definition: ad7779.c:110
@ AD7779_ENABLE
Definition: ad7779.h:178
int32_t ad7779_get_ref_buf_op_mode(ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode *mode)
Definition: ad7779.c:1216
ad7779_state spi_crc_en
Definition: ad7779.h:300
@ AD7779_INT_REF
Definition: ad7779.h:207
#define AD7779_REG_SRC_N_LSB
Definition: ad7779.h:87
#define AD7779_REG_CH_OFFSET_LOWER_BYTE(ch)
Definition: ad7779.h:69
int32_t ad7779_set_reference_type(ad7779_dev *dev, ad7779_ref_type ref_type)
Definition: ad7779.c:738
int32_t ad7779_get_sync_offset(ad7779_dev *dev, ad7779_ch ch, uint8_t *sync_offset)
Definition: ad7779.c:903
int32_t ad7779_set_ref_buf_op_mode(ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode mode)
Definition: ad7779.c:1140
ad7779_dclk_div dclk_div
Definition: ad7779.h:272
@ AD7779_DVBE_AVSSX
Definition: ad7779.h:225
int32_t ad7779_set_dec_rate(ad7779_dev *dev, uint16_t int_val, uint16_t dec_val)
Definition: ad7779.c:589
ad7779_refx_pin
Definition: ad7779.h:212
int32_t ad7771_set_sinc5_filter_state(ad7779_dev *dev, ad7779_state state)
Definition: ad7779.c:1430
int32_t ad7779_remove(ad7779_dev *dev)
Free the resources allocated by ad7779_init().
Definition: ad7779.c:1636
int32_t ad7779_set_gain(ad7779_dev *dev, ad7779_ch ch, ad7779_gain gain)
Definition: ad7779.c:518
uint32_t offset_corr[8]
Definition: ad7779.h:274
Header file of Delay functions.
const uint8_t pin_mode_options[16][4]
Definition: ad7779.c:53
ad7779_state sinc5_state
Definition: ad7779.h:312
int32_t ad7779_init(ad7779_dev **device, ad7779_init_param init_param)
Definition: ad7779.c:1487
int32_t ad7779_get_dclk_div(ad7779_dev *dev, ad7779_dclk_div *div)
Definition: ad7779.c:835
struct no_os_spi_init_param spi_init
Definition: common_data.c:64
int32_t ad7779_spi_int_reg_write(ad7779_dev *dev, uint8_t reg_addr, uint8_t reg_data)
Definition: ad7779.c:146
int32_t ad7779_get_spi_op_mode(ad7779_dev *dev, ad7779_spi_op_mode *mode)
Definition: ad7779.c:321
int32_t ad7779_get_gain_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t *gain)
Definition: ad7779.c:1091
Definition: ad9361_util.h:75
ad7779_state spi_crc_en
Definition: ad7779.h:264
@ NO_OS_GPIO_HIGH
Definition: no_os_gpio.h:123
#define AD7779_REFBUFN_PREQ
Definition: ad7779.h:137
#define AD7779_REG_SRC_N_MSB
Definition: ad7779.h:86
#define AD7779_REG_DOUT_FORMAT
Definition: ad7779.h:60
#define AD7779_GLOBAL_MUX_CTRL(x)
Definition: ad7779.h:129
@ AD7779_REF2P_AVSSX
Definition: ad7779.h:244
@ AD7779_REF_BUF_PRECHARGED
Definition: ad7779.h:219
int32_t ad7779_set_power_mode(ad7779_dev *dev, ad7779_pwr_mode pwr_mode)
Definition: ad7779.c:690
int32_t ad7779_get_power_mode(ad7779_dev *dev, ad7779_pwr_mode *pwr_mode)
Definition: ad7779.c:710
@ AD7779_CH5
Definition: ad7779.h:172
int32_t ad7779_set_gain_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t gain)
Definition: ad7779.c:1043
struct no_os_gpio_desc * gpio_convst_sar
Definition: ad7779.h:261
@ AD7779_VCM_AVSSX
Definition: ad7779.h:229
ad7779_gain gain[8]
Definition: ad7779.h:267
ad7779_state state[8]
Definition: ad7779.h:266
ad7779_state
Definition: ad7779.h:177
uint8_t sync_offset[8]
Definition: ad7779.h:273
#define AD7779_REG_CH_GAIN_MID_BYTE(ch)
Definition: ad7779.h:71
#define AD7779_REG_GENERAL_USER_CONFIG_1
Definition: ad7779.h:57
@ AD7779_AUXAINP_AUXAINN
Definition: ad7779.h:224
struct no_os_gpio_desc * gpio_mode1
Definition: ad7779.h:254
int32_t ad7779_set_power_mode(ad7779_dev *dev, ad7779_pwr_mode pwr_mode)
Definition: ad7779.c:690
int32_t ad7779_set_reference_type(ad7779_dev *dev, ad7779_ref_type ref_type)
Definition: ad7779.c:738
#define AD7779_REG_CH_DISABLE
Definition: ad7779.h:55
int32_t ad7779_do_update_mode_pins(ad7779_dev *dev)
Definition: ad7779.c:362
int32_t ad7779_set_dec_rate(ad7779_dev *dev, uint16_t int_val, uint16_t dec_val)
Definition: ad7779.c:589
#define AD7779_PDB_REFOUT_BUF
Definition: ad7779.h:103
@ NO_OS_GPIO_LOW
Definition: no_os_gpio.h:121
@ AD7779_AVDD1A_AVSSX_ATT
Definition: ad7779.h:233
int32_t ad7779_set_spi_op_mode(ad7779_dev *dev, ad7779_spi_op_mode mode)
Definition: ad7779.c:282
@ AD7779_DCLK_DIV_64
Definition: ad7779.h:196
ad7779_ch
Definition: ad7779.h:166
@ AD7779_SPI_CTRL
Definition: ad7779.h:157
uint16_t dec_rate_int
Definition: ad7779.h:303
#define AD7779_REG_GENERAL_USER_CONFIG_3
Definition: ad7779.h:59
@ AD7779_DCLK_DIV_8
Definition: ad7779.h:193
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:132
struct no_os_gpio_desc * gpio_mode2
Definition: ad7779.h:255
ad7779_spi_op_mode
Definition: ad7779.h:160
int32_t ad7779_do_update_mode_pins(ad7779_dev *dev)
Definition: ad7779.c:362
@ AD7779_REF2P_REF2N
Definition: ad7779.h:227
@ AD7779_REF1P_AVSSX
Definition: ad7779.h:243
ad7779_ref_buf_op_mode ref_buf_op_mode[2]
Definition: ad7779.h:276
@ AD7779_GAIN_2
Definition: ad7779.h:184
ad7779_ref_type
Definition: ad7779.h:205
#define AD7779_REG_GENERAL_USER_CONFIG_2
Definition: ad7779.h:58
#define AD7779_REG_CH_OFFSET_MID_BYTE(ch)
Definition: ad7779.h:68
@ AD7779_LOW_PWR
Definition: ad7779.h:201
@ AD7779_REFX_P
Definition: ad7779.h:213
@ AD7779_IOVDD_DGND_ATT
Definition: ad7779.h:237
@ AD7779_REF_BUF_DISABLED
Definition: ad7779.h:220
@ AD7779_AVDD4_AVSSX
Definition: ad7779.h:238
ad7779_pwr_mode pwr_mode
Definition: ad7779.h:271
@ AD7779_DCLK_DIV_1
Definition: ad7779.h:190
int32_t ad7771_get_sinc5_filter_state(ad7779_dev *dev, ad7779_state *state)
Definition: ad7779.c:1457
int32_t ad7779_set_sync_offset(ad7779_dev *dev, ad7779_ch ch, uint8_t sync_offset)
Definition: ad7779.c:868
ad7779_ref_type ref_type
Definition: ad7779.h:270
#define AD7779_REG_SRC_IF_MSB
Definition: ad7779.h:88
int32_t ad7779_spi_int_reg_read(ad7779_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
Definition: ad7779.c:110
@ AD7779_DREGCAP_DGND_ATT
Definition: ad7779.h:232
@ AD7779_AVDD4_AVSSX_ATT
Definition: ad7779.h:242
#define AD7779_REG_ADC_MUX_CONFIG
Definition: ad7779.h:61
#define AD7779_REG_GEN_ERR_REG_1_EN
Definition: ad7779.h:80
int32_t ad7779_set_state(ad7779_dev *dev, ad7779_ch ch, ad7779_state state)
Definition: ad7779.c:449
bool read_from_cache
Definition: ad7779.h:313
int32_t ad7779_set_sar_cfg(ad7779_dev *dev, ad7779_state state, ad7779_sar_mux mux)
Definition: ad7779.c:1298
ad7779_gain
Definition: ad7779.h:182
int32_t ad7779_set_offset_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t offset)
Definition: ad7779.c:943
#define AD7779_REFBUFP_PREQ
Definition: ad7779.h:136
@ AD7779_CH7
Definition: ad7779.h:174
@ AD7779_AVDD1B_AVSSX_ATT
Definition: ad7779.h:234
int32_t ad7779_get_dclk_div(ad7779_dev *dev, ad7779_dclk_div *div)
Definition: ad7779.c:835
#define AD7779_REF_BUF_POS_EN
Definition: ad7779.h:132
int32_t ad7779_get_gain_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t *gain)
Definition: ad7779.c:1091
uint8_t ad7779_compute_crc8(uint8_t *data, uint8_t data_size)
Definition: ad7779.c:82
int32_t ad7779_set_offset_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t offset)
Definition: ad7779.c:943
int32_t no_os_gpio_remove(struct no_os_gpio_desc *desc)
Free the resources allocated by no_os_gpio_get().
Definition: no_os_gpio.c:110
struct no_os_gpio_desc * gpio_dclk1
Definition: ad7779.h:258
Structure holding SPI descriptor.
Definition: no_os_spi.h:177
int32_t ad7771_get_sinc5_filter_state(ad7779_dev *dev, ad7779_state *state)
Definition: ad7779.c:1457
#define AD7779_CH_GAIN(x)
Definition: ad7779.h:93
struct no_os_gpio_desc * gpio_mode3
Definition: ad7779.h:256
Structure holding the GPIO descriptor.
Definition: no_os_gpio.h:102
@ AD7779_INT_REG
Definition: ad7779.h:161
ad7779_sar_mux
Definition: ad7779.h:223
@ AD7779_AVDD2B_AVSSX_ATT
Definition: ad7779.h:236
@ AD7779_GAIN_1
Definition: ad7779.h:183
#define AD7779_SPI_CRC_TEST_EN
Definition: ad7779.h:148
@ AD7779_EXT_SUPPLY
Definition: ad7779.h:208
int32_t ad7779_do_spi_soft_reset(ad7779_dev *dev)
Definition: ad7779.c:1410
int32_t ad7779_spi_sar_read_code(ad7779_dev *dev, ad7779_sar_mux mux_next_conv, uint16_t *sar_code)
Definition: ad7779.c:242
int32_t ad7779_get_dec_rate(ad7779_dev *dev, uint16_t *int_val, uint16_t *dec_val)
Definition: ad7779.c:647
@ AD7779_GAIN_4
Definition: ad7779.h:185
int32_t ad7779_get_reference_type(ad7779_dev *dev, ad7779_ref_type *ref_type)
Definition: ad7779.c:774
int32_t ad7779_set_sar_cfg(ad7779_dev *dev, ad7779_state state, ad7779_sar_mux mux)
Definition: ad7779.c:1298
ad7779_ctrl_mode
Definition: ad7779.h:155
struct no_os_gpio_desc * gpio_mode0
Definition: ad7779.h:253
@ AD7779_DGND_AVSSX_ATT
Definition: ad7779.h:241
int32_t no_os_gpio_get(struct no_os_gpio_desc **desc, const struct no_os_gpio_init_param *param)
Obtain the GPIO decriptor.
Definition: no_os_gpio.c:55
void * no_os_malloc(size_t size)
Allocate memory and return a pointer to it.
Definition: chibios_alloc.c:49
@ AD7779_CH1
Definition: ad7779.h:168
int32_t ad7779_get_reference_type(ad7779_dev *dev, ad7779_ref_type *ref_type)
Definition: ad7779.c:774
@ AD7779_DGND_AVSS1B_ATT
Definition: ad7779.h:240
#define AD7779_REG_CH_GAIN_LOWER_BYTE(ch)
Definition: ad7779.h:72
uint32_t no_os_field_get(uint32_t mask, uint32_t word)
int32_t ad7771_set_sinc5_filter_state(ad7779_dev *dev, ad7779_state state)
Definition: ad7779.c:1430
int32_t ad7779_do_single_sar_conv(ad7779_dev *dev, ad7779_sar_mux mux, uint16_t *sar_code)
Definition: ad7779.c:1382
#define AD7779_REG_SRC_IF_LSB
Definition: ad7779.h:89
@ AD7779_AVSSX_AVDD4_ATT
Definition: ad7779.h:245
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:75
Header file of AD7779 Driver.
#define AD7779_REF_BUF_NEG_EN
Definition: ad7779.h:133
ad7779_dclk_div dclk_div
Definition: ad7779.h:307
@ AD7779_EXT_REF
Definition: ad7779.h:206
#define AD7779_PDB_SAR
Definition: ad7779.h:104
int32_t ad7779_get_offset_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t *offset)
Definition: ad7779.c:990
int32_t no_os_gpio_set_value(struct no_os_gpio_desc *desc, uint8_t value)
Set the value of the specified GPIO.
Definition: no_os_gpio.c:203
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:119
int32_t ad7779_get_power_mode(ad7779_dev *dev, ad7779_pwr_mode *pwr_mode)
Definition: ad7779.c:710
int32_t ad7779_set_gain_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t gain)
Definition: ad7779.c:1043
#define AD7779_SPI_SLAVE_MODE_EN
Definition: ad7779.h:117
ad7779_ctrl_mode ctrl_mode
Definition: ad7779.h:263
@ AD7779_DISABLE
Definition: ad7779.h:179
ad7779_dclk_div
Definition: ad7779.h:189
@ AD7779_DCLK_DIV_2
Definition: ad7779.h:191
@ AD7779_DCLK_DIV_128
Definition: ad7779.h:197
int32_t ad7779_set_state(ad7779_dev *dev, ad7779_ch ch, ad7779_state state)
Definition: ad7779.c:449
@ AD7779_CH2
Definition: ad7779.h:169
ad7779_state sar_state
Definition: ad7779.h:277
int32_t ad7779_spi_int_reg_write_mask(ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
Definition: ad7779.c:196
struct no_os_gpio_desc * gpio_sync_in
Definition: ad7779.h:260
int32_t ad7779_set_dclk_div(ad7779_dev *dev, ad7779_dclk_div div)
Definition: ad7779.c:806
@ AD7779_CH0
Definition: ad7779.h:167
uint16_t dec_rate_dec
Definition: ad7779.h:269
@ AD7779_CH3
Definition: ad7779.h:170
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:122
int32_t ad7779_do_single_sar_conv(ad7779_dev *dev, ad7779_sar_mux mux, uint16_t *sar_code)
Definition: ad7779.c:1382
int32_t ad7779_set_spi_op_mode(ad7779_dev *dev, ad7779_spi_op_mode mode)
Definition: ad7779.c:282
ad7779_pwr_mode
Definition: ad7779.h:200
Header file of GPIO Interface.
@ AD7779_CH6
Definition: ad7779.h:173
int32_t ad7779_get_ref_buf_op_mode(ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode *mode)
Definition: ad7779.c:1216
#define AD7779_REG_CH_CONFIG(ch)
Definition: ad7779.h:54
ad7779_spi_op_mode spi_op_mode
Definition: ad7779.h:265
#define AD7779_CH_DISABLE(x)
Definition: ad7779.h:97
@ AD7779_REF1P_REF1N
Definition: ad7779.h:226
int32_t ad7779_set_ref_buf_op_mode(ad7779_dev *dev, ad7779_refx_pin refx_pin, ad7779_ref_buf_op_mode mode)
Definition: ad7779.c:1140
@ AD7779_AREG1CAP_AVSSX_ATT
Definition: ad7779.h:230
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:58
int32_t ad7779_remove(ad7779_dev *dev)
Free the resources allocated by ad7779_init().
Definition: ad7779.c:1636
int32_t ad7779_set_gain(ad7779_dev *dev, ad7779_ch ch, ad7779_gain gain)
Definition: ad7779.c:518
bool read_from_cache
Definition: ad7779.h:280
@ AD7779_GAIN_8
Definition: ad7779.h:186
int32_t ad7779_get_offset_corr(ad7779_dev *dev, ad7779_ch ch, uint32_t *offset)
Definition: ad7779.c:990
int32_t ad7779_init(ad7779_dev **device, ad7779_init_param init_param)
Definition: ad7779.c:1487
int32_t ad7779_spi_int_reg_read_mask(ad7779_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t *data)
Definition: ad7779.c:174
Header file of utility functions.
ad7779_ref_buf_op_mode
Definition: ad7779.h:217
struct no_os_gpio_desc * gpio_dclk2
Definition: ad7779.h:259
#define AD7779_DCLK_CLK_DIV(x)
Definition: ad7779.h:123
int32_t ad7779_get_spi_op_mode(ad7779_dev *dev, ad7779_spi_op_mode *mode)
Definition: ad7779.c:321
@ AD7779_SAR_CONV
Definition: ad7779.h:163
int32_t ad7779_do_spi_soft_reset(ad7779_dev *dev)
Definition: ad7779.c:1410
int32_t ad7779_get_gain(ad7779_dev *dev, ad7779_ch ch, ad7779_gain *gain)
Definition: ad7779.c:563
#define AD7771_FILTER_MODE
Definition: ad7779.h:109
int32_t no_os_gpio_direction_output(struct no_os_gpio_desc *desc, uint8_t value)
Enable the output direction of the specified GPIO.
Definition: no_os_gpio.c:153
@ AD7779_AREG2CAP_AVSSX_ATT
Definition: ad7779.h:231
@ AD7779_DCLK_DIV_4
Definition: ad7779.h:192
@ AD7779_DCLK_DIV_16
Definition: ad7779.h:194
@ AD7779_REF_OUT_AVSSX
Definition: ad7779.h:228
@ AD7779_HIGH_RES
Definition: ad7779.h:202
@ AD7779_CH4
Definition: ad7779.h:171
#define AD7779_REG_BUFFER_CONFIG_1
Definition: ad7779.h:65
@ AD7779_REF_BUF_ENABLED
Definition: ad7779.h:218
#define AD7779_REF_MUX_CTRL(x)
Definition: ad7779.h:126
uint32_t gain_corr[8]
Definition: ad7779.h:275
int32_t ad7779_get_sar_cfg(ad7779_dev *dev, ad7779_state *state, ad7779_sar_mux *mux)
Definition: ad7779.c:1325
#define AD7779_SAR_DIAG_MODE_EN
Definition: ad7779.h:110
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:131