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parameters.h
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1/***************************************************************************/
39#ifndef _PARAMETERS_H_
40#define _PARAMETERS_H_
41
42/******************************************************************************/
43/***************************** Include Files **********************************/
44/******************************************************************************/
45#include "xparameters.h"
46#include "xilinx_gpio.h"
47#include "app_config.h"
48#include "xilinx_spi.h"
49
50
51/******************************************************************************/
52/********************** Macros and Constants Definitions **********************/
53/******************************************************************************/
54#ifdef _XPARAMETERS_PS_H_
55#ifdef XPS_BOARD_ZCU102
56#define GPIO_OFFSET 78
57
58#define GPIO_DEVICE_ID XPAR_PSU_GPIO_0_DEVICE_ID
59#define SPI_DEVICE_ID XPAR_PSU_SPI_0_DEVICE_ID
60#define UART_DEVICE_ID XPAR_PSU_UART_0_DEVICE_ID
61#define UART_IRQ_ID XPAR_XUARTPS_0_INTR
62#else
63#define GPIO_OFFSET 54
64#endif
65
66#define DDR_MEM_BASEADDR XPAR_DDR_MEM_BASEADDR
67#else
68#define GPIO_OFFSET 0
69
70#define GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID
71#define SPI_DEVICE_ID XPAR_SPI_0_DEVICE_ID
72#define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR
73
74#define DDR_MEM_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR
75#endif
76
77#define RX_JESD_BASEADDR XPAR_AXI_JESD204_RX_0_BASEADDR
78#define TX_JESD_BASEADDR XPAR_AXI_JESD204_TX_0_BASEADDR
79//#define RX_OS_JESD_BASEADDR XPAR_AXI_AD9371_RX_OS_JESD_RX_AXI_BASEADDR
80
81#define RX_XCVR_BASEADDR XPAR_AXI_ADRV904X_RX_XCVR_BASEADDR
82#define TX_XCVR_BASEADDR XPAR_AXI_ADRV904X_TX_XCVR_BASEADDR
83//#define RX_OS_XCVR_BASEADDR XPAR_AXI_AD9371_RX_OS_XCVR_BASEADDR
84
85#define RX_CORE_BASEADDR XPAR_AD_IP_JESD204_TPL_ADC_0_BASEADDR
86#define TX_CORE_BASEADDR XPAR_AD_IP_JESD204_TPL_DAC_0_BASEADDR
87//#define RX_OS_CORE_BASEADDR XPAR_RX_OS_AD9371_TPL_CORE_ADC_TPL_CORE_BASEADDR
88
89#define RX_DMA_BASEADDR XPAR_AXI_ADRV904X_RX_DMA_BASEADDR
90#define TX_DMA_BASEADDR XPAR_AXI_ADRV904X_TX_DMA_BASEADDR
91
92
93#define RX_CLKGEN_BASEADDR XPAR_AXI_ADRV904X_RX_CLKGEN_BASEADDR
94#define TX_CLKGEN_BASEADDR XPAR_AXI_ADRV904X_TX_CLKGEN_BASEADDR
95#ifdef XPAR_AXI_ADRV904X_RX_OS_CLKGEN_BASEADDR
96#define ORX_CLKGEN_BASEADDR XPAR_AXI_ADRV904X_RX_OS_CLKGEN_BASEADDR
97#endif
98
99#if defined(DMA_EXAMPLE) || defined(IIO_EXAMPLE)
100#define DAC_BUFFER_SAMPLES 8192
101#define ADC_BUFFER_SAMPLES 32768
102#define ADC_CHANNELS 8
103#endif
104
105#define AD9528_CS 1
106#define ADRV9040_CS 0
107
108#define DAC_GPIO_PLDDR_BYPASS (GPIO_OFFSET + 70)
109#define AD9528_RESET_B (GPIO_OFFSET + 69)
110#define AD9528_SYSREF_REQ (GPIO_OFFSET + 68)
111#define ADRV9040_RESET_B (GPIO_OFFSET + 56)
112
113extern struct xil_spi_init_param spi_extra;
115
116#endif
struct xil_gpio_init_param xil_gpio_param
Definition parameters.c:42
const struct xil_spi_init_param spi_extra
Definition ad5758_sdz.c:49
Structure holding the initialization parameters for Xilinx platform specific GPIO parameters.
Definition xilinx_gpio.h:56
Structure holding the initialization parameters for Xilinx platform specific SPI parameters when usin...
Definition xilinx_spi.h:60