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39 #ifndef __MAX14001_H__
40 #define __MAX14001_H__
54 #define MAX14001_REG_READ(x) (((x) << 11) & NO_OS_GENMASK(15, 11))
55 #define MAX14001_REG_WRITE(x,y) (MAX14001_REG_READ(x) | \
57 (y & MAX14001_REG_DATA_MASK))
58 #define MAX14001_REG_DATA_MASK NO_OS_GENMASK(9, 0)
59 #define VERIFICATION_REG(x) ((x) + 0x10)
60 #define MAX14001_SPI_REG_WRITE_ENABLE 0x294
61 #define MAX14001_SPI_REG_WRITE_DISABLE 0x000
66 #define MAX14001_ADC_REG 0x00
67 #define MAX14001_FADC_REG 0x01
68 #define MAX14001_FLAGS_REG 0x02
69 #define MAX14001_FLTEN_REG 0x03
70 #define MAX14001_THL_REG 0x04
71 #define MAX14001_THU_REG 0x05
72 #define MAX14001_INRR_REG 0x06
73 #define MAX14001_INRT_REG 0x07
74 #define MAX14001_INRP_REG 0x08
75 #define MAX14001_CFG_REG 0x09
76 #define MAX14001_ENBL_REG 0x0A
77 #define MAX14001_ACT_REG 0x0B
78 #define MAX14001_WEN_REG 0x0C
79 #define MAX14001_FLTV_REG 0x13
80 #define MAX14001_THLV_REG 0x14
81 #define MAX14001_THUV_REG 0x15
82 #define MAX14001_INRRV_REG 0x16
83 #define MAX14001_INRTV_REG 0x17
84 #define MAX14001_INRPV_REG 0x18
85 #define MAX14001_CFGV_REG 0x19
86 #define MAX14001_ENBLV_REG 0x1A
93 #define MAX14001_RSET_MASK NO_OS_BIT(7)
96 #define MAX14001_SRES_MASK NO_OS_BIT(6)
99 #define MAX14001_INPLS_MASK NO_OS_BIT(9)
104 #define MAX14001_ADC_FLAG_MASK NO_OS_BIT(1)
105 #define MAX14001_INRD_FLAG_MASK NO_OS_BIT(2)
106 #define MAX14001_SPI_FLAG_MASK NO_OS_BIT(3)
107 #define MAX14001_COM_FLAG_MASK NO_OS_BIT(4)
108 #define MAX14001_CRCL_FLAG_MASK NO_OS_BIT(5)
109 #define MAX14001_CRCF_FLAG_MASK NO_OS_BIT(6)
110 #define MAX14001_FET_FLAG_MASK NO_OS_BIT(7)
111 #define MAX14001_MV_FLAG_MASK NO_OS_BIT(8)
116 #define MAX14001_DYEN_FLTEN_MASK NO_OS_BIT(0)
117 #define MAX14001_EADC_FLTEN_MASK NO_OS_BIT(1)
118 #define MAX14001_EINRD_FLTEN_MASK NO_OS_BIT(2)
119 #define MAX14001_ESPI_FLTEN_MASK NO_OS_BIT(3)
120 #define MAX14001_ECOM_FLTEN_MASK NO_OS_BIT(4)
121 #define MAX14001_ECRCL_FLTEN_MASK NO_OS_BIT(5)
122 #define MAX14001_ECRCF_FLTEN_MASK NO_OS_BIT(6)
123 #define MAX14001_EFET_FLTEN_MASK NO_OS_BIT(7)
124 #define MAX14001_EMV_FLTEN_MASK NO_OS_BIT(8)
129 #define MAX14001_IINR_INRP_MASK NO_OS_GENMASK(9, 6)
130 #define MAX14001_IINR_INRP_MODE(a) ((MAX14001_IINR(a)) << 6)
131 #define MAX14001_TINR_INRP_MASK NO_OS_GENMASK(5, 2)
132 #define MAX14001_TINR_INRP_MODE(a) ((MAX14001_TINR(a)) << 2)
133 #define MAX14001_DU_INRP_MASK NO_OS_GENMASK(1, 0)
134 #define MAX14001_DU_INRP_MODE(a) (((a) & 0x3) << 0)
139 #define MAX14001_IBIAS_CFG_MASK NO_OS_GENMASK(9, 6)
140 #define MAX14001_IBIAS_CFG_MODE(a) ((MAX14001_IBIAS(a)) << 6)
141 #define MAX14001_EXRF_CFG_MASK NO_OS_BIT(5)
142 #define MAX14001_EXTI_CFG_MASK NO_OS_BIT(4)
143 #define MAX14001_FT_CFG_MASK NO_OS_GENMASK(3, 2)
144 #define MAX14001_FT_CFG_MODE(a) (((a) & 0x3) << 2)
145 #define MAX14001_FAST_CFG_MASK NO_OS_BIT(1)
146 #define MAX14001_IRAW_CFG_MASK NO_OS_BIT(0)
151 #define MAX14001_ENA_ENBL_MASK NO_OS_BIT(4)
156 #define REVERSE_UINT16(x) ((((x >> 0) & 1) << 15) | \
157 (((x >> 1) & 1 ) << 14) | \
158 (((x >> 2) & 1 ) << 13) | \
159 (((x >> 3) & 1 ) << 12) | \
160 (((x >> 4) & 1 ) << 11) | \
161 (((x >> 5) & 1 ) << 10) | \
162 (((x >> 6) & 1 ) << 9) | \
163 (((x >> 7) & 1 ) << 8) | \
164 (((x >> 8) & 1 ) << 7) | \
165 (((x >> 9) & 1 ) << 6) | \
166 (((x >> 10) & 1) << 5) | \
167 (((x >> 11) & 1) << 4) | \
168 (((x >> 12) & 1) << 3) | \
169 (((x >> 13) & 1) << 2) | \
170 (((x >> 14) & 1) << 1) | \
171 (((x >> 15) & 1) << 0))
176 #define MAX14001_CFG_MIN 0
177 #define MAX14001_CFG_MAX 0xF
178 #define MAX14001_CFG_Q(x,y) (no_os_clamp( \
179 NO_OS_DIV_ROUND_CLOSEST(x,y), \
180 (MAX14001_CFG_MIN),(MAX14001_CFG_MAX)))
184 #define MAX14001_TINR_INC 8 //in terms of ms
185 #define MAX14001_TINR(x) MAX14001_CFG_Q(x, MAX14001_TINR_INC)
190 #define MAX14001_IINR_INC 7 //in terms of mA
191 #define MAX14001_IINR(x) MAX14001_CFG_Q(x, MAX14001_IINR_INC)
196 #define MAX14001_MUL 100
197 #define MAX14001_IBIAS_INC 25 //increment of 0.25mA
198 #define MAX14001_IBIAS(x) MAX14001_CFG_Q((int)(x*MAX14001_MUL), \
#define MAX14001_MV_FLAG_MASK
Definition: max14001.h:111
int max14001_wen(struct max14001_dev *dev, bool write_enable)
Enable write to registers.
Definition: max14001.c:308
void no_os_put_unaligned_be16(uint16_t val, uint8_t *buf)
#define MAX14001_ENA_ENBL_MASK
Definition: max14001.h:151
@ AVERAGE_8_READINGS
Definition: max14001.h:224
int max14001_iraw_config(struct max14001_dev *dev, bool raw_data)
Selects Inrush comparator input multiplexer.
Definition: max14001.c:502
#define MAX14001_CFG_REG
Definition: max14001.h:75
#define MAX14001_REG_WRITE(x, y)
Definition: max14001.h:55
int max14001_wen(struct max14001_dev *dev, bool enable)
Enable write to registers.
Definition: max14001.c:308
#define MAX14001_ADC_REG
Definition: max14001.h:66
#define MAX14001_FT_CFG_MODE(a)
Definition: max14001.h:144
#define MAX14001_WEN_REG
Definition: max14001.h:78
#define MAX14001_REG_DATA_MASK
Definition: max14001.h:58
int max14001_iraw_config(struct max14001_dev *dev, bool raw_data)
Selects Inrush comparator input multiplexer.
Definition: max14001.c:502
Definition: max14001.h:227
int32_t no_os_spi_write_and_read(struct no_os_spi_desc *desc, uint8_t *data, uint16_t bytes_number)
Write and read data to/from SPI.
Definition: no_os_spi.c:165
int max14001_get_data_filtered(struct max14001_dev *dev, uint16_t *data)
Get filtered adc data.
Definition: max14001.c:661
Header file of SPI Interface.
max14001_du
MAX14001 list of possible duty cycle modes.
Definition: max14001.h:209
#define MAX14001_EXTI_CFG_MASK
Definition: max14001.h:142
int max14001_ecrcf_config(struct max14001_dev *dev, bool mode)
Enable CRCF fault.
Definition: max14001.c:382
#define MAX14001_FT_CFG_MASK
Definition: max14001.h:143
int max14001_iinr_config(struct max14001_dev *dev, int mode)
Configure 4-bit inrush current.
Definition: max14001.c:577
#define MAX14001_IRAW_CFG_MASK
Definition: max14001.h:146
int max14001_ft_config(struct max14001_dev *dev, enum max14001_ft mode)
Set number of readings averaged in the ADC filter.
Definition: max14001.c:630
int max14001_full_reset(struct max14001_dev *dev)
Full reset, same effect as power on reset.
Definition: max14001.c:320
int max14001_reg_update(struct max14001_dev *dev, uint8_t reg_addr, uint16_t mask, uint16_t data)
SPI write to device using a mask.
Definition: max14001.c:131
#define MAX14001_SRES_MASK
Definition: max14001.h:96
int max14001_ibias_config(struct max14001_dev *dev, float mode)
Configure 4-bit bias current.
Definition: max14001.c:612
#define MAX14001_SPI_REG_WRITE_ENABLE
Definition: max14001.h:60
#define MAX14001_ECOM_FLTEN_MASK
Definition: max14001.h:120
Header file of Delay functions.
#define MAX14001_IINR_INRP_MODE(a)
Definition: max14001.h:130
int max14001_read(struct max14001_dev *dev, uint8_t reg_addr, uint16_t *reg_data)
Read from device.
Definition: max14001.c:61
#define MAX14001_FLTV_REG
Definition: max14001.h:79
#define MAX14001_TINR_INRP_MASK
Definition: max14001.h:131
max14001_ft
MAX14001 list of possible filtering modes.
Definition: max14001.h:220
int max14001_init(struct max14001_dev **device, struct max14001_init_param init_param)
Initialize the device.
Definition: max14001.c:196
enum no_os_spi_mode mode
Definition: no_os_spi.h:139
int max14001_emv_config(struct max14001_dev *dev, bool mode)
Enable MV fault.
Definition: max14001.c:352
Definition: ad9361_util.h:75
int max14001_inpls_reset(struct max14001_dev *dev)
Trigger an inrush current pulse.
Definition: max14001.c:340
int max14001_einrd_config(struct max14001_dev *dev, bool mode)
Enable INRD fault.
Definition: max14001.c:442
int max14001_write(struct max14001_dev *dev, uint8_t reg_addr, uint16_t reg_data)
Write to device.
Definition: max14001.c:103
int max14001_write_config_verify(struct max14001_dev *dev, uint8_t reg_addr, uint16_t mask, uint16_t data)
Write to config registers then to corresponding verification register.
Definition: max14001.c:162
int max14001_init(struct max14001_dev **device, struct max14001_init_param init_param)
Initialize the device.
Definition: max14001.c:196
int max14001_emv_config(struct max14001_dev *dev, bool mode)
Enable MV fault.
Definition: max14001.c:352
#define MAX14001_DU_INRP_MASK
Definition: max14001.h:133
void * no_os_calloc(size_t nitems, size_t size)
Allocate memory and return a pointer to it, set memory to 0.
Definition: chibios_alloc.c:60
struct no_os_spi_desc * spi_desc
Definition: max14001.h:229
#define MAX14001_FLAGS_REG
Definition: max14001.h:68
@ AVERAGE_2_READINGS
Definition: max14001.h:222
#define MAX14001_IBIAS_CFG_MODE(a)
Definition: max14001.h:140
int max14001_exrf_config(struct max14001_dev *dev, bool mode)
Selects the voltage reference source for the ADC.
Definition: max14001.c:532
#define MAX14001_ACT_REG
Definition: max14001.h:77
int max14001_exti_config(struct max14001_dev *dev, bool mode)
Current source connection.
Definition: max14001.c:547
#define MAX14001_EINRD_FLTEN_MASK
Definition: max14001.h:118
#define MAX14001_SPI_REG_WRITE_DISABLE
Definition: max14001.h:61
int max14001_du_config(struct max14001_dev *dev, enum max14001_du mode)
Set maximum duty cycle for inrush current over the last 10 seconds.
Definition: max14001.c:595
void no_os_mdelay(uint32_t msecs)
Wait until msecs milliseconds passed.
Definition: aducm3029_delay.c:132
int max14001_get_data_raw(struct max14001_dev *dev, uint16_t *data)
Get adc data.
Definition: max14001.c:647
int max14001_init_config(struct max14001_dev *dev)
Initialize the configurations of device.
Definition: max14001.c:228
int max14001_ecrcl_config(struct max14001_dev *dev, bool mode)
Enable CRCL fault.
Definition: max14001.c:397
int max14001_ena_config(struct max14001_dev *dev, bool enable)
Enable/Disable field-side current sink.
Definition: max14001.c:517
int max14001_iinr_config(struct max14001_dev *dev, int mode)
Configure 4-bit inrush current.
Definition: max14001.c:577
int max14001_ft_config(struct max14001_dev *dev, enum max14001_ft mode)
Set number of readings averaged in the ADC filter.
Definition: max14001.c:630
int max14001_du_config(struct max14001_dev *dev, enum max14001_du mode)
Set maximum duty cycle for inrush current over the last 10 seconds.
Definition: max14001.c:595
int max14001_get_data_raw(struct max14001_dev *dev, uint16_t *data)
Get adc data.
Definition: max14001.c:647
int max14001_reg_update(struct max14001_dev *dev, uint8_t reg_addr, uint16_t mask, uint16_t data)
SPI write to device using a mask.
Definition: max14001.c:131
int max14001_init_config(struct max14001_dev *dev)
Initialize the configurations of device.
Definition: max14001.c:228
int max14001_tinr_config(struct max14001_dev *dev, int mode)
Configure 4-bit inrush time.
Definition: max14001.c:562
int max14001_ecrcl_config(struct max14001_dev *dev, bool mode)
Enable CRCL fault.
Definition: max14001.c:397
int max14001_read(struct max14001_dev *dev, uint8_t reg_addr, uint16_t *reg_data)
Read from device.
Definition: max14001.c:61
#define MAX14001_EXRF_CFG_MASK
Definition: max14001.h:141
@ DUTY_6P3
Definition: max14001.h:213
int max14001_ecom_config(struct max14001_dev *dev, bool mode)
Enable COM fault.
Definition: max14001.c:412
int max14001_exrf_config(struct max14001_dev *dev, bool mode)
Selects the voltage reference source for the ADC.
Definition: max14001.c:532
#define MAX14001_ECRCF_FLTEN_MASK
Definition: max14001.h:122
int max14001_tinr_config(struct max14001_dev *dev, int mode)
Configure 4-bit inrush time.
Definition: max14001.c:562
int max14001_reg_reset(struct max14001_dev *dev)
Software reset. Restores all registers to their POR value.
Definition: max14001.c:330
int max14001_inpls_reset(struct max14001_dev *dev)
Trigger an inrush current pulse.
Definition: max14001.c:340
#define MAX14001_TINR_INRP_MODE(a)
Definition: max14001.h:132
int max14001_write_config_verify(struct max14001_dev *dev, uint8_t reg_addr, uint16_t mask, uint16_t data)
Write to config registers then to corresponding verification register.
Definition: max14001.c:162
int max14001_ecom_config(struct max14001_dev *dev, bool mode)
Enable COM fault.
Definition: max14001.c:412
int max14001_ena_config(struct max14001_dev *dev, bool enable)
Enable/Disable field-side current sink.
Definition: max14001.c:517
@ AVERAGE_4_READINGS
Definition: max14001.h:223
#define REVERSE_UINT16(x)
Definition: max14001.h:156
Structure holding SPI descriptor.
Definition: no_os_spi.h:177
int max14001_ecrcf_config(struct max14001_dev *dev, bool mode)
Enable CRCF fault.
Definition: max14001.c:382
#define MAX14001_DU_INRP_MODE(a)
Definition: max14001.h:134
@ DUTY_1P6
Definition: max14001.h:211
int max14001_remove(struct max14001_dev *dev)
Free the resources allocated by max14001_init().
Definition: max14001.c:674
#define MAX14001_REG_READ(x)
Definition: max14001.h:54
#define MAX14001_ESPI_FLTEN_MASK
Definition: max14001.h:119
int max14001_remove(struct max14001_dev *dev)
Free the resources allocated by max14001_init().
Definition: max14001.c:674
#define MAX14001_INRP_REG
Definition: max14001.h:74
int max14001_einrd_config(struct max14001_dev *dev, bool mode)
Enable INRD fault.
Definition: max14001.c:442
int max14001_write(struct max14001_dev *dev, uint8_t reg_addr, uint16_t reg_data)
Write to device.
Definition: max14001.c:103
Implementation of max14001.h.
int max14001_espi_config(struct max14001_dev *dev, bool mode)
Enable SPI fault.
Definition: max14001.c:427
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:75
int max14001_get_data_filtered(struct max14001_dev *dev, uint16_t *data)
Get filtered adc data.
Definition: max14001.c:661
int max14001_eadc_config(struct max14001_dev *dev, bool mode)
Enable ADC fault.
Definition: max14001.c:457
struct no_os_spi_init_param spi_init
Definition: max14001.h:234
#define MAX14001_ENBL_REG
Definition: max14001.h:76
#define MAX14001_IINR_INRP_MASK
Definition: max14001.h:129
#define MAX14001_ECRCL_FLTEN_MASK
Definition: max14001.h:121
#define MAX14001_EADC_FLTEN_MASK
Definition: max14001.h:117
#define VERIFICATION_REG(x)
Definition: max14001.h:59
#define MAX14001_INPLS_MASK
Definition: max14001.h:99
int max14001_full_reset(struct max14001_dev *dev)
Full reset, same effect as power on reset.
Definition: max14001.c:320
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:119
@ DUTY_OFF
Definition: max14001.h:210
#define MAX14001_IBIAS_CFG_MASK
Definition: max14001.h:139
int max14001_ibias_config(struct max14001_dev *dev, float mode)
Configure 4-bit bias current.
Definition: max14001.c:612
int max14001_fast_config(struct max14001_dev *dev, bool fast)
Enable/Disable fast inrush mode.
Definition: max14001.c:487
#define MAX14001_DYEN_FLTEN_MASK
Definition: max14001.h:116
#define MAX14001_EFET_FLTEN_MASK
Definition: max14001.h:123
int max14001_dyen_config(struct max14001_dev *dev, bool mode)
Enable dynamic FAULT signal.
Definition: max14001.c:472
int32_t no_os_spi_remove(struct no_os_spi_desc *desc)
Free the resources allocated by no_os_spi_init().
Definition: no_os_spi.c:122
int max14001_efet_config(struct max14001_dev *dev, bool mode)
Enable FET fault.
Definition: max14001.c:367
@ FILTER_OFF
Definition: max14001.h:221
Header file of GPIO Interface.
int max14001_fast_config(struct max14001_dev *dev, bool fast)
Enable/Disable fast inrush mode.
Definition: max14001.c:487
int max14001_eadc_config(struct max14001_dev *dev, bool mode)
Enable ADC fault.
Definition: max14001.c:457
#define MAX14001_FLTEN_REG
Definition: max14001.h:69
#define MAX14001_ENBLV_REG
Definition: max14001.h:86
int32_t no_os_spi_init(struct no_os_spi_desc **desc, const struct no_os_spi_init_param *param)
Initialize the SPI communication peripheral.
Definition: no_os_spi.c:58
uint16_t no_os_get_unaligned_be16(uint8_t *buf)
int max14001_reg_reset(struct max14001_dev *dev)
Software reset. Restores all registers to their POR value.
Definition: max14001.c:330
Header file of utility functions.
#define MAX14001_EMV_FLTEN_MASK
Definition: max14001.h:124
#define MAX14001_FADC_REG
Definition: max14001.h:67
int max14001_espi_config(struct max14001_dev *dev, bool mode)
Enable SPI fault.
Definition: max14001.c:427
Definition: max14001.h:232
int max14001_exti_config(struct max14001_dev *dev, bool mode)
Current source connection.
Definition: max14001.c:547
int max14001_dyen_config(struct max14001_dev *dev, bool mode)
Enable dynamic FAULT signal.
Definition: max14001.c:472
int max14001_efet_config(struct max14001_dev *dev, bool mode)
Enable FET fault.
Definition: max14001.c:367
#define MAX14001_RSET_MASK
Definition: max14001.h:93
@ DUTY_3P1
Definition: max14001.h:212
#define MAX14001_FAST_CFG_MASK
Definition: max14001.h:145
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:131