no-OS
spi_engine_private.h
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1 /*******************************************************************************
2  * @file spi_engine_private.h
3  * @brief Private definitions of the SPI Engine
4  * @author Sergiu Cuciurean (sergiu.cuciurean@analog.com)
5 ********************************************************************************
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38 *******************************************************************************/
39 
40 #ifndef SPI_ENGINE_PRIVATE_H
41 #define SPI_ENGINE_PRIVATE_H
42 
43 #include <stdint.h>
44 #include <stdbool.h>
45 
46 #include "no_os_spi.h"
47 #include "no_os_util.h"
48 
49 /******************************************************************************/
50 /*************************** Spi Engine registers *****************************/
51 /******************************************************************************/
52 
53 #define SPI_ENGINE_REG_VERSION 0x00
54 #define SPI_ENGINE_REG_DATA_WIDTH 0x0C
55 #define SPI_ENGINE_REG_RESET 0x40
56 #define SPI_ENGINE_REG_INT_ENABLE 0x80
57 #define SPI_ENGINE_REG_INT_PENDING 0x84
58 #define SPI_ENGINE_REG_INT_SOURCE 0x88
59 #define SPI_ENGINE_REG_SYNC_ID 0xC0
60 #define SPI_ENGINE_REG_CMD_FIFO_ROOM 0xD0
61 #define SPI_ENGINE_REG_SDO_FIFO_ROOM 0xD4
62 #define SPI_ENGINE_REG_SDI_FIFO_LEVEL 0xD8
63 #define SPI_ENGINE_REG_CMD_FIFO 0xE0
64 #define SPI_ENGINE_REG_SDO_DATA_FIFO 0xE4
65 #define SPI_ENGINE_REG_SDI_DATA_FIFO 0xE8
66 #define SPI_ENGINE_REG_SDI_DATA_FIFO_PEEK 0xEC
67 
68 /******************************************************************************/
69 /************************ Spi Engine register parameters **********************/
70 /******************************************************************************/
71 
72 #define SPI_ENGINE_INST_TRANSFER 0x00
73 #define SPI_ENGINE_INST_ASSERT 0x01
74 #define SPI_ENGINE_INST_CONFIG 0x02
75 #define SPI_ENGINE_INST_SYNC_SLEEP 0x03
76 #define SPI_ENGINE_INST_MISC 0x03
77 #define SPI_ENGINE_CMD_REG_CLK_DIV 0x00
78 #define SPI_ENGINE_CMD_REG_CONFIG 0x01
79 #define SPI_ENGINE_CMD_DATA_TRANSFER_LEN 0x02
80 #define SPI_ENGINE_MISC_SYNC 0x00
81 #define SPI_ENGINE_MISC_SLEEP 0x01
82 #define SPI_ENGINE_SYNC_TRANSFER_BEGIN NO_OS_BIT(1)
83 #define SPI_ENGINE_SYNC_TRANSFER_END NO_OS_BIT(2)
84 #define SPI_ENGINE_INT_CMD_ALMOST_EMPTY NO_OS_BIT(0)
85 #define SPI_ENGINE_INT_SDO_ALMOST_EMPTY NO_OS_BIT(1)
86 #define SPI_ENGINE_INT_SDI_ALMOST_FULL NO_OS_BIT(2)
87 #define SPI_ENGINE_INT_SYNC NO_OS_BIT(3)
88 #define SPI_ENGINE_OFFLOAD_CTRL_ENABLE NO_OS_BIT(0)
89 #define SPI_ENGINE_OFFLOAD_STATUS_ENABLED NO_OS_BIT(0)
90 #define SPI_ENGINE_CONFIG_CPHA NO_OS_BIT(0)
91 #define SPI_ENGINE_CONFIG_CPOL NO_OS_BIT(1)
92 #define SPI_ENGINE_CONFIG_3WIRE NO_OS_BIT(2)
93 #define SPI_ENGINE_VERSION_MAJOR(x) ((x >> 16) & 0xff)
94 #define SPI_ENGINE_VERSION_MINOR(x) ((x >> 8) & 0xff)
95 #define SPI_ENGINE_VERSION_PATCH(x) (x & 0xff)
96 
97 /******************************************************************************/
98 /**************************** Spi Engine commands *****************************/
99 /******************************************************************************/
100 
101 #define SPI_ENGINE_INSTRUCTION_TRANSFER_W 0x01
102 #define SPI_ENGINE_INSTRUCTION_TRANSFER_R 0x02
103 #define SPI_ENGINE_INSTRUCTION_TRANSFER_RW 0x03
104 
105 #define SPI_ENGINE_REG_OFFLOAD_CTRL(x) (0x100 + (0x20 * x))
106 #define SPI_ENGINE_REG_OFFLOAD_STATUS(x) (0x104 + (0x20 * x))
107 #define SPI_ENGINE_REG_OFFLOAD_RESET(x) (0x108 + (0x20 * x))
108 #define SPI_ENGINE_REG_OFFLOAD_CMD_MEM(x) (0x110 + (0x20 * x))
109 #define SPI_ENGINE_REG_OFFLOAD_SDO_MEM(x) (0x114 + (0x20 * x))
110 
111 #define SPI_ENGINE_CMD(inst, arg1, arg2) \
112  (((inst & 0x03) << 12) | \
113  ((arg1 & 0x03) << 8) | arg2 )
114 
115 #define SPI_ENGINE_CMD_TRANSFER(readwrite, n) \
116  SPI_ENGINE_CMD(SPI_ENGINE_INST_TRANSFER, \
117  (readwrite), (n))
118 
119 #define SPI_ENGINE_CMD_ASSERT(delay, cs) \
120  SPI_ENGINE_CMD(SPI_ENGINE_INST_ASSERT, \
121  (delay), (cs))
122 
123 #define SPI_ENGINE_CMD_CONFIG(reg, val) \
124  SPI_ENGINE_CMD(SPI_ENGINE_INST_CONFIG, \
125  (reg), (val))
126 
127 #define SPI_ENGINE_CMD_SLEEP(delay) \
128  SPI_ENGINE_CMD(SPI_ENGINE_INST_MISC, \
129  SPI_ENGINE_MISC_SLEEP, \
130  (delay))
131 
132 #define SPI_ENGINE_CMD_SYNC(id) \
133  SPI_ENGINE_CMD(SPI_ENGINE_INST_MISC, \
134  SPI_ENGINE_MISC_SYNC, \
135  (id))
136 
137 /******************************************************************************/
138 /*************************** Types Declarations *******************************/
139 /******************************************************************************/
140 
141 typedef struct spi_engine_cmd_queue {
142  uint32_t cmd;
143  struct spi_engine_cmd_queue *next;
144 } spi_engine_cmd_queue;
145 
146 typedef struct spi_engine_msg {
147  uint32_t *tx_buf;
148  uint32_t *rx_buf;
149  uint32_t length;
150  struct spi_engine_cmd_queue *cmds;
151 } spi_engine_msg;
152 
153 #endif // SPI_ENGINE_PRIVATE_H
spi_engine_msg::cmds
struct spi_engine_cmd_queue * cmds
Definition: spi_engine_private.h:150
spi_engine_cmd_queue
Definition: spi_engine_private.h:141
spi_engine_cmd_queue::next
struct spi_engine_cmd_queue * next
Definition: spi_engine_private.h:143
no_os_spi.h
Header file of SPI Interface.
spi_engine_cmd_queue::cmd
uint32_t cmd
Definition: spi_engine_private.h:142
spi_engine_msg::tx_buf
uint32_t * tx_buf
Definition: spi_engine_private.h:147
spi_engine_msg
struct spi_engine_msg spi_engine_msg
spi_engine_msg::rx_buf
uint32_t * rx_buf
Definition: spi_engine_private.h:148
spi_engine_msg::length
uint32_t length
Definition: spi_engine_private.h:149
spi_engine_cmd_queue
struct spi_engine_cmd_queue spi_engine_cmd_queue
no_os_util.h
Header file of utility functions.
spi_engine_msg
Definition: spi_engine_private.h:146
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