FMCDAQ3 no-OS Example Project

See projects/fmcdaq3 (doxygen) for the Doxygen documentation.

Supported Evaluation Boards

Overview

The AD-FMCDAQ3-EBZ evaluation board is a high-speed data acquisition system designed for interfacing with FPGA boards like the Xilinx ZCU102. Equipped with an AD9680 dual ADC and AD9152 DAC, it utilizes the JESD204B/C transceiver protocol for data transfer. The board supports multiple connectivity options, including SD card slots, USB, and HDMI, allowing for flexible integration in various testing setups. It can handle digital signals at lane rates up to 12.33 Gbps and features independent data paths for transmission and reception. The AD9528 on-board clock generator provides precise synchronization. Configuration is managed through software interfaces compatible with no-OS and Linux platforms, making it adaptable to different project demands.

Applications

  • Electronic test and measurement equipment

  • General-purpose software radios

  • Radar systems

  • Ultra-wideband satellite receivers

  • Signals intelligence (SIGINT)

  • Point to point communication systems

  • DOCSIS 3.0 CMTS and HFC networks

  • Multiple input/multiple output (MIMO) radios

  • Automated test equipment

Hardware Specifications

Power Supply Requirements

The AD-FMCDAQ3-EBZ evaluation board requires a 12V power input, delivered through its power connector, to operate its integrated components. This power supply supports crucial board functions, including the AD9680 ADC, AD9152 DAC, and JESD204B/C interface operations, as well as precise clock generation via the AD9528 clock generator. Additionally, the board's GPIOs manage power states across various sections to enable or disable peripheral features, maintaining energy efficiency and stability during operation.

On-board Connectors

Connector Name

Component

Function/Use

SD Card Slot (J100)

SD Card Interface

Inserting SD card for data storage

AD-FMCDAQ3-EBZ FMC Board

FMC Connector

Connects to the FPGA carrier HPC FMC socket

Display Port Video Connector (J11)

Video Output

Connecting a Display Port monitor

USB 2.0 UPLT Controller (J83)

USB Input

Connecting USB mouse/keyboard

12V Power Input Connector (J52)

Power Supply

Connecting the main power supply

No-OS Supported Examples

This project is organized around the no-OS variant based build flow. Selecting a variant at build time (--variant <name>) chooses which application is compiled. Shared initialization data is defined in src/app.

Demo Example

The demo example initializes the AD9680 ADC, AD9152 DAC, and AD9528 clock generator, configures the JESD204B links, and verifies the link status. The AXI ADC/DAC cores and AXI DMA are initialized for data capture and generation. Pattern tests and a DMA capture are performed.

This example is built by selecting the demo variant (see the Build Command section below).

IIO Example

The IIO example integrates with the Industrial I/O (IIO) framework to facilitate standardized data acquisition and device configuration. It sets up the necessary SPI and GPIO interfaces, configures the AD9528 for clock distribution, and manages data transfers using DMA controllers. The setup includes initializing IIO application descriptors and UART communication, enabling real-time signal processing and interaction with IIO clients. It supports ADC-to-memory data transfers and PRBS tests for data integrity.

If you are not familiar with ADI IIO Application, please take a look at: IIO No-OS

If you are not familiar with ADI IIO-Oscilloscope Client, please take a look at: IIO Oscilloscope

This example is built by selecting the iio variant (see the Build Command section below).

No-OS Supported Platforms

Xilinx

Used Hardware

Connections

Connect the AD-FMCDAQ3-EBZ to the FMC HPC0 socket on the carrier board. The JESD204B serial lanes interface with the FPGA transceivers via the FMC connector. The AD9680, AD9152, and AD9528 are configured over SPI from the FPGA. Connect a micro-USB cable to the carrier board's USB-UART connector for the serial console. The UART console appears at 115200 baud, 8N1.

For the ZCU102, connect the power supply to the 12V Power Input Connector (J52) and enable SD Card boot mode by switching SW6 to:

Switch

State

SW6-1

ON

SW6-2

OFF

SW6-3

OFF

SW6-4

OFF

Build Command

The Xilinx platform uses the CMake/Ninja build system via the no_os_build.py helper script. Available variants: demo, iio. Available boards: zc706, zcu102.

For toolchain setup and prerequisites, see the Xilinx CMake build guide.

# source the Vitis environment (adjust path to your Vitis install)
source /path/to/Vitis/2025.1/settings64.sh
# PowerShell (Windows) equivalent:
#   & "<path\to\Vitis\2025.1\settings64.bat"

cd no-OS

# build the iio example on the ZCU102 board (requires a .xsa hardware file)
python tools/scripts/no_os_build.py build \
   --project fmcdaq3 --variant iio --board zcu102 \
   --hardware /path/to/system_top.xsa

# build and flash (requires a connected debug probe)
python tools/scripts/no_os_build.py build \
   --project fmcdaq3 --variant iio --board zcu102 \
   --hardware /path/to/system_top.xsa \
   --probe openocd --flash