no-OS
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Header file of AD4110 Driver. More...
#include <stdint.h>
#include <stdbool.h>
#include "no_os_delay.h"
#include "no_os_gpio.h"
#include "no_os_spi.h"
#include "no_os_irq.h"
Go to the source code of this file.
Classes | |
struct | ad4110_dev |
struct | ad4110_init_param |
struct | ad4110_callback_ctx |
Functions | |
uint8_t | ad4110_compute_crc8 (uint8_t *data, uint8_t data_size) |
uint8_t | ad4110_compute_xor (uint8_t *data, uint8_t data_size) |
int32_t | ad4110_spi_int_reg_write_msk (struct ad4110_dev *dev, uint8_t reg_map, uint8_t reg_addr, uint32_t data, uint16_t mask) |
int32_t | ad4110_set_adc_mode (struct ad4110_dev *dev, enum ad4110_adc_mode mode) |
int32_t | ad4110_set_gain (struct ad4110_dev *dev, enum ad4110_gain gain) |
int32_t | ad4110_set_adc_clk (struct ad4110_dev *dev, enum ad4110_adc_clk_sel clk) |
int32_t | ad4110_set_afe_clk (struct ad4110_dev *dev, enum ad4110_afe_clk_cfg clk) |
int32_t | ad4110_set_reference (struct ad4110_dev *dev, enum ad4110_voltage_reference ref) |
int32_t | ad4110_set_op_mode (struct ad4110_dev *dev, enum ad4110_op_mode mode) |
int32_t | ad4110_spi_do_soft_reset (struct ad4110_dev *dev) |
uint8_t | ad4110_get_data_size (struct ad4110_dev *dev, uint8_t reg_map, uint8_t reg_addr) |
int32_t | ad4110_spi_int_reg_write (struct ad4110_dev *dev, uint8_t reg_map, uint8_t reg_addr, uint32_t reg_data) |
int32_t | ad4110_spi_int_reg_read (struct ad4110_dev *dev, uint8_t reg_map, uint8_t reg_addr, uint32_t *reg_data) |
int32_t | ad4110_continuous_read (struct ad4110_dev *dev, uint32_t *buffer, uint32_t buffer_size) |
int32_t | ad4110_spi_int_data_reg_read (struct ad4110_dev *dev, uint32_t *reg_data) |
int32_t | ad4110_setup (struct ad4110_dev **device, struct ad4110_init_param init_param) |
int | ad4110_set_channel_status (struct ad4110_dev *dev, uint8_t chan_id, bool status) |
Enable/Disable channel. More... | |
int | ad4110_set_analog_input_buffer (struct ad4110_dev *dev, enum ad4110_ain_buffer buffer) |
Assign analog input buffer. More... | |
int | ad4110_set_bipolar (struct ad4110_dev *dev, bool bipolar) |
Set polarity. More... | |
int | ad4110_set_odr (struct ad4110_dev *dev, enum ad4110_odr odr) |
Set Output Data Rate. More... | |
int | ad4110_set_order (struct ad4110_dev *dev, enum ad4110_order order) |
Set Order of Filter. More... | |
int | ad4110_do_single_read (struct ad4110_dev *dev, uint32_t *buffer) |
ADC data read in single conversion mode. More... | |
int | ad4110_wait_for_rdy_low (struct ad4110_dev *dev, uint32_t timeout) |
Wait for RDY bit to go low indicating conversion completion. More... | |
Header file of AD4110 Driver.
Copyright 2021(c) Analog Devices, Inc.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define A4110_ADC 0x00 |
#define A4110_AFE 0x01 |
#define AD4110_ADC_CONV_TIMEOUT 10000 |
#define AD4110_ADC_CRC_EN | ( | x | ) | (((x) & 0x3) << 2) |
#define AD4110_ADC_GAIN0 0xC |
#define AD4110_ADC_GAIN1 0xD |
#define AD4110_ADC_GAIN2 0xE |
#define AD4110_ADC_GAIN3 0xF |
#define AD4110_ADC_MODE | ( | x | ) | (((x) & 0x7) << 4) |
#define AD4110_ADC_OFFSET0 0x8 |
#define AD4110_ADC_OFFSET1 0x9 |
#define AD4110_ADC_OFFSET2 0xA |
#define AD4110_ADC_OFFSET3 0xB |
#define AD4110_AFE_VBIAS | ( | x | ) | (((x) & 0x3) << 6) |
#define AD4110_AFE_VBIAS_DEFAULT_OFF 0x2 |
#define AD4110_AFE_VBIAS_OFF 0x3 |
#define AD4110_AFE_VBIAS_ON 0x1 |
#define AD4110_CMD_READ_COM_REG | ( | x | ) | (0x40 | ((x) & 0xF)) |
#define AD4110_CMD_WR_COM_REG | ( | x | ) | (0x00 | ((x) & 0xF)) |
#define AD4110_CRC8_POLY 0x07 |
#define AD4110_DATA_STAT_EN (1 << 6) |
#define AD4110_DEV_ADDR_MASK (0x30) |
#define AD4110_REG_ADC_CLK_SEL | ( | x | ) | (((x) & 0x3) << 2) |
#define AD4110_REG_ADC_CONFIG 0x3 |
#define AD4110_REG_ADC_CONFIG_AIN_BUFF | ( | x | ) | ((((x) & 0x3) << 8)) |
#define AD4110_REG_ADC_CONFIG_BI_UNIPOLAR (1 << 12) |
#define AD4110_REG_ADC_CONFIG_BIT_6 (1 << 6) |
#define AD4110_REG_ADC_CONFIG_CHAN_EN_0 (1 << 0) |
#define AD4110_REG_ADC_CONFIG_CHAN_EN_1 (1 << 1) |
#define AD4110_REG_ADC_CONFIG_CHAN_EN_2 (1 << 2) |
#define AD4110_REG_ADC_CONFIG_CHAN_EN_3 (1 << 3) |
#define AD4110_REG_ADC_CONFIG_CHAN_EN_MSK 0xF |
#define AD4110_REG_ADC_CONFIG_REF_SEL | ( | x | ) | (((x) & 0x3) << 4) |
#define AD4110_REG_ADC_DELAY | ( | x | ) | (((x) & 0x7) << 8) |
#define AD4110_REG_ADC_FILTER_EN_ENH (1 << 11) |
#define AD4110_REG_ADC_FILTER_ODR | ( | x | ) | (((x) & 0x1F) << 0) |
#define AD4110_REG_ADC_FILTER_ORDER | ( | x | ) | (((x) & 0x3) << 5) |
#define AD4110_REG_ADC_FILTER_SEL_ENH | ( | x | ) | (((x) & 0x7) << 8) |
#define AD4110_REG_ADC_GPIO_CONFIG 0x6 |
#define AD4110_REG_ADC_INTERFACE 0x2 |
#define AD4110_REG_ADC_INTERFACE_CRC_EN_MSK 0x0C |
#define AD4110_REG_ADC_INTERFACE_DS_MSK 0x40 |
#define AD4110_REG_ADC_INTERFACE_WL16_MSK 0x01 |
#define AD4110_REG_ADC_MODE 0x1 |
#define AD4110_REG_ADC_MODE_MSK 0x70 |
#define AD4110_REG_ADC_MODE_REF_EN (1 << 15) |
#define AD4110_REG_ADC_STATUS 0x0 |
#define AD4110_REG_ADC_STATUS_RDY (1 << 7) |
#define AD4110_REG_AFE_CAL_DATA 0xC |
#define AD4110_REG_AFE_CLK_CTRL 0x3 |
#define AD4110_REG_AFE_CLK_CTRL_CFG | ( | x | ) | (((x) & 0x3) << 3) |
#define AD4110_REG_AFE_CNTRL1 0x1 |
#define AD4110_REG_AFE_CNTRL1_CRC_EN (1 << 14) |
#define AD4110_REG_AFE_CNTRL1_DISRTD (1 << 9) |
#define AD4110_REG_AFE_CNTRL2 0x4 |
#define AD4110_REG_AFE_CNTRL2_AINN_DN1 (1 << 14) |
#define AD4110_REG_AFE_CNTRL2_AINN_DN100 (1 << 15) |
#define AD4110_REG_AFE_CNTRL2_AINN_UP1 (1 << 12) |
#define AD4110_REG_AFE_CNTRL2_AINN_UP100 (1 << 13) |
#define AD4110_REG_AFE_CNTRL2_AINP_DN1 (1 << 10) |
#define AD4110_REG_AFE_CNTRL2_AINP_DN100 (1 << 11) |
#define AD4110_REG_AFE_CNTRL2_AINP_UP1 (1 << 8) |
#define AD4110_REG_AFE_CNTRL2_AINP_UP100 (1 << 9) |
#define AD4110_REG_AFE_CNTRL2_EN_FLD_PWR_MSK (1 << 3) |
#define AD4110_REG_AFE_CNTRL2_EXT_R_SEL_MSK (1 << 2) |
#define AD4110_REG_AFE_CNTRL2_IMODE_MSK (1 << 1) |
#define AD4110_REG_AFE_DETAIL_STATUS 0x7 |
#define AD4110_REG_AFE_ERR_DIS_AIN_OC (1 << 1) |
#define AD4110_REG_AFE_ERR_DIS_AINN_OV (1 << 9) |
#define AD4110_REG_AFE_ERR_DIS_AINN_UV (1 << 11) |
#define AD4110_REG_AFE_ERR_DIS_AINP_OV (1 << 8) |
#define AD4110_REG_AFE_ERR_DIS_AINP_UV (1 << 10) |
#define AD4110_REG_AFE_ERR_DIS_FLD_PWR_OC (1 << 2) |
#define AD4110_REG_AFE_ERR_DIS_I_COM (1 << 6) |
#define AD4110_REG_AFE_ERR_DIS_I_EXC (1 << 7) |
#define AD4110_REG_AFE_ERR_DISABLE 0x6 |
#define AD4110_REG_AFE_NO_PWR_DEFAULT_SEL 0xE |
#define AD4110_REG_AFE_NO_PWR_DEFAULT_STATUS 0xF |
#define AD4110_REG_AFE_RSENSE_DATA 0xD |
#define AD4110_REG_AFE_TOP_STATUS 0x0 |
#define AD4110_REG_DATA 0x4 |
#define AD4110_REG_FILTER 0x5 |
#define AD4110_REG_GPIO_CONFIG_ERR_EN | ( | x | ) | (((x) & 0x3) << 9) |
#define AD4110_REG_GPIO_CONFIG_SYNC_EN | ( | x | ) | (((x) & 0x1) << 11) |
#define AD4110_REG_ID 0x7 |
#define AD4110_REG_NO_PWR_DEFAULT_SEL_MSK 0xFF |
#define AD4110_REG_PGA_RTD_CTRL 0x5 |
#define AD4110_REG_PGA_RTD_CTRL_23W_EN_MSK (1 << 15) |
#define AD4110_REG_PGA_RTD_CTRL_EXT_RTD (1 << 8) |
#define AD4110_REG_PGA_RTD_CTRL_GAIN_CH | ( | x | ) | (((x) & 0xF) << 4) |
#define AD4110_REG_PGA_RTD_CTRL_GAIN_CH_MSK 0xF0 |
#define AD4110_REG_PGA_RTD_CTRL_I_COM_SEL | ( | x | ) | (((x) & 0x7) << 12) |
#define AD4110_REG_PGA_RTD_CTRL_I_EXC_SEL | ( | x | ) | (((x) & 0x7) << 9) |
enum ad4110_adc_clk_sel |
enum ad4110_adc_crc_mode |
enum ad4110_adc_mode |
enum ad4110_afe_clk_cfg |
enum ad4110_afe_crc_mode |
enum ad4110_ain_buffer |
enum ad4110_gain |
enum ad4110_odr |
enum ad4110_op_mode |
enum ad4110_order |
enum ad4110_state |
enum ad4110_sync_en |
uint8_t ad4110_compute_crc8 | ( | uint8_t * | data, |
uint8_t | data_size | ||
) |
Compute CRC8 checksum.
data | - The data buffer. |
data_size | - The size of the data buffer. |
uint8_t ad4110_compute_xor | ( | uint8_t * | data, |
uint8_t | data_size | ||
) |
Compute XOR checksum.
data | - The data buffer. |
data_size | - The size of the data buffer. |
int32_t ad4110_continuous_read | ( | struct ad4110_dev * | dev, |
uint32_t * | buffer, | ||
uint32_t | buffer_size | ||
) |
ADC continuous read fills buffer with buffer_size number of samples.
dev | - The device structure. |
buffer | - The buffer. |
buffer_size | - The buffer size = number of samples. |
int ad4110_do_single_read | ( | struct ad4110_dev * | dev, |
uint32_t * | buffer | ||
) |
ADC data read in single conversion mode.
dev | - The device structure. |
buffer | - The data buffer. |
uint8_t ad4110_get_data_size | ( | struct ad4110_dev * | dev, |
uint8_t | reg_map, | ||
uint8_t | reg_addr | ||
) |
Get the data size of a specified register.
dev | - The device structure. |
reg_map | - The register map. Accepted values: A4110_ADC A4110_AFE |
reg_addr | - The register address. |
int32_t ad4110_set_adc_clk | ( | struct ad4110_dev * | dev, |
enum ad4110_adc_clk_sel | clk | ||
) |
Set ADC clock.
dev | - The device structure. |
clk | - The clock mode. Accepted values: AD4110_ADC_INT_CLK AD4110_ADC_INT_CLK_CLKIO AD4110_ADC_EXT_CLK |
int32_t ad4110_set_adc_mode | ( | struct ad4110_dev * | dev, |
enum ad4110_adc_mode | mode | ||
) |
Set the mode of the ADC.
dev | - The device structure. |
mode | - The ADC mode Accepted values: AD4110_CONTINOUS_CONV_MODE AD4110_SINGLE_CONV_MODE AD4110_STANDBY_MODE AD4110_PW_DOWN_MODE AD4110_SYS_OFFSET_CAL AD4110_SYS_GAIN_CAL |
int32_t ad4110_set_afe_clk | ( | struct ad4110_dev * | dev, |
enum ad4110_afe_clk_cfg | clk | ||
) |
Set AFE clock.
dev | - The device structure. |
clk | - The clock mode. Accepted values: AD4110_AFE_INT_CLOCK AD4110_AFE_ADC_CLOCKED |
int ad4110_set_analog_input_buffer | ( | struct ad4110_dev * | dev, |
enum ad4110_ain_buffer | buffer | ||
) |
Assign analog input buffer.
dev | - The device structure. |
buffer | - Choice of analog input buffer to be set |
int ad4110_set_bipolar | ( | struct ad4110_dev * | dev, |
bool | bipolar | ||
) |
Set polarity.
dev | - The device structure. |
bipolar | - True in case of Bipolar/ False in case of Unipolar |
int ad4110_set_channel_status | ( | struct ad4110_dev * | dev, |
uint8_t | chan_id, | ||
bool | status | ||
) |
Enable/Disable channel.
dev | - The device structure. |
chan_id | - Channel ID (number) |
status | - Channel Status (True for Enable and False for Disable) |
int32_t ad4110_set_gain | ( | struct ad4110_dev * | dev, |
enum ad4110_gain | gain | ||
) |
Set the gain.
dev | - The device structure. |
gain | - The gain value. Accepted values: AD4110_GAIN_0_2 AD4110_GAIN_0_25 AD4110_GAIN_0_3 AD4110_GAIN_0_375 AD4110_GAIN_0_5 AD4110_GAIN_0_75 AD4110_GAIN_1 AD4110_GAIN_1_5 AD4110_GAIN_2 AD4110_GAIN_3 AD4110_GAIN_4 AD4110_GAIN_6 AD4110_GAIN_8 AD4110_GAIN_12 AD4110_GAIN_16 AD4110_GAIN_24 |
int ad4110_set_odr | ( | struct ad4110_dev * | dev, |
enum ad4110_odr | odr | ||
) |
Set Output Data Rate.
dev | - The device structure. |
odr | - Choice of ODR to be set |
int32_t ad4110_set_op_mode | ( | struct ad4110_dev * | dev, |
enum ad4110_op_mode | mode | ||
) |
Set the operation mode.
dev | - The device structure. |
mode | - The operation mode type. Accepted values: AD4110_VOLTAGE_MODE AD4110_CURRENT_MODE AD4110_CURRENT_MODE_EXT_R_SEL AD4110_THERMOCOUPLE AD4110_FLD_POWER_MODE AD4110_RTD_2W_MODE AD4110_RTD_3W_MODE AD4110_RTD_4W_MODE |
int ad4110_set_order | ( | struct ad4110_dev * | dev, |
enum ad4110_order | order | ||
) |
Set Order of Filter.
dev | - The device structure. |
order | - Choice of order to be set |
int32_t ad4110_set_reference | ( | struct ad4110_dev * | dev, |
enum ad4110_voltage_reference | ref | ||
) |
Set the voltage reference.
dev | - The device structure. |
ref | - The voltage reference. Accepted values: AD4110_EXT_REF AD4110_INT_2_5V_REF AD4110_AVDD5_REF |
int32_t ad4110_setup | ( | struct ad4110_dev ** | device, |
struct ad4110_init_param | init_param | ||
) |
Initialize the device.
device | - The device structure. |
init_param | - The structure that contains the device initial parameters. |
int32_t ad4110_spi_do_soft_reset | ( | struct ad4110_dev * | dev | ) |
Do a SPI software reset.
dev | - The device structure. |
int32_t ad4110_spi_int_data_reg_read | ( | struct ad4110_dev * | dev, |
uint32_t * | reg_data | ||
) |
SPI internal DATA register read from device.
dev | - The device structure. |
reg_data | - The register data. |
int32_t ad4110_spi_int_reg_read | ( | struct ad4110_dev * | dev, |
uint8_t | reg_map, | ||
uint8_t | reg_addr, | ||
uint32_t * | reg_data | ||
) |
SPI internal register read from device.
dev | - The device structure. |
reg_map | - The register map. Accepted values: A4110_ADC A4110_AFE |
reg_addr | - The register address. |
reg_data | - The register data. |
int32_t ad4110_spi_int_reg_write | ( | struct ad4110_dev * | dev, |
uint8_t | reg_map, | ||
uint8_t | reg_addr, | ||
uint32_t | reg_data | ||
) |
SPI internal register write to device.
dev | - The device structure. |
reg_map | - The register map. Accepted values: A4110_ADC A4110_AFE |
reg_addr | - The register address. |
reg_data | - The register data. |
int32_t ad4110_spi_int_reg_write_msk | ( | struct ad4110_dev * | dev, |
uint8_t | reg_map, | ||
uint8_t | reg_addr, | ||
uint32_t | data, | ||
uint16_t | mask | ||
) |
SPI internal register write to device using a mask.
dev | - The device structure. |
reg_map | - The register map. Accepted values: A4110_ADC A4110_AFE |
reg_addr | - The register address. |
data | - The register data. |
mask | - The mask. |
int ad4110_wait_for_rdy_low | ( | struct ad4110_dev * | dev, |
uint32_t | timeout | ||
) |
Wait for RDY bit to go low indicating conversion completion.
dev | - The device structure. |
timeout | - ADC conversion timeout |