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no-OS
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Header file of AD413X Driver. More...
#include <stdint.h>#include "no_os_delay.h"#include "no_os_gpio.h"#include "no_os_spi.h"#include "no_os_irq.h"#include "no_os_util.h"Classes | |
| struct | ad413x_ref_buf |
| ADC reference buffer selection. More... | |
| struct | ad413x_standby_ctrl |
| Standby control flags. More... | |
| struct | ad413x_preset |
| Preset setting. More... | |
| struct | ad413x_channel |
| Channel setting. More... | |
| struct | ad413x_dev |
| Device structure. More... | |
| struct | ad413x_init_param |
| Initial parameter structure. More... | |
| struct | ad413x_callback_ctx |
| Callback structure. More... | |
Functions | |
| int32_t | ad413x_reg_write_msk (struct ad413x_dev *dev, uint32_t reg_addr, uint32_t data, uint32_t mask) |
| int32_t | ad413x_set_adc_mode (struct ad413x_dev *dev, enum ad413x_adc_mode mode) |
| int32_t | ad413x_set_int_ref (struct ad413x_dev *dev, enum ad413x_int_ref int_ref) |
| int32_t | ad413x_data_stat_en (struct ad413x_dev *dev, uint8_t enable) |
| int32_t | ad413x_set_gain (struct ad413x_dev *dev, enum ad413x_gain gain, enum ad413x_preset_nb reg_nb) |
| int32_t | ad413x_set_ref (struct ad413x_dev *dev, enum ad413x_ref_sel ref, enum ad413x_preset_nb reg_nb) |
| int32_t | ad413x_set_ref_buf (struct ad413x_dev *dev, struct ad413x_ref_buf ref_buf, enum ad413x_preset_nb reg_nb) |
| int32_t | ad413x_set_filter (struct ad413x_dev *dev, enum ad413x_filter filter, enum ad413x_preset_nb reg_nb) |
| int32_t | ad413x_set_settle_time (struct ad413x_dev *dev, enum ad413x_settle_time s_time, enum ad413x_preset_nb reg_nb) |
| int32_t | ad413x_set_exc_current (struct ad413x_dev *dev, enum ad413x_exc_current iout0_exc, enum ad413x_exc_current iout1_exc, enum ad413x_preset_nb reg_nb) |
| int32_t | ad413x_ch_exc_input (struct ad413x_dev *dev, uint8_t ch_nb, enum ad413x_input iout0_exc_inp, enum ad413x_input iout1_exc_inp) |
| int32_t | ad413x_set_ch_preset (struct ad413x_dev *dev, uint8_t ch_nb, enum ad413x_preset_nb preset_nb) |
| int32_t | ad413x_ch_en (struct ad413x_dev *dev, uint8_t ch_nb, uint8_t enable) |
| int32_t | ad413x_pdsw_en (struct ad413x_dev *dev, uint8_t ch_nb, bool pdsw_en) |
| int32_t | ad413x_set_v_bias (struct ad413x_dev *dev, uint16_t v_bias_val) |
| int32_t | ad413x_set_standby_ctrl (struct ad413x_dev *dev, struct ad413x_standby_ctrl standby_ctrl) |
| int32_t | ad413x_set_mclk (struct ad413x_dev *dev, enum ad413x_mclk_sel clk) |
| int32_t | ad413x_do_soft_reset (struct ad413x_dev *dev) |
| int32_t | ad413x_reg_write (struct ad413x_dev *dev, uint32_t reg_addr, uint32_t reg_data) |
| int32_t | ad413x_reg_read (struct ad413x_dev *dev, uint32_t reg_addr, uint32_t *reg_data) |
| int32_t | ad413x_single_conv (struct ad413x_dev *dev, uint32_t *buffer, uint8_t ch_nb) |
| int32_t | ad413x_continuous_conv (struct ad413x_dev *dev, uint32_t *buffer, uint8_t ch_nb, uint32_t sample_nb) |
| int32_t | ad413x_adc_bipolar (struct ad413x_dev *dev, uint8_t enable) |
| int32_t | ad413x_preset_store (struct ad413x_dev *dev, struct ad413x_preset preset, enum ad413x_preset_nb preset_nb) |
| int32_t | ad413x_init (struct ad413x_dev **device, struct ad413x_init_param init_param) |
| int32_t | ad413x_remove (struct ad413x_dev *dev) |
| Free the resources allocated by ad413x_init(). | |
Header file of AD413X Driver.
Copyright 2022(c) Analog Devices, Inc.
SPDX-License-Identifier: BSD-3-Clause
| #define AD413X_ADC_BIPOLAR NO_OS_BIT(14) |
| #define AD413X_ADC_CNTRL_MCLK | ( | x | ) |
| #define AD413X_ADC_CONT_READ NO_OS_BIT(11) |
| #define AD413X_ADC_CSB_EN NO_OS_BIT(9) |
| #define AD413X_ADC_DATA_STATUS NO_OS_BIT(10) |
| #define AD413X_ADC_DOUT_DIS_DEL NO_OS_BIT(12) |
| #define AD413X_ADC_DUTY_CYC_RATIO NO_OS_BIT(6) |
| #define AD413X_ADC_ERR NO_OS_BIT(7) |
| #define AD413X_ADC_ERR_EN NO_OS_BIT(7) |
| #define AD413X_ADC_MODE | ( | x | ) |
| #define AD413X_ADC_REF_EN NO_OS_BIT(8) |
| #define AD413X_ADC_REF_VAL NO_OS_BIT(13) |
| #define AD413X_ADD_FIFO_HEADER NO_OS_BIT(18) |
| #define AD413X_ADD_FIFO_STATUS NO_OS_BIT(19) |
| #define AD413X_AINM_M | ( | x | ) |
| #define AD413X_AINM_OV_UV_ERR NO_OS_BIT(10) |
| #define AD413X_AINM_OV_UV_ERR_EN NO_OS_BIT(10) |
| #define AD413X_AINP_M | ( | x | ) |
| #define AD413X_AINP_OV_UV_ERR NO_OS_BIT(11) |
| #define AD413X_AINP_OV_UV_ERR_EN NO_OS_BIT(11) |
| #define AD413X_BURNOUT_N | ( | x | ) |
| #define AD413X_BYPASS_OSC NO_OS_BIT(15) |
| #define AD413X_CAL_RANGE_X2 NO_OS_BIT(13) |
| #define AD413X_CMD_RD_COM_REG | ( | x | ) |
| #define AD413X_CMD_WR_COM_REG | ( | x | ) |
| #define AD413X_CRC8_POLY 0x07 |
| #define AD413X_EMPTY_FLAG 0x01 |
| #define AD413X_EMPTY_INT_EN NO_OS_BIT(8) |
| #define AD413X_ENABLE_M NO_OS_BIT(23) |
| #define AD413X_FIFO_MODE | ( | x | ) |
| #define AD413X_FIFO_READ_ERR NO_OS_BIT(5) |
| #define AD413X_FIFO_READ_ERR_INT_EN NO_OS_BIT(13) |
| #define AD413X_FIFO_WRITE_ERR NO_OS_BIT(6) |
| #define AD413X_FIFO_WRITE_ERR_INT_EN NO_OS_BIT(14) |
| #define AD413X_FILTER_MODE_N | ( | x | ) |
| #define AD413X_FS_N | ( | x | ) |
| #define AD413X_GAIN_N | ( | x | ) |
| #define AD413X_GPO_CTRL_P1 0x01 |
| #define AD413X_GPO_CTRL_P2 NO_OS_BIT(1) |
| #define AD413X_GPO_CTRL_P3 NO_OS_BIT(2) |
| #define AD413X_GPO_CTRL_P4 NO_OS_BIT(3) |
| #define AD413X_GPO_DATA_P1 NO_OS_BIT(4) |
| #define AD413X_GPO_DATA_P2 NO_OS_BIT(5) |
| #define AD413X_GPO_DATA_P3 NO_OS_BIT(6) |
| #define AD413X_GPO_DATA_P4 NO_OS_BIT(7) |
| #define AD413X_I_OUT0_CH_M | ( | x | ) |
| #define AD413X_I_OUT0_N | ( | x | ) |
| #define AD413X_I_OUT1_CH_M | ( | x | ) |
| #define AD413X_I_OUT1_N | ( | x | ) |
| #define AD413X_I_OUT_CH_MSK NO_OS_GENMASK(7,0) |
| #define AD413X_I_OUT_MSK NO_OS_GENMASK(15,10) |
| #define AD413X_INT_PIN_SEL | ( | x | ) |
| #define AD413X_MASTER_ERR NO_OS_BIT(7) |
| #define AD413X_MCLK_CNT_EN NO_OS_BIT(12) |
| #define AD413X_MM_CRC_ERR NO_OS_BIT(1) |
| #define AD413X_MM_CRC_ERR_EN NO_OS_BIT(1) |
| #define AD413X_OFFSET_N | ( | x | ) |
| #define AD413X_OVERRUN_FLAG NO_OS_BIT(2) |
| #define AD413X_OVERRUN_INT_EN NO_OS_BIT(10) |
| #define AD413X_PD_ALDO NO_OS_BIT(14) |
| #define AD413X_PDSW_M NO_OS_BIT(19) |
| #define AD413X_PGA_BYP_N 0x01 |
| #define AD413X_PGA_N | ( | x | ) |
| #define AD413X_R1B (1 << 8) |
| #define AD413X_R2B (2 << 8) |
| #define AD413X_R3B (3 << 8) |
| #define AD413X_REF_BUF_MSK NO_OS_GENMASK(7,6) |
| #define AD413X_REF_BUFM_N NO_OS_BIT(6) |
| #define AD413X_REF_BUFP_N NO_OS_BIT(7) |
| #define AD413X_REF_DETECT_ERR NO_OS_BIT(8) |
| #define AD413X_REF_DETECT_ERR_EN NO_OS_BIT(8) |
| #define AD413X_REF_OV_UV_ERR NO_OS_BIT(9) |
| #define AD413X_REF_OV_UV_ERR_EN NO_OS_BIT(9) |
| #define AD413X_REF_SEL_N | ( | x | ) |
| #define AD413X_REG_ADC_CTRL (AD413X_R2B | 0x1) |
| #define AD413X_REG_CHN | ( | x | ) |
| #define AD413X_REG_CONFIG | ( | x | ) |
| #define AD413X_REG_DATA (AD413X_R3B | 0x2) |
| #define AD413X_REG_ERROR (AD413X_R2B | 0x6) |
| #define AD413X_REG_ERROR_EN (AD413X_R2B | 0x7) |
| #define AD413X_REG_FIFO_CTRL (AD413X_R3B | 0x3A) |
| #define AD413X_REG_FIFO_DATA (AD413X_R3B | 0x3D) |
| #define AD413X_REG_FIFO_STS (AD413X_R1B | 0x3B) |
| #define AD413X_REG_FIFO_THRSHLD (AD413X_R3B | 0x3C) |
| #define AD413X_REG_FILTER | ( | x | ) |
| #define AD413X_REG_GAIN | ( | x | ) |
| #define AD413X_REG_ID (AD413X_R1B | 0x5) |
| #define AD413X_REG_IO_CTRL (AD413X_R2B | 0x3) |
| #define AD413X_REG_MCLK_CNT (AD413X_R1B | 0x8) |
| #define AD413X_REG_MISC (AD413X_R2B | 0x39) |
| #define AD413X_REG_OFFSET | ( | x | ) |
| #define AD413X_REG_STATUS (AD413X_R1B | 0x0) |
| #define AD413X_REG_VBIAS_CTRL (AD413X_R2B | 0x4) |
| #define AD413X_REPEAT_N | ( | x | ) |
| #define AD413X_RESERVED | ( | x | ) |
| #define AD413X_ROM_CRC_ERR 0x01 |
| #define AD413X_ROM_CRC_ERR_EN 0x01 |
| #define AD413X_SETTLE_N | ( | x | ) |
| #define AD413X_SETUP_M | ( | x | ) |
| #define AD413X_SPI_CRC_ERR NO_OS_BIT(2) |
| #define AD413X_SPI_CRC_ERR_EN NO_OS_BIT(2) |
| #define AD413X_SPI_IGNORE_ERR NO_OS_BIT(6) |
| #define AD413X_SPI_IGNORE_ERR_EN NO_OS_BIT(6) |
| #define AD413X_SPI_READ_ERR NO_OS_BIT(4) |
| #define AD413X_SPI_READ_ERR_EN NO_OS_BIT(4) |
| #define AD413X_SPI_SCLK_CNT_ERR NO_OS_BIT(5) |
| #define AD413X_SPI_SCLK_CNT_ERR_EN NO_OS_BIT(5) |
| #define AD413X_SPI_WRITE_ERR NO_OS_BIT(3) |
| #define AD413X_SPI_WRITE_ERR_EN NO_OS_BIT(3) |
| #define AD413X_STBY_BURNOUT_EN NO_OS_BIT(4) |
| #define AD413X_STBY_CTRL_MSK NO_OS_GENMASK(8,0) |
| #define AD413X_STBY_DIAGNOSTICS_EN NO_OS_BIT(7) |
| #define AD413X_STBY_GPO_EN NO_OS_BIT(6) |
| #define AD413X_STBY_IEXC_EN NO_OS_BIT(2) |
| #define AD413X_STBY_INTREF_EN 0x01 |
| #define AD413X_STBY_OUT_EN NO_OS_BIT(8) |
| #define AD413X_STBY_PDSW_EN NO_OS_BIT(5) |
| #define AD413X_STBY_REFHOL_EN NO_OS_BIT(1) |
| #define AD413X_STBY_VBIAS_EN NO_OS_BIT(3) |
| #define AD413X_SYNCB_CLEAR NO_OS_BIT(10) |
| #define AD413X_THRES_EN_M NO_OS_BIT(18) |
| #define AD413X_THRES_HIGH_FLAG NO_OS_BIT(4) |
| #define AD413X_THRES_HIGH_INT_EN NO_OS_BIT(12) |
| #define AD413X_THRES_HIGH_VAL | ( | x | ) |
| #define AD413X_THRES_LOW_FLAG NO_OS_BIT(3) |
| #define AD413X_THRES_LOW_INT_EN NO_OS_BIT(11) |
| #define AD413X_THRES_LOW_VAL | ( | x | ) |
| #define AD413X_TRANSF_LEN | ( | x | ) |
| #define AD413X_VBIAS_0 0x01 |
| #define AD413X_VBIAS_1 NO_OS_BIT(1) |
| #define AD413X_VBIAS_10 NO_OS_BIT(10) |
| #define AD413X_VBIAS_11 NO_OS_BIT(11) |
| #define AD413X_VBIAS_12 NO_OS_BIT(12) |
| #define AD413X_VBIAS_13 NO_OS_BIT(13) |
| #define AD413X_VBIAS_14 NO_OS_BIT(14) |
| #define AD413X_VBIAS_15 NO_OS_BIT(15) |
| #define AD413X_VBIAS_2 NO_OS_BIT(2) |
| #define AD413X_VBIAS_3 NO_OS_BIT(3) |
| #define AD413X_VBIAS_4 NO_OS_BIT(4) |
| #define AD413X_VBIAS_5 NO_OS_BIT(5) |
| #define AD413X_VBIAS_6 NO_OS_BIT(6) |
| #define AD413X_VBIAS_7 NO_OS_BIT(7) |
| #define AD413X_VBIAS_8 NO_OS_BIT(8) |
| #define AD413X_VBIAS_9 NO_OS_BIT(9) |
| #define AD413X_WATERMARK | ( | x | ) |
| #define AD413X_WATERMARK_FLAG NO_OS_BIT(1) |
| #define AD413X_WATERMARK_INT_EN NO_OS_BIT(9) |
| #define DISABLE 0U |
| #define ENABLE 1U |
| enum ad413x_adc_mode |
ADC conversion modes.
| enum ad413x_chip_id |
| enum ad413x_exc_current |
| enum ad413x_filter |
| enum ad413x_gain |
| enum ad413x_input |
ADC input sources for each channel.
| enum ad413x_int_ref |
| enum ad413x_mclk_sel |
| enum ad413x_preset_nb |
| enum ad413x_ref_sel |
| enum ad413x_settle_time |
| int32_t ad413x_adc_bipolar | ( | struct ad413x_dev * | dev, |
| uint8_t | enable ) |
Enable/disable bipolar data coding.
| dev | - The device structure. |
| enable | - 1 - Bipolar 0 - Unipolar |
| int32_t ad413x_ch_en | ( | struct ad413x_dev * | dev, |
| uint8_t | ch_nb, | ||
| uint8_t | enable ) |
Enable/disable channel.
| dev | - The device structure. |
| ch_nb | - The channel number. |
| enable | - Channel status. |
| int32_t ad413x_ch_exc_input | ( | struct ad413x_dev * | dev, |
| uint8_t | ch_nb, | ||
| enum ad413x_input | iout0_exc_inp, | ||
| enum ad413x_input | iout1_exc_inp ) |
Select the excitation source pins.
| dev | - The device structure. |
| ch_nb | - The channel number. |
| iout0_exc_inp | - IOUT0 excitation input pin. |
| iout1_exc_inp | - IOUT1 excitation input pin. |
| int32_t ad413x_continuous_conv | ( | struct ad413x_dev * | dev, |
| uint32_t * | buffer, | ||
| uint8_t | ch_nb, | ||
| uint32_t | sample_nb ) |
Continuous conversion of each adc active channel.
| dev | - The device structure. |
| buffer | - Buffer to store read data. Buffer size needs to be at least equal to the number of active channels * samples number. Results will be stored in consecutive order of the active channels. |
| ch_nb | - Number of active channels. |
| sample_nb | - Samples number. |
| int32_t ad413x_data_stat_en | ( | struct ad413x_dev * | dev, |
| uint8_t | enable ) |
Enable/disable DATA_STAT field.
| dev | - The device structure. |
| enable | - 0 DISABLE 1 ENABLE |
| int32_t ad413x_do_soft_reset | ( | struct ad413x_dev * | dev | ) |
Do a SPI software reset.
| dev | - The device structure. |
| int32_t ad413x_init | ( | struct ad413x_dev ** | device, |
| struct ad413x_init_param | init_param ) |
Initialize the device.
| device | - The device structure. |
| init_param | - The structure that contains the device initial parameters. |
| int32_t ad413x_pdsw_en | ( | struct ad413x_dev * | dev, |
| uint8_t | ch_nb, | ||
| bool | pdsw_en ) |
Enable/disable Power-Down Switch (PDSW).
| dev | - The device structure. |
| ch_nb | - The channel number. |
| pdsw_en | - PDSW status. |
| int32_t ad413x_preset_store | ( | struct ad413x_dev * | dev, |
| struct ad413x_preset | preset, | ||
| enum ad413x_preset_nb | preset_nb ) |
Store adc channel presets.
| dev | - The device structure. |
| preset | - The structure to be saved as preset. |
| preset_nb | - Preset's number. |
| int32_t ad413x_reg_read | ( | struct ad413x_dev * | dev, |
| uint32_t | reg_addr, | ||
| uint32_t * | reg_data ) |
SPI internal register read from device.
| dev | - The device structure. |
| reg_addr | - The register address. |
| reg_data | - The register data. |
| int32_t ad413x_reg_write | ( | struct ad413x_dev * | dev, |
| uint32_t | reg_addr, | ||
| uint32_t | reg_data ) |
SPI internal register write to device.
| dev | - The device structure. |
| reg_addr | - The register address. |
| reg_data | - The register data. |
| int32_t ad413x_reg_write_msk | ( | struct ad413x_dev * | dev, |
| uint32_t | reg_addr, | ||
| uint32_t | data, | ||
| uint32_t | mask ) |
SPI internal register write to device using a mask.
| dev | - The device structure. |
| reg_addr | - The register address. |
| data | - The register data. |
| mask | - The mask. |
| int32_t ad413x_remove | ( | struct ad413x_dev * | dev | ) |
Free the resources allocated by ad413x_init().
| dev | - The device structure. |
| int32_t ad413x_set_adc_mode | ( | struct ad413x_dev * | dev, |
| enum ad413x_adc_mode | mode ) |
Set the mode of the ADC.
| dev | - The device structure. |
| mode | - The ADC mode Accepted values: AD4110_CONTINOUS_CONV_MODE AD4110_SINGLE_CONV_MODE AD4110_STANDBY_MODE AD4110_PW_DOWN_MODE AD4110_SYS_OFFSET_CAL AD4110_SYS_GAIN_CAL |
| int32_t ad413x_set_ch_preset | ( | struct ad413x_dev * | dev, |
| uint8_t | ch_nb, | ||
| enum ad413x_preset_nb | preset_nb ) |
Select preset for adc channel.
| dev | - The device structure. |
| ch_nb | - The channel number. |
| preset_nb | - The preset number. |
| int32_t ad413x_set_exc_current | ( | struct ad413x_dev * | dev, |
| enum ad413x_exc_current | iout0_exc, | ||
| enum ad413x_exc_current | iout1_exc, | ||
| enum ad413x_preset_nb | reg_nb ) |
Select excitation current value from config register.
| dev | - The device structure. |
| iout0_exc | - The Iout0 excitation current value. |
| iout1_exc | - The Iout1 excitation current value. Accepted values: AD413X_EXC_OFF AD413X_EXC_10UA AD413X_EXC_20UA AD413X_EXC_50UA AD413X_EXC_100UA AD413X_EXC_150UA AD413X_EXC_200UA AD413X_EXC_100NA |
| reg_nb | - Number of Configuration Register |
| int32_t ad413x_set_filter | ( | struct ad413x_dev * | dev, |
| enum ad413x_filter | filter, | ||
| enum ad413x_preset_nb | reg_nb ) |
Select filter from filter register.
| dev | - The device structure. |
| filter | - The filter type. Accepted values: AD413X_SYNC4_STANDALONE AD413X_SYNC4_SYNC1 AD413X_SYNC3_STANDALONE AD413X_SYNC3_REJ60 AD413X_SYNC3_SYNC1 AD413X_SYNC3_PF1 AD413X_SYNC3_PF2 AD413X_SYNC3_PF3 AD413X_SYNC3_PF4 |
| reg_nb | - Number of Configuration Register |
| int32_t ad413x_set_gain | ( | struct ad413x_dev * | dev, |
| enum ad413x_gain | gain, | ||
| enum ad413x_preset_nb | reg_nb ) |
Set the gain from configuration register.
| dev | - The device structure. |
| gain | - The gain value. Accepted values: AD413X_GAIN_1 AD413X_GAIN_2 AD413X_GAIN_4 AD413X_GAIN_8 AD413X_GAIN_16 AD413X_GAIN_32 AD413X_GAIN_64 AD413X_GAIN_128 |
| reg_nb | - Number of Configuration Register |
| int32_t ad413x_set_int_ref | ( | struct ad413x_dev * | dev, |
| enum ad413x_int_ref | int_ref ) |
Set the internal reference.
| dev | - The device structure. |
| int_ref | - The internal reference option. Accepted values: AD413X_INTREF_DISABLED AD413X_INTREF_2_5V, AD413X_INTREF_1_25V |
| int32_t ad413x_set_mclk | ( | struct ad413x_dev * | dev, |
| enum ad413x_mclk_sel | clk ) |
Set ADC master clock mode.
| dev | - The device structure. |
| clk | - The clock mode. Accepted values: AD413X_INT_76_8_KHZ_OUT_OFF AD413X_INT_76_8_KHZ_OUT_ON AD413X_EXT_76_8KHZ AD413X_EXT_153_6_KHZ_DIV_2 |
| int32_t ad413x_set_ref | ( | struct ad413x_dev * | dev, |
| enum ad413x_ref_sel | ref, | ||
| enum ad413x_preset_nb | reg_nb ) |
Select reference from configuration register.
| dev | - The device structure. |
| ref | - The reference value. Accepted values: AD413X_REFIN1 AD413X_REFIN2 AD413X_REFOUT_AVSS AD413X_AVDD_AVSS |
| reg_nb | - Number of Configuration Register |
| int32_t ad413x_set_ref_buf | ( | struct ad413x_dev * | dev, |
| struct ad413x_ref_buf | ref_buf, | ||
| enum ad413x_preset_nb | reg_nb ) |
Select the reference buffers.
| dev | - The device structure. |
| ref_buf | - The reference buffer status. |
| reg_nb | - Number of Configuration Register |
| int32_t ad413x_set_settle_time | ( | struct ad413x_dev * | dev, |
| enum ad413x_settle_time | s_time, | ||
| enum ad413x_preset_nb | reg_nb ) |
Select settle time from filter register.
| dev | - The device structure. |
| s_time | - The settle time value. Accepted values: AD413X_32_MCLK AD413X_64_MCLK AD413X_128_MCLK AD413X_256_MCLK AD413X_512_MCLK AD413X_1024_MCLK AD413X_2048_MCLK AD413X_4096_MCLK |
| reg_nb | - Number of Configuration Register |
| int32_t ad413x_set_standby_ctrl | ( | struct ad413x_dev * | dev, |
| struct ad413x_standby_ctrl | standby_ctrl ) |
Set standby control flags.
| dev | - The device structure. |
| standby_ctrl | - Standby control value |
| int32_t ad413x_set_v_bias | ( | struct ad413x_dev * | dev, |
| uint16_t | v_bias_val ) |
Set output VBIAS on analog inputs.
| dev | - The device structure. |
| v_bias_val | - V_BIAS control register value |
| int32_t ad413x_single_conv | ( | struct ad413x_dev * | dev, |
| uint32_t * | buffer, | ||
| uint8_t | ch_nb ) |
Single conversion of each adc active channel.
| dev | - The device structure. |
| buffer | - Buffer to store read data. Buffer size needs to be at least equal to the number of active channels. Results will be stored in consecutive order of the active channels. |
| ch_nb | - Number of active channels. |