Header file for the AD4170, AD4190 driver. More...

#include <stdint.h>
#include <stdbool.h>
#include "no_os_util.h"
#include "no_os_gpio.h"
#include "no_os_spi.h"

Include dependency graph for ad4170.h:

Classes
struct	ad4170_pin_muxing
	Pin_Muxing register settings. More...

struct	ad4170_clock_ctrl
	Clock_Ctrl register settings. More...

struct	ad4170_adc_ctrl
	ADC_Ctrl register settings. More...

struct	ad4170_channel_setup
	Channel_Setup register settings. More...

struct	ad4170_channel_map
	Channel_Map register settings. Selects Analog Inputs for This Sequencer Channel. More...

struct	ad4170_misc
	Misc register settings. More...

struct	ad4170_afe
	AFE register settings. More...

struct	ad4170_filter
	Filter register settings. More...

struct	ad4170_setup
	Sequencer Setup register settings. More...

struct	ad4170_ref_control
	Ref_Control register settings. More...

struct	ad4170_current_source
	Current_Source register settings. More...

struct	ad4170_fir_control
	FIR_Control register settings. More...

struct	ad4170_dac_config
	DAC Config settings (registers HW_LDAC_Mask, HW_Toggle_Mask, Channel_En and DAC_Span) More...

struct	ad4170_config
	AD4170 configuration. More...

struct	ad4170_spi_settings
	AD4170 SPI settings. More...

struct	ad4170_init_param
	AD4170 SPI init paraeter structure, used for initializing the ad4170_dev. More...

struct	ad4170_dev
	AD4170 device descriptor. More...

Macros
#define	ECOMM 70

#define	AD4170_R1B (1ul << 16)

#define	AD4170_R2B (2ul << 16)

#define	AD4170_R3B (3ul << 16)

#define	AD4170_R4B (4ul << 16)

#define	AD4170_TRANSF_LEN(x)

#define	AD4170_ADDR(x)

#define	AD4170_SPI_SYNC_PATTERN 0x2645

#define	AD4170_REG_READ_6(x)

#define	AD4170_REG_WRITE_6(x)

#define	AD4170_REG_READ_14(x)

#define	AD4170_REG_WRITE_14(x)

#define	AD4170_REG_INTERFACE_CONFIG_A (AD4170_R1B \| 0x00)

#define	AD4170_REG_INTERFACE_CONFIG_B (AD4170_R1B \| 0x01)

#define	AD4170_REG_DEVICE_CONFIG (AD4170_R1B \| 0x02)

#define	AD4170_REG_CHIP_TYPE (AD4170_R1B \| 0x03)

#define	AD4170_REG_PRODUCT_ID_L (AD4170_R1B \| 0x04)

#define	AD4170_REG_PRODUCT_ID_H (AD4170_R1B \| 0x05)

#define	AD4170_REG_CHIP_GRADE (AD4170_R1B \| 0x06)

#define	AD4170_REG_SCRATCH_PAD (AD4170_R1B \| 0x0a)

#define	AD4170_REG_SPI_REVISION (AD4170_R1B \| 0x0b)

#define	AD4170_REG_VENDOR_L (AD4170_R1B \| 0x0c)

#define	AD4170_REG_VENDOR_H (AD4170_R1B \| 0x0d)

#define	AD4170_REG_INTERFACE_CONFIG_C (AD4170_R1B \| 0x10)

#define	AD4170_REG_INTERFACE_STATUS_A (AD4170_R1B \| 0x11)

#define	AD4170_REG_DATA_STATUS (AD4170_R2B \| 0x14)

#define	AD4170_REG_DATA_16b (AD4170_R2B \| 0x16)

#define	AD4170_REG_DATA_16b_STATUS (AD4170_R3B \| 0x18)

#define	AD4170_REG_DATA_24b (AD4170_R3B \| 0x1c)

#define	AD4170_REG_DATA_24b_STATUS (AD4170_R4B \| 0x20)

#define	AD4170_REG_DATA_32b (AD4170_R4B \| 0x24)

#define	AD4170_REG_DATA_PER_CHANNEL(ch)

#define	AD4170_REG_PIN_MUXING (AD4170_R2B \| 0x68)

#define	AD4170_REG_CLOCK_CTRL (AD4170_R2B \| 0x6a)

#define	AD4170_REG_STANDBY_CTRL (AD4170_R2B \| 0x6c)

#define	AD4170_REG_POWER_DOWN_SW (AD4170_R2B \| 0x6e)

#define	AD4170_REG_ADC_CTRL (AD4170_R2B \| 0x70)

#define	AD4170_REG_ERROR_EN (AD4170_R2B \| 0x72)

#define	AD4170_REG_ERROR (AD4170_R2B \| 0x74)

#define	AD4170_REG_CHANNEL_EN (AD4170_R2B \| 0x78)

#define	AD4170_REG_ADC_CHANNEL_SETUP(ch)

#define	AD4170_REG_ADC_CHANNEL_MAP(ch)

#define	AD4170_REG_ADC_SETUPS_MISC(n)

#define	AD4170_REG_ADC_SETUPS_AFE(n)

#define	AD4170_REG_ADC_SETUPS_FILTER(n)

#define	AD4170_REG_ADC_SETUPS_FILTER_FS(n)

#define	AD4170_REG_ADC_SETUPS_OFFSET(n)

#define	AD4170_REG_ADC_SETUPS_GAIN(n)

#define	AD4170_REG_REF_CONTROL (AD4170_R2B \| 0x130)

#define	AD4170_REG_V_BIAS (AD4170_R2B \| 0x134)

#define	AD4170_REG_I_PULLUP (AD4170_R2B \| 0x136)

#define	AD4170_REG_CURRENT_SOURCE(n)

#define	AD4170_REG_FIR_CONTROL (AD4170_R2B \| 0x140)

#define	AD4170_REG_COEFF_WRITE_DATA (AD4170_R4B \| 0x143)

#define	AD4170_REG_COEFF_READ_DATA (AD4170_R4B \| 0x147)

#define	AD4170_REG_COEFF_ADDRESS (AD4170_R2B \| 0x14b)

#define	AD4170_REG_COEFF_WRRD_STB (AD4170_R2B \| 0x14d)

#define	AD4170_REG_DAC_SPAN (AD4170_R2B \| 0x150)

#define	AD4170_REG_DAC_CHANNEL_EN (AD4170_R2B \| 0x152)

#define	AD4170_REG_DAC_HW_TOGGLE_MASK (AD4170_R2B \| 0x154)

#define	AD4170_REG_DAC_HW_LDAC_MASK (AD4170_R2B \| 0x156)

#define	AD4170_REG_DAC_DATA(ch)

#define	AD4170_REG_DAC_SW_TOGGLE_TRIGGERS (AD4170_R2B \| 0x168)

#define	AD4170_REG_DAC_SW_LDAC_TRIGGERS (AD4170_R2B \| 0x16a)

#define	AD4170_REG_DAC_INPUTA(ch)

#define	AD4170_REG_DAC_INPUTB(ch)

#define	AD4170_REG_GPIO_MODE (AD4170_R2B \| 0x190)

#define	AD4170_REG_OUTPUT_DATA (AD4170_R2B \| 0x192)

#define	AD4170_REG_INPUT_DATA (AD4170_R2B \| 0x194)

#define	AD4170_SW_RESET_MSK NO_OS_BIT(7)

#define	AD4170_ADDR_ASCENSION_MSK NO_OS_BIT(5)

#define	AD4170_SDO_ENABLE_MSK NO_OS_BIT(4)

#define	AD4170_SW_RESETX_MSK NO_OS_BIT(0)

#define	AD4170_INTERFACE_CONFIG_B_SINGLE_INST_MSK NO_OS_BIT(7)

#define	AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION_MSK NO_OS_BIT(3)

#define	AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION(x)

#define	AD4170_INTERFACE_CONFIG_C_CRC_MSK (NO_OS_BIT(7) \| NO_OS_BIT(6) \| NO_OS_BIT(1) \| NO_OS_BIT(0))

#define	AD4170_INTERFACE_CONFIG_C_CRC(x)

#define	AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS_MSK NO_OS_BIT(5)

#define	AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS(x)

#define	AD4170_CRC8_POLYNOMIAL 0x7

#define	AD4170_CRC8_INITIAL_VALUE 0xA5

#define	AD4170_INTERFACE_STATUS_A_NOT_READY_ERR_MSK NO_OS_BIT(7)

#define	AD4170_INTERFACE_STATUS_A_CLOCK_COUNT_ERR_MSK NO_OS_BIT(4)

#define	AD4170_INTERFACE_STATUS_A_CRC_ERR_MSK NO_OS_BIT(3)

#define	AD4170_INTERFACE_STATUS_A_INVALID_ACCESS_ERR_MSK NO_OS_BIT(2)

#define	AD4170_INTERFACE_STATUS_A_PARTIAL_ACCESS_ERR_MSK NO_OS_BIT(1)

#define	AD4170_INTERFACE_STATUS_A_ADDR_INVALID_ERR_MSK NO_OS_BIT(0)

#define	AD4170_PRODUCT_ID_L_VALUE 0x40

#define	AD4170_PRODUCT_ID_H_VALUE 0x0

#define	AD4190_PRODUCT_ID_L_VALUE 0x48

#define	AD4190_PRODUCT_ID_H_VALUE 0x0

#define	AD4190_8_PRODUCT_ID_L_VALUE 0x49

#define	AD4190_8_PRODUCT_ID_H_VALUE 0x0

#define	AD4195_8_PRODUCT_ID_L_VALUE 0x49

#define	AD4195_8_PRODUCT_ID_H_VALUE 0x0

#define	AD4170_DATA_STATUS_MASTER_ERR_S_MSK NO_OS_BIT(7)

#define	AD4170_DATA_STATUS_POR_FLAG_S_MSK NO_OS_BIT(6)

#define	AD4170_DATA_STATUS_RDYB_MSK NO_OS_BIT(5)

#define	AD4170_DATA_STATUS_SETTLED_FIR_MSK NO_OS_BIT(4)

#define	AD4170_DATA_STATUS_CH_ACTIVE_MSK NO_OS_GENMASK(3,0)

#define	AD4170_PIN_MUXING_CHAN_TO_GPIO_MSK NO_OS_BIT(14)

#define	AD4170_PIN_MUXING_DIG_AUX2_CTRL_MSK NO_OS_GENMASK(7,6)

#define	AD4170_PIN_MUXING_DIG_AUX1_CTRL_MSK NO_OS_GENMASK(5,4)

#define	AD4170_PIN_MUXING_SYNC_CTRL_MSK NO_OS_GENMASK(3,2)

#define	AD4170_PIN_MUXING_DIG_OUT_STR_MSK NO_OS_BIT(1)

#define	AD4170_PIN_MUXING_SDO_RDBY_DLY_MSK NO_OS_BIT(0)

#define	AD4170_CLOCK_CTRL_DCLK_DIVIDE_MSK NO_OS_GENMASK(7,6)

#define	AD4170_CLOCK_CTRL_CLOCKDIV_MSK NO_OS_GENMASK(5,4)

#define	AD4170_CLOCK_CTRL_CLOCKSEL_MSK NO_OS_GENMASK(1,0)

#define	AD4170_STANDBY_CTRL_STB_EN_CLOCK_MSK NO_OS_BIT(8)

#define	AD4170_STANDBY_CTRL_STB_EN_IPULLUP_MSK NO_OS_BIT(7)

#define	AD4170_STANDBY_CTRL_STB_EN_DIAGNOSTICS_MSK NO_OS_BIT(6)

#define	AD4170_STANDBY_CTRL_STB_EN_DAC_MSK NO_OS_BIT(5)

#define	AD4170_STANDBY_CTRL_STB_EN_PDSW1_MSK NO_OS_BIT(4)

#define	AD4170_STANDBY_CTRL_STB_EN_PDSW0_MSK NO_OS_BIT(3)

#define	AD4170_STANDBY_CTRL_STB_EN_VBIAS_MSK NO_OS_BIT(2)

#define	AD4170_STANDBY_CTRL_STB_EN_IEXC_MSK NO_OS_BIT(1)

#define	AD4170_STANDBY_CTRL_STB_EN_REFERENCE_MSK NO_OS_BIT(0)

#define	AD4170_POWER_DOWN_SW_PDSW1_MSK NO_OS_BIT(1)

#define	AD4170_POWER_DOWN_SW_PDSW0_MSK NO_OS_BIT(0)

#define	AD4170_ADC_CTRL_PARALLEL_FILT_EN_MSK NO_OS_BIT(8)

#define	AD4170_ADC_CTRL_MULTI_DATA_REG_SEL_MSK NO_OS_BIT(7)

#define	AD4170_ADC_CTRL_CONT_READ_STATUS_EN_MSK NO_OS_BIT(6)

#define	AD4170_REG_CTRL_CONT_READ_MSK NO_OS_GENMASK(5,4)

#define	AD4170_REG_CTRL_MODE_MSK NO_OS_GENMASK(3,0)

#define	AD4170_ERROR_DEVICE_ERROR_MSK NO_OS_BIT(15)

#define	AD4170_ERROR_DLDO_PSM_ERR_MSK NO_OS_BIT(13)

#define	AD4170_ERROR_ALDO_PSM_ERR_MSK NO_OS_BIT(12)

#define	AD4170_ERROR_IOUT3_COMP_ERR_MSK NO_OS_BIT(11)

#define	AD4170_ERROR_IOUT2_COMP_ERR_MSK NO_OS_BIT(10)

#define	AD4170_ERROR_IOUT1_COMP_ERR_MSK NO_OS_BIT(9)

#define	AD4170_ERROR_IOUT0_COMP_ERR_MSK NO_OS_BIT(8)

#define	AD4170_ERROR_REF_DIFF_MIN_ERR_MSK NO_OS_BIT(7)

#define	AD4170_ERROR_REF_OV_UV_ERR_MSK NO_OS_BIT(6)

#define	AD4170_ERROR_AINM_OV_UV_ERR_MSK NO_OS_BIT(5)

#define	AD4170_ERROR_AINP_OV_UV_ERR_MSK NO_OS_BIT(4)

#define	AD4170_ERROR_ADC_CONV_ERR_MSK NO_OS_BIT(3)

#define	AD4170_ERROR_MM_CRC_ERR_MSK NO_OS_BIT(1)

#define	AD4170_ERROR_ROM_CRC_ERR_MSK NO_OS_BIT(0)

#define	AD4170_CHANNEL(ch)

#define	AD4170_CHANNEL_SETUPN_REPEAT_N_MSK NO_OS_GENMASK(15,8)

#define	AD4170_CHANNEL_SETUPN_DELAY_N_MSK NO_OS_GENMASK(6,4)

#define	AD4170_CHANNEL_SETUPN_SETUP_N_MSK NO_OS_GENMASK(2,0)

#define	AD4170_CHANNEL_MAPN_AINP_MSK NO_OS_GENMASK(12,8)

#define	AD4170_CHANNEL_MAPN_AINM_MSK NO_OS_GENMASK(4,0)

#define	AD4170_ADC_SETUPS_MISC_CHOP_IEXC_MSK NO_OS_GENMASK(15,14)

#define	AD4170_ADC_SETUPS_MISC_CHOP_ADC_MSK NO_OS_GENMASK(9,8)

#define	AD4170_ADC_SETUPS_MISC_BURNOUT_MSK NO_OS_GENMASK(1,0)

#define	AD4170_ADC_SETUPS_AFE_REF_BUF_M_MSK NO_OS_GENMASK(11,10)

#define	AD4170_ADC_SETUPS_AFE_REF_BUF_P_MSK NO_OS_GENMASK(9,8)

#define	AD4170_ADC_SETUPS_AFE_REF_SELECT_MSK NO_OS_GENMASK(6,5)

#define	AD4170_ADC_SETUPS_AFE_BIPOLAR_MSK NO_OS_BIT(4)

#define	AD4170_ADC_SETUPS_AFE_PGA_GAIN_MSK NO_OS_GENMASK(3,0)

#define	AD4170_ADC_SETUPS_POST_FILTER_SEL_MSK NO_OS_GENMASK(7,4)

#define	AD4170_ADC_SETUPS_FILTER_TYPE_MSK NO_OS_GENMASK(3,0)

#define	AD4170_CURRENT_SOURCE_I_OUT_PIN_MSK NO_OS_GENMASK(12,8)

#define	AD4170_CURRENT_SOURCE_I_OUT_VAL_MSK NO_OS_GENMASK(2,0)

#define	AD4170_REF_CONTROL_REF_EN_MSK NO_OS_BIT(0)

#define	AD4170_FIR_CONTROL_IIR_MODE_MSK NO_OS_BIT(15)

#define	AD4170_FIR_CONTROL_FIR_MODE_MSK NO_OS_GENMASK(14,12)

#define	AD4170_FIR_CONTROL_COEFF_SET_MSK NO_OS_BIT(10)

#define	AD4170_FIR_CONTROL_FIR_LENGTH_MSK NO_OS_GENMASK(6,0)

#define	AD4170_REG_DAC_SPAN_DAC_GAIN_MSK NO_OS_BIT(0)

#define	AD4170_REG_DAC_CHANNEL_EN_DAC_EN_MSK NO_OS_BIT(0)

#define	AD4170_REG_DAC_HW_TOGGLE_MASK_HW_TOGGLE_EN_MSK NO_OS_BIT(0)

#define	AD4170_REG_DAC_HW_LDAC_MASK_HW_LDAC_EN_MSK NO_OS_BIT(0)

#define	AD4170_REG_DAC_DATA_MSK NO_OS_GENMASK(11,0)

#define	AD4170_REG_DAC_SW_TOGGLE_TRIGGERS_SW_TOGGLE_MSK NO_OS_BIT(0)

#define	AD4170_REG_DAC_SW_LDAC_TRIGGERS_SW_LDAC_EN_MSK NO_OS_BIT(0)

#define	AD4170_NUM_CHANNELS 16

#define	AD4170_NUM_SETUPS 8

#define	AD4170_NUM_CURRENT_SOURCE 4

#define	AD4170_FIR_COEFF_MAX_LENGTH 72

Enumerations
enum	ad4170_chan_to_gpio { AD4170_CHANNEL_NOT_TO_GPIO , AD4170_CHANNEL_TO_GPIO }
	Enables Current Channel Number Be Output to GPIO Pins. More...

enum	ad4170_dig_aux2_ctrl { AD4170_DIG_AUX2_DISABLED , AD4170_DIG_AUX2_LDAC , AD4170_DIG_AUX2_SYNC , AD4170_DIG_AUX2_MODOUT }
	Configures Functionality of DIG_AUX2 Pin. More...

enum	ad4170_dig_aux1_ctrl { AD4170_DIG_AUX1_DISABLED , AD4170_DIG_AUX1_RDY , AD4170_DIG_AUX1_SYNC , AD4170_DIG_AUX1_MODOUT }
	Configures Functionality of DIG_AUX1 Pin. More...

enum	ad4170_sync_ctrl { AD4170_SYNC_DISABLED , AD4170_SYNC_STANDARD , AD4170_SYNC_ALTERNATE }
	Configures SYNC_IN Pin for ADC Synchronization. More...

enum	ad4170_dig_out_str { AD4170_DIG_STR_DEFAULT , AD4170_DIG_STR_HIGH }
	Configures the drive strength of the Digital Outputs. More...

enum	ad4170_sdo_rdby_dly { AD4170_SDO_RDY_SCLK , AD4170_SDO_RDY_CSB }
	Reset Interface on CS or SCLK. More...

enum	ad4170_dclk_div { AD4170_DCLKDIVBY1 , AD4170_DCLKDIVBY2 , AD4170_DCLKDIVBY4 , AD4170_DCLKDIVBY8 }
	Continuous Transmit Data Clock Divider. More...

enum	ad4170_mclk_div { AD4170_CLKDIVBY1 , AD4170_CLKDIVBY2 , AD4170_CLKDIVBY4 , AD4170_CLKDIVBY8 }
	Master Clock Divider. More...

enum	ad4170_clocksel { AD4170_INTERNAL_OSC , AD4170_INTERNAL_OSC_OUTPUT , AD4170_EXTERNAL_OSC , AD4170_EXTERNAL_XTAL }
	ADC Clock Select. More...

enum	ad4170_cont_read { AD4170_CONT_READ_OFF , AD4170_CONT_READ_ON , AD4170_CONT_TRANSMIT_ON }
	Configures continuous Data Register Read/Transmit. More...

enum	ad4170_mode { AD4170_MODE_CONT , AD4170_MODE_CONT_FIR , AD4170_MODE_CONT_IIR , AD4170_MODE_SINGLE = 0x4 , AD4170_MODE_STANDBY , AD4170_MODE_POWER_DOWN , AD4170_MODE_IDLE , AD4170_MODE_SYS_OFFSET_CAL , AD4170_MODE_SYS_GAIN_CAL , AD4170_MODE_SELF_OFFSET_CAL , AD4170_MODE_SELF_GAIN_CAL }
	ADC Operating Mode. More...

enum	ad4170_delay_n { AD4170_DLY_0 , AD4170_DLY_16 , AD4170_DLY_256 , AD4170_DLY_1024 , AD4170_DLY_2048 , AD4170_DLY_4096 , AD4170_DLY_8192 , AD4170_DLY_16384 }
	Delay to Add After Channel Switch. More...

enum	ad4170_ain { AD4170_AIN0 , AD4170_AIN1 , AD4170_AIN2 , AD4170_AIN3 , AD4170_AIN4 , AD4170_AIN5 , AD4170_AIN6 , AD4170_AIN7 , AD4170_AIN8 , AD4170_AIN9 , AD4170_AIN10 , AD4170_AIN11 , AD4170_AIN12 , AD4170_AIN13 , AD4170_AIN14 , AD4170_AIN15 , AD4170_AIN16 , AD4170_TEMP_SENSOR_P = 17 , AD4170_TEMP_SENSOR_N = 17 , AD4170_AVDD_AVSS_P = 18 , AD4170_AVDD_AVSS_N = 18 , AD4170_IOVDD_DGND_P = 19 , AD4170_IOVDD_DGND_N = 19 , AD4170_DAC , AD4170_ALDO , AD4170_DLDO , AD4170_AVSS , AD4170_DGND , AD4170_REFIN1_P , AD4170_REFIN1_N , AD4170_REFIN2_P , AD4170_REFIN2_N , AD4170_REFOUT , AD4170_OPEN = 31 }
	Multiplexer Positive/Negative Input for This Channel. More...

enum	ad4170_chop_iexc { AD4170_CHOP_IEXC_OFF , AD4170_CHOP_IEXC_AB , AD4170_CHOP_IEXC_CD , AD4170_CHOP_IEXC_ABCD }
	Excitation Current Chopping Control. More...

enum	ad4170_chop_adc { AD4170_CHOP_OFF , AD4170_CHOP_MUX , AD4170_CHOP_ACX_4PIN , AD4170_CHOP_ACX_2PIN }
	ADC/Mux Chopping Control. More...

enum	ad4170_burnout { AD4170_BURNOUT_OFF , AD4170_BURNOUT_100N , AD4170_BURNOUT_2U , AD4170_BURNOUT_10U }
	Burnout Current Values. More...

enum	ad4170_ref_buf { AD4170_REF_BUF_PRE , AD4170_REF_BUF_FULL , AD4170_REF_BUF_BYPASS }
	REFIN Buffer Enable. More...

enum	ad4170_ref_select { AD4170_REFIN_REFIN1 , AD4170_REFIN_REFIN2 , AD4170_REFIN_REFOUT , AD4170_REFIN_AVDD }
	ADC Reference Selection. More...

enum	ad4170_pga_gain { AD4170_PGA_GAIN_1 , AD4170_PGA_GAIN_2 , AD4170_PGA_GAIN_4 , AD4170_PGA_GAIN_8 , AD4170_PGA_GAIN_16 , AD4170_PGA_GAIN_32 , AD4170_PGA_GAIN_64 , AD4170_PGA_GAIN_128 , AD4170_PGA_GAIN_0P5 , AD4170_PGA_GAIN_1_PRECHARGE }
	PGA Gain Selection. More...

enum	ad4170_post_filter { AD4170_POST_FILTER_NONE , AD4170_POST_FILTER_40MS , AD4170_POST_FILTER_50MS , AD4170_POST_FILTER_60MS , AD4170_POST_FILTER_FAST_AC , AD4170_POST_FILTER_AVG16 , AD4170_POST_FILTER_AVG20 , AD4170_POST_FILTER_AVG24 }
	Optional Post-Filter configuration. More...

enum	ad4170_filter_type { AD4170_FILT_SINC5_AVG = 0x0 , AD4170_FILT_SINC5 = 0x4 , AD4170_FILT_SINC3 = 0x6 }
	Filter Mode for Sinc-Based Filters. More...

enum	ad4170_i_out_pin { AD4170_I_OUT_AIN0 , AD4170_I_OUT_AIN1 , AD4170_I_OUT_AIN2 , AD4170_I_OUT_AIN3 , AD4170_I_OUT_AIN4 , AD4170_I_OUT_AIN5 , AD4170_I_OUT_AIN6 , AD4170_I_OUT_AIN7 , AD4170_I_OUT_AIN8 , AD4170_I_OUT_AIN9 , AD4170_I_OUT_AIN10 , AD4170_I_OUT_AIN11 , AD4170_I_OUT_AIN12 , AD4170_I_OUT_AIN13 , AD4170_I_OUT_AIN14 , AD4170_I_OUT_AIN15 , AD4170_I_OUT_AINCOM , AD4170_I_OUT_GPIO0 , AD4170_I_OUT_GPIO1 , AD4170_I_OUT_GPIO2 , AD4170_I_OUT_GPIO3 }
	Current Source Destination. More...

enum	ad4170_i_out_val { AD4170_I_OUT_0UA , AD4170_I_OUT_10UA , AD4170_I_OUT_50UA , AD4170_I_OUT_100UA , AD4170_I_OUT_250UA , AD4170_I_OUT_500UA , AD4170_I_OUT_1000UA , AD4170_I_OUT_1500UA }
	Current Source Value. More...

enum	ad4170_fir_mode { AD4170_FIR_DEFAULT , AD4170_FIR_SYM_ODD , AD4170_FIR_SYM_EVEN , AD4170_FIR_ANTISYM_ODD , AD4170_FIR_ANTISYM_EVEN , AD4170_FIR_ASYM }
	Selects FIR Type. More...

enum	ad4170_fir_coeff_set { AD4170_FIR_COEFF_SET0 , AD4170_FIR_COEFF_SET1 }
	Selects FIR coefficient set. More...

enum	ad4170_dac_gain { AD4170_DAC_GAIN_1 , AD4170_DAC_GAIN_2 }
	DAC Output Span. More...

enum	ad4170_id { ID_AD4170 , ID_AD4171 , ID_AD4172 , ID_AD4190 , ID_AD4195 , ID_AD4190_8 , ID_AD4195_8 }
	Device selector ID. More...

Functions
int	ad4170_spi_reg_read (struct ad4170_dev dev, uint32_t reg_addr, uint32_t reg_data)
	Read device register.

int	ad4170_spi_reg_write (struct ad4170_dev *dev, uint32_t reg_addr, uint32_t reg_data)
	Write device register.

int	ad4170_spi_reg_write_mask (struct ad4170_dev *dev, uint32_t reg_addr, uint8_t mask, uint32_t reg_data)
	SPI write device register using a mask.

int	ad4170_reset_spi_interface (struct ad4170_dev *dev)
	Reset the SPI interface by sending reset sequence to device.

int	ad4170_get_data16 (struct ad4170_dev dev, uint16_t data)
	Get data from register Data_16b.

int	ad4170_get_data16s (struct ad4170_dev dev, uint16_t data, uint8_t *status)
	Get data and status from register Data_16b_Status.

int	ad4170_get_data24 (struct ad4170_dev dev, uint32_t data)
	Get data from register Data_24b.

int	ad4170_get_data24s (struct ad4170_dev dev, uint32_t data, uint8_t *status)
	Get data and status from register Data_24b_Status.

int	ad4170_get_data32 (struct ad4170_dev dev, uint32_t data)
	Get data from register Data_32b.

int	ad4170_get_ch_data (struct ad4170_dev dev, uint8_t ch, uint32_t data)
	Get data from register Data_Per_Channel[n].

int	ad4170_read16 (struct ad4170_dev dev, uint32_t pbuf, uint16_t nb_samples)
	Read multiple samples using direct register access from Data_16b.

int	ad4170_read16s (struct ad4170_dev dev, uint32_t pbuf, uint16_t nb_samples)
	Read multiple samples using direct register access from Data_16b_Status.

int	ad4170_read24 (struct ad4170_dev dev, uint32_t pbuf, uint16_t nb_samples)
	Read multiple samples using direct register access from Data_24.

int	ad4170_read24s (struct ad4170_dev dev, uint32_t pbuf, uint16_t nb_samples)
	Read multiple samples using direct register access from Data_24_Status.

int	ad4170_read32 (struct ad4170_dev dev, uint32_t pbuf, uint16_t nb_samples)
	Read multiple samples using direct register access from Data_32b.

int	ad4170_continuous_read (struct ad4170_dev dev, uint32_t data_out, uint8_t *status_out, uint16_t nb_samples)
	Read multiple samples in continuous read mode.

int	ad4170_continuous_read_exit (struct ad4170_dev *dev)
	Exit continuous read mode.

int	ad4170_continuous_transmit_exit (struct ad4170_dev *dev)
	Exit continuous transmit mode.

int	ad4170_reset (struct ad4170_dev *dev)
	Perform a software reset.

int	ad4170_get_status (struct ad4170_dev dev, uint16_t status)
	Get status from register Data_Status.

int	ad4170_set_pin_muxing (struct ad4170_dev *dev, struct ad4170_pin_muxing pin_muxing)
	Set the AD4170 Pin Muxing settings.

int	ad4170_set_dclk_div (struct ad4170_dev *dev, enum ad4170_dclk_div clk_div)
	Set the AD4170 DCLK configuration.

int	ad4170_set_mclk_div (struct ad4170_dev *dev, enum ad4170_mclk_div clk_div)
	Set the AD4170 MCLK configuration.

int	ad4170_set_clocksel (struct ad4170_dev *dev, enum ad4170_clocksel sel)
	Set the AD4170 clock selection configuration.

int	ad4170_set_standby_ctrl (struct ad4170_dev *dev, uint16_t standby_ctrl)
	Set the AD4170 Standby control settings.

int	ad4170_set_powerdown_sw (struct ad4170_dev *dev, uint16_t powerdown_sw)
	Set the AD4170 Powerdown switches settings.

int	ad4170_set_error_en (struct ad4170_dev *dev, uint16_t error_en)
	Set the AD4170 Error enable settings.

int	ad4170_set_error (struct ad4170_dev *dev, uint16_t error)
	Set the Error register with a value to clear specific errors.

int	ad4170_get_error (struct ad4170_dev dev, uint16_t error)
	Get the Error register.

int	ad4170_set_adc_ctrl (struct ad4170_dev *dev, struct ad4170_adc_ctrl adc_ctrl)
	Set the AD4170 ADC Control.

int	ad4170_set_channel_en (struct ad4170_dev *dev, uint16_t channel_en)
	Enable AD4170 channels.

int	ad4170_set_channel_setup (struct ad4170_dev *dev, uint8_t ch, struct ad4170_channel_setup setup)
	Set the AD4170 Channel specific setup.

int	ad4170_set_channel_map (struct ad4170_dev *dev, uint8_t ch, struct ad4170_channel_map map)
	Set the AD4170 Channel specific map.

int	ad4170_set_setup (struct ad4170_dev *dev, uint8_t n, struct ad4170_setup setup)
	Configure an ADC setup.

int	ad4170_set_ref_control (struct ad4170_dev *dev, bool enable)
	Set the AD4170 Ref Control.

int	ad4170_set_v_bias (struct ad4170_dev *dev, uint16_t ch_mask)
	Set the AD4170 Voltage bias.

int	ad4170_set_i_pullup (struct ad4170_dev *dev, uint16_t ch_mask)
	Set the AD4170 Input pullup.

int	ad4170_set_current_source (struct ad4170_dev *dev, uint8_t n, struct ad4170_current_source current_source)
	Set the AD4170 Excitation Current.

int	ad4170_set_fir_control (struct ad4170_dev *dev, struct ad4170_fir_control fir_control)
	Set the AD4170 FIR control settings.

int	ad4170_set_dac_config (struct ad4170_dev *dev, struct ad4170_dac_config config)
	Set the AD4170 DAC settings.

int	ad4170_set_dac_data (struct ad4170_dev *dev, uint16_t code)
	Set the AD4170 DAC data by directly writing the DAT_DATA register.

int	ad4170_set_dac_inputa (struct ad4170_dev *dev, uint16_t code)
	Set the AD4170 DAC data by writing the INPUTA register to be loaded separately by LDAC or Toggle operations.

int	ad4170_set_dac_inputb (struct ad4170_dev *dev, uint16_t code)
	Set the AD4170 DAC data by writing the INPUTB register to be loaded separately by LDAC or Toggle operations.

int	ad4170_dac_sw_ldac (struct ad4170_dev *dev, bool polarity)
	Perform a software LDAC.

int	ad4170_dac_sw_toggle (struct ad4170_dev *dev, bool polarity)
	Perform a software toggle.

int	ad4170_dac_hw_toggle (struct ad4170_dev *dev, bool polarity)
	Perform a hardware toggle using the DIG_AUX2 pin, assumed to be pre-configured for this.

int	ad4170_init (struct ad4170_dev *device, struct ad4170_init_param init_param)
	Initialize an AD4170 device structure.

int	ad4170_remove (struct ad4170_dev *dev)
	Remove the device and free al the resources.

int	ad4170_regmap (struct ad4170_dev *dev)
	Debugging function to print the register map to console.

Variables
struct ad4170_config	ad4170_config_reset

Detailed Description

Header file for the AD4170, AD4190 driver.

Author: Darius Berghe (dariu.nosp@m.s.be.nosp@m.rghe@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

◆ AD4170_ADC_CTRL_CONT_READ_STATUS_EN_MSK

#define AD4170_ADC_CTRL_CONT_READ_STATUS_EN_MSK NO_OS_BIT(6)

◆ AD4170_ADC_CTRL_MULTI_DATA_REG_SEL_MSK

#define AD4170_ADC_CTRL_MULTI_DATA_REG_SEL_MSK NO_OS_BIT(7)

◆ AD4170_ADC_CTRL_PARALLEL_FILT_EN_MSK

#define AD4170_ADC_CTRL_PARALLEL_FILT_EN_MSK NO_OS_BIT(8)

◆ AD4170_ADC_SETUPS_AFE_BIPOLAR_MSK

#define AD4170_ADC_SETUPS_AFE_BIPOLAR_MSK NO_OS_BIT(4)

◆ AD4170_ADC_SETUPS_AFE_PGA_GAIN_MSK

#define AD4170_ADC_SETUPS_AFE_PGA_GAIN_MSK NO_OS_GENMASK(3,0)

◆ AD4170_ADC_SETUPS_AFE_REF_BUF_M_MSK

#define AD4170_ADC_SETUPS_AFE_REF_BUF_M_MSK NO_OS_GENMASK(11,10)

◆ AD4170_ADC_SETUPS_AFE_REF_BUF_P_MSK

#define AD4170_ADC_SETUPS_AFE_REF_BUF_P_MSK NO_OS_GENMASK(9,8)

◆ AD4170_ADC_SETUPS_AFE_REF_SELECT_MSK

#define AD4170_ADC_SETUPS_AFE_REF_SELECT_MSK NO_OS_GENMASK(6,5)

◆ AD4170_ADC_SETUPS_FILTER_TYPE_MSK

#define AD4170_ADC_SETUPS_FILTER_TYPE_MSK NO_OS_GENMASK(3,0)

◆ AD4170_ADC_SETUPS_MISC_BURNOUT_MSK

#define AD4170_ADC_SETUPS_MISC_BURNOUT_MSK NO_OS_GENMASK(1,0)

◆ AD4170_ADC_SETUPS_MISC_CHOP_ADC_MSK

#define AD4170_ADC_SETUPS_MISC_CHOP_ADC_MSK NO_OS_GENMASK(9,8)

◆ AD4170_ADC_SETUPS_MISC_CHOP_IEXC_MSK

#define AD4170_ADC_SETUPS_MISC_CHOP_IEXC_MSK NO_OS_GENMASK(15,14)

◆ AD4170_ADC_SETUPS_POST_FILTER_SEL_MSK

#define AD4170_ADC_SETUPS_POST_FILTER_SEL_MSK NO_OS_GENMASK(7,4)

◆ AD4170_ADDR

#define AD4170_ADDR ( x )

Value:

((x) & 0xFFFF)

◆ AD4170_ADDR_ASCENSION_MSK

#define AD4170_ADDR_ASCENSION_MSK NO_OS_BIT(5)

◆ AD4170_CHANNEL

#define AD4170_CHANNEL ( ch )

Value:

NO_OS_BIT(ch)

NO_OS_BIT

#define NO_OS_BIT(x)

Definition no_os_util.h:23

◆ AD4170_CHANNEL_MAPN_AINM_MSK

#define AD4170_CHANNEL_MAPN_AINM_MSK NO_OS_GENMASK(4,0)

◆ AD4170_CHANNEL_MAPN_AINP_MSK

#define AD4170_CHANNEL_MAPN_AINP_MSK NO_OS_GENMASK(12,8)

◆ AD4170_CHANNEL_SETUPN_DELAY_N_MSK

#define AD4170_CHANNEL_SETUPN_DELAY_N_MSK NO_OS_GENMASK(6,4)

◆ AD4170_CHANNEL_SETUPN_REPEAT_N_MSK

#define AD4170_CHANNEL_SETUPN_REPEAT_N_MSK NO_OS_GENMASK(15,8)

◆ AD4170_CHANNEL_SETUPN_SETUP_N_MSK

#define AD4170_CHANNEL_SETUPN_SETUP_N_MSK NO_OS_GENMASK(2,0)

◆ AD4170_CLOCK_CTRL_CLOCKDIV_MSK

#define AD4170_CLOCK_CTRL_CLOCKDIV_MSK NO_OS_GENMASK(5,4)

◆ AD4170_CLOCK_CTRL_CLOCKSEL_MSK

#define AD4170_CLOCK_CTRL_CLOCKSEL_MSK NO_OS_GENMASK(1,0)

◆ AD4170_CLOCK_CTRL_DCLK_DIVIDE_MSK

#define AD4170_CLOCK_CTRL_DCLK_DIVIDE_MSK NO_OS_GENMASK(7,6)

◆ AD4170_CRC8_INITIAL_VALUE

#define AD4170_CRC8_INITIAL_VALUE 0xA5

◆ AD4170_CRC8_POLYNOMIAL

#define AD4170_CRC8_POLYNOMIAL 0x7

◆ AD4170_CURRENT_SOURCE_I_OUT_PIN_MSK

#define AD4170_CURRENT_SOURCE_I_OUT_PIN_MSK NO_OS_GENMASK(12,8)

◆ AD4170_CURRENT_SOURCE_I_OUT_VAL_MSK

#define AD4170_CURRENT_SOURCE_I_OUT_VAL_MSK NO_OS_GENMASK(2,0)

◆ AD4170_DATA_STATUS_CH_ACTIVE_MSK

#define AD4170_DATA_STATUS_CH_ACTIVE_MSK NO_OS_GENMASK(3,0)

◆ AD4170_DATA_STATUS_MASTER_ERR_S_MSK

#define AD4170_DATA_STATUS_MASTER_ERR_S_MSK NO_OS_BIT(7)

◆ AD4170_DATA_STATUS_POR_FLAG_S_MSK

#define AD4170_DATA_STATUS_POR_FLAG_S_MSK NO_OS_BIT(6)

◆ AD4170_DATA_STATUS_RDYB_MSK

#define AD4170_DATA_STATUS_RDYB_MSK NO_OS_BIT(5)

◆ AD4170_DATA_STATUS_SETTLED_FIR_MSK

#define AD4170_DATA_STATUS_SETTLED_FIR_MSK NO_OS_BIT(4)

◆ AD4170_ERROR_ADC_CONV_ERR_MSK

#define AD4170_ERROR_ADC_CONV_ERR_MSK NO_OS_BIT(3)

◆ AD4170_ERROR_AINM_OV_UV_ERR_MSK

#define AD4170_ERROR_AINM_OV_UV_ERR_MSK NO_OS_BIT(5)

◆ AD4170_ERROR_AINP_OV_UV_ERR_MSK

#define AD4170_ERROR_AINP_OV_UV_ERR_MSK NO_OS_BIT(4)

◆ AD4170_ERROR_ALDO_PSM_ERR_MSK

#define AD4170_ERROR_ALDO_PSM_ERR_MSK NO_OS_BIT(12)

◆ AD4170_ERROR_DEVICE_ERROR_MSK

#define AD4170_ERROR_DEVICE_ERROR_MSK NO_OS_BIT(15)

◆ AD4170_ERROR_DLDO_PSM_ERR_MSK

#define AD4170_ERROR_DLDO_PSM_ERR_MSK NO_OS_BIT(13)

◆ AD4170_ERROR_IOUT0_COMP_ERR_MSK

#define AD4170_ERROR_IOUT0_COMP_ERR_MSK NO_OS_BIT(8)

◆ AD4170_ERROR_IOUT1_COMP_ERR_MSK

#define AD4170_ERROR_IOUT1_COMP_ERR_MSK NO_OS_BIT(9)

◆ AD4170_ERROR_IOUT2_COMP_ERR_MSK

#define AD4170_ERROR_IOUT2_COMP_ERR_MSK NO_OS_BIT(10)

◆ AD4170_ERROR_IOUT3_COMP_ERR_MSK

#define AD4170_ERROR_IOUT3_COMP_ERR_MSK NO_OS_BIT(11)

◆ AD4170_ERROR_MM_CRC_ERR_MSK

#define AD4170_ERROR_MM_CRC_ERR_MSK NO_OS_BIT(1)

◆ AD4170_ERROR_REF_DIFF_MIN_ERR_MSK

#define AD4170_ERROR_REF_DIFF_MIN_ERR_MSK NO_OS_BIT(7)

◆ AD4170_ERROR_REF_OV_UV_ERR_MSK

#define AD4170_ERROR_REF_OV_UV_ERR_MSK NO_OS_BIT(6)

◆ AD4170_ERROR_ROM_CRC_ERR_MSK

#define AD4170_ERROR_ROM_CRC_ERR_MSK NO_OS_BIT(0)

◆ AD4170_FIR_COEFF_MAX_LENGTH

#define AD4170_FIR_COEFF_MAX_LENGTH 72

◆ AD4170_FIR_CONTROL_COEFF_SET_MSK

#define AD4170_FIR_CONTROL_COEFF_SET_MSK NO_OS_BIT(10)

◆ AD4170_FIR_CONTROL_FIR_LENGTH_MSK

#define AD4170_FIR_CONTROL_FIR_LENGTH_MSK NO_OS_GENMASK(6,0)

◆ AD4170_FIR_CONTROL_FIR_MODE_MSK

#define AD4170_FIR_CONTROL_FIR_MODE_MSK NO_OS_GENMASK(14,12)

◆ AD4170_FIR_CONTROL_IIR_MODE_MSK

#define AD4170_FIR_CONTROL_IIR_MODE_MSK NO_OS_BIT(15)

◆ AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION

#define AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION ( x )

Value:

(((x) & 0x1) << 3)

◆ AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION_MSK

#define AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION_MSK NO_OS_BIT(3)

◆ AD4170_INTERFACE_CONFIG_B_SINGLE_INST_MSK

#define AD4170_INTERFACE_CONFIG_B_SINGLE_INST_MSK NO_OS_BIT(7)

◆ AD4170_INTERFACE_CONFIG_C_CRC

#define AD4170_INTERFACE_CONFIG_C_CRC ( x )

Value:

(((~x) & 0x3) | (((x) << 6) & 0xC0))

◆ AD4170_INTERFACE_CONFIG_C_CRC_MSK

#define AD4170_INTERFACE_CONFIG_C_CRC_MSK (NO_OS_BIT(7) | NO_OS_BIT(6) | NO_OS_BIT(1) | NO_OS_BIT(0))

◆ AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS

#define AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS ( x )

Value:

(((x) & 0x1) << 5)

◆ AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS_MSK

#define AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS_MSK NO_OS_BIT(5)

◆ AD4170_INTERFACE_STATUS_A_ADDR_INVALID_ERR_MSK

#define AD4170_INTERFACE_STATUS_A_ADDR_INVALID_ERR_MSK NO_OS_BIT(0)

◆ AD4170_INTERFACE_STATUS_A_CLOCK_COUNT_ERR_MSK

#define AD4170_INTERFACE_STATUS_A_CLOCK_COUNT_ERR_MSK NO_OS_BIT(4)

◆ AD4170_INTERFACE_STATUS_A_CRC_ERR_MSK

#define AD4170_INTERFACE_STATUS_A_CRC_ERR_MSK NO_OS_BIT(3)

◆ AD4170_INTERFACE_STATUS_A_INVALID_ACCESS_ERR_MSK

#define AD4170_INTERFACE_STATUS_A_INVALID_ACCESS_ERR_MSK NO_OS_BIT(2)

◆ AD4170_INTERFACE_STATUS_A_NOT_READY_ERR_MSK

#define AD4170_INTERFACE_STATUS_A_NOT_READY_ERR_MSK NO_OS_BIT(7)

◆ AD4170_INTERFACE_STATUS_A_PARTIAL_ACCESS_ERR_MSK

#define AD4170_INTERFACE_STATUS_A_PARTIAL_ACCESS_ERR_MSK NO_OS_BIT(1)

◆ AD4170_NUM_CHANNELS

#define AD4170_NUM_CHANNELS 16

◆ AD4170_NUM_CURRENT_SOURCE

#define AD4170_NUM_CURRENT_SOURCE 4

◆ AD4170_NUM_SETUPS

#define AD4170_NUM_SETUPS 8

◆ AD4170_PIN_MUXING_CHAN_TO_GPIO_MSK

#define AD4170_PIN_MUXING_CHAN_TO_GPIO_MSK NO_OS_BIT(14)

◆ AD4170_PIN_MUXING_DIG_AUX1_CTRL_MSK

#define AD4170_PIN_MUXING_DIG_AUX1_CTRL_MSK NO_OS_GENMASK(5,4)

◆ AD4170_PIN_MUXING_DIG_AUX2_CTRL_MSK

#define AD4170_PIN_MUXING_DIG_AUX2_CTRL_MSK NO_OS_GENMASK(7,6)

◆ AD4170_PIN_MUXING_DIG_OUT_STR_MSK

#define AD4170_PIN_MUXING_DIG_OUT_STR_MSK NO_OS_BIT(1)

◆ AD4170_PIN_MUXING_SDO_RDBY_DLY_MSK

#define AD4170_PIN_MUXING_SDO_RDBY_DLY_MSK NO_OS_BIT(0)

◆ AD4170_PIN_MUXING_SYNC_CTRL_MSK

#define AD4170_PIN_MUXING_SYNC_CTRL_MSK NO_OS_GENMASK(3,2)

◆ AD4170_POWER_DOWN_SW_PDSW0_MSK

#define AD4170_POWER_DOWN_SW_PDSW0_MSK NO_OS_BIT(0)

◆ AD4170_POWER_DOWN_SW_PDSW1_MSK

#define AD4170_POWER_DOWN_SW_PDSW1_MSK NO_OS_BIT(1)

◆ AD4170_PRODUCT_ID_H_VALUE

#define AD4170_PRODUCT_ID_H_VALUE 0x0

◆ AD4170_PRODUCT_ID_L_VALUE

#define AD4170_PRODUCT_ID_L_VALUE 0x40

◆ AD4170_R1B

#define AD4170_R1B (1ul << 16)

◆ AD4170_R2B

#define AD4170_R2B (2ul << 16)

◆ AD4170_R3B

#define AD4170_R3B (3ul << 16)

◆ AD4170_R4B

#define AD4170_R4B (4ul << 16)

◆ AD4170_REF_CONTROL_REF_EN_MSK

#define AD4170_REF_CONTROL_REF_EN_MSK NO_OS_BIT(0)

◆ AD4170_REG_ADC_CHANNEL_MAP

#define AD4170_REG_ADC_CHANNEL_MAP ( ch )

Value:

(AD4170_R2B | (0x82 + 4 * (ch)))

AD4170_R2B

#define AD4170_R2B

Definition ad4170.h:24

◆ AD4170_REG_ADC_CHANNEL_SETUP

#define AD4170_REG_ADC_CHANNEL_SETUP ( ch )

Value:

(AD4170_R2B | (0x80 + 4 * (ch)))

◆ AD4170_REG_ADC_CTRL

#define AD4170_REG_ADC_CTRL (AD4170_R2B | 0x70)

◆ AD4170_REG_ADC_SETUPS_AFE

#define AD4170_REG_ADC_SETUPS_AFE ( n )

Value:

(AD4170_R2B | (0xc2 + 14 * (n)))

◆ AD4170_REG_ADC_SETUPS_FILTER

#define AD4170_REG_ADC_SETUPS_FILTER ( n )

Value:

(AD4170_R2B | (0xc4 + 14 * (n)))

◆ AD4170_REG_ADC_SETUPS_FILTER_FS

#define AD4170_REG_ADC_SETUPS_FILTER_FS ( n )

Value:

(AD4170_R2B | (0xc6 + 14 * (n)))

◆ AD4170_REG_ADC_SETUPS_GAIN

#define AD4170_REG_ADC_SETUPS_GAIN ( n )

Value:

(AD4170_R3B | (0xcb + 14 * (n)))

AD4170_R3B

#define AD4170_R3B

Definition ad4170.h:25

◆ AD4170_REG_ADC_SETUPS_MISC

#define AD4170_REG_ADC_SETUPS_MISC ( n )

Value:

(AD4170_R2B | (0xc0 + 14 * (n)))

◆ AD4170_REG_ADC_SETUPS_OFFSET

#define AD4170_REG_ADC_SETUPS_OFFSET ( n )

Value:

(AD4170_R3B | (0xc8 + 14 * (n)))

◆ AD4170_REG_CHANNEL_EN

#define AD4170_REG_CHANNEL_EN (AD4170_R2B | 0x78)

◆ AD4170_REG_CHIP_GRADE

#define AD4170_REG_CHIP_GRADE (AD4170_R1B | 0x06)

◆ AD4170_REG_CHIP_TYPE

#define AD4170_REG_CHIP_TYPE (AD4170_R1B | 0x03)

◆ AD4170_REG_CLOCK_CTRL

#define AD4170_REG_CLOCK_CTRL (AD4170_R2B | 0x6a)

◆ AD4170_REG_COEFF_ADDRESS

#define AD4170_REG_COEFF_ADDRESS (AD4170_R2B | 0x14b)

◆ AD4170_REG_COEFF_READ_DATA

#define AD4170_REG_COEFF_READ_DATA (AD4170_R4B | 0x147)

◆ AD4170_REG_COEFF_WRITE_DATA

#define AD4170_REG_COEFF_WRITE_DATA (AD4170_R4B | 0x143)

◆ AD4170_REG_COEFF_WRRD_STB

#define AD4170_REG_COEFF_WRRD_STB (AD4170_R2B | 0x14d)

◆ AD4170_REG_CTRL_CONT_READ_MSK

#define AD4170_REG_CTRL_CONT_READ_MSK NO_OS_GENMASK(5,4)

◆ AD4170_REG_CTRL_MODE_MSK

#define AD4170_REG_CTRL_MODE_MSK NO_OS_GENMASK(3,0)

◆ AD4170_REG_CURRENT_SOURCE

#define AD4170_REG_CURRENT_SOURCE ( n )

Value:

(AD4170_R2B | (0x138 + 2 * (n)))

◆ AD4170_REG_DAC_CHANNEL_EN

#define AD4170_REG_DAC_CHANNEL_EN (AD4170_R2B | 0x152)

◆ AD4170_REG_DAC_CHANNEL_EN_DAC_EN_MSK

#define AD4170_REG_DAC_CHANNEL_EN_DAC_EN_MSK NO_OS_BIT(0)

◆ AD4170_REG_DAC_DATA

#define AD4170_REG_DAC_DATA ( ch )

Value:

(AD4170_R2B | (0x158 + 2 * (ch)))

◆ AD4170_REG_DAC_DATA_MSK

#define AD4170_REG_DAC_DATA_MSK NO_OS_GENMASK(11,0)

◆ AD4170_REG_DAC_HW_LDAC_MASK

#define AD4170_REG_DAC_HW_LDAC_MASK (AD4170_R2B | 0x156)

◆ AD4170_REG_DAC_HW_LDAC_MASK_HW_LDAC_EN_MSK

#define AD4170_REG_DAC_HW_LDAC_MASK_HW_LDAC_EN_MSK NO_OS_BIT(0)

◆ AD4170_REG_DAC_HW_TOGGLE_MASK

#define AD4170_REG_DAC_HW_TOGGLE_MASK (AD4170_R2B | 0x154)

◆ AD4170_REG_DAC_HW_TOGGLE_MASK_HW_TOGGLE_EN_MSK

#define AD4170_REG_DAC_HW_TOGGLE_MASK_HW_TOGGLE_EN_MSK NO_OS_BIT(0)

◆ AD4170_REG_DAC_INPUTA

#define AD4170_REG_DAC_INPUTA ( ch )

Value:

(AD4170_R2B | (0x16c + 2 * (ch)))

◆ AD4170_REG_DAC_INPUTB

#define AD4170_REG_DAC_INPUTB ( ch )

Value:

(AD4170_R2B | (0x17c + 2 * (ch)))

◆ AD4170_REG_DAC_SPAN

#define AD4170_REG_DAC_SPAN (AD4170_R2B | 0x150)

◆ AD4170_REG_DAC_SPAN_DAC_GAIN_MSK

#define AD4170_REG_DAC_SPAN_DAC_GAIN_MSK NO_OS_BIT(0)

◆ AD4170_REG_DAC_SW_LDAC_TRIGGERS

#define AD4170_REG_DAC_SW_LDAC_TRIGGERS (AD4170_R2B | 0x16a)

◆ AD4170_REG_DAC_SW_LDAC_TRIGGERS_SW_LDAC_EN_MSK

#define AD4170_REG_DAC_SW_LDAC_TRIGGERS_SW_LDAC_EN_MSK NO_OS_BIT(0)

◆ AD4170_REG_DAC_SW_TOGGLE_TRIGGERS

#define AD4170_REG_DAC_SW_TOGGLE_TRIGGERS (AD4170_R2B | 0x168)

◆ AD4170_REG_DAC_SW_TOGGLE_TRIGGERS_SW_TOGGLE_MSK

#define AD4170_REG_DAC_SW_TOGGLE_TRIGGERS_SW_TOGGLE_MSK NO_OS_BIT(0)

◆ AD4170_REG_DATA_16b

#define AD4170_REG_DATA_16b (AD4170_R2B | 0x16)

◆ AD4170_REG_DATA_16b_STATUS

#define AD4170_REG_DATA_16b_STATUS (AD4170_R3B | 0x18)

◆ AD4170_REG_DATA_24b

#define AD4170_REG_DATA_24b (AD4170_R3B | 0x1c)

◆ AD4170_REG_DATA_24b_STATUS

#define AD4170_REG_DATA_24b_STATUS (AD4170_R4B | 0x20)

◆ AD4170_REG_DATA_32b

#define AD4170_REG_DATA_32b (AD4170_R4B | 0x24)

◆ AD4170_REG_DATA_PER_CHANNEL

#define AD4170_REG_DATA_PER_CHANNEL ( ch )

Value:

(AD4170_R3B | (0x28 + 4 * (ch)))

◆ AD4170_REG_DATA_STATUS

#define AD4170_REG_DATA_STATUS (AD4170_R2B | 0x14)

◆ AD4170_REG_DEVICE_CONFIG

#define AD4170_REG_DEVICE_CONFIG (AD4170_R1B | 0x02)

◆ AD4170_REG_ERROR

#define AD4170_REG_ERROR (AD4170_R2B | 0x74)

◆ AD4170_REG_ERROR_EN

#define AD4170_REG_ERROR_EN (AD4170_R2B | 0x72)

◆ AD4170_REG_FIR_CONTROL

#define AD4170_REG_FIR_CONTROL (AD4170_R2B | 0x140)

◆ AD4170_REG_GPIO_MODE

#define AD4170_REG_GPIO_MODE (AD4170_R2B | 0x190)

◆ AD4170_REG_I_PULLUP

#define AD4170_REG_I_PULLUP (AD4170_R2B | 0x136)

◆ AD4170_REG_INPUT_DATA

#define AD4170_REG_INPUT_DATA (AD4170_R2B | 0x194)

◆ AD4170_REG_INTERFACE_CONFIG_A

#define AD4170_REG_INTERFACE_CONFIG_A (AD4170_R1B | 0x00)

◆ AD4170_REG_INTERFACE_CONFIG_B

#define AD4170_REG_INTERFACE_CONFIG_B (AD4170_R1B | 0x01)

◆ AD4170_REG_INTERFACE_CONFIG_C

#define AD4170_REG_INTERFACE_CONFIG_C (AD4170_R1B | 0x10)

◆ AD4170_REG_INTERFACE_STATUS_A

#define AD4170_REG_INTERFACE_STATUS_A (AD4170_R1B | 0x11)

◆ AD4170_REG_OUTPUT_DATA

#define AD4170_REG_OUTPUT_DATA (AD4170_R2B | 0x192)

◆ AD4170_REG_PIN_MUXING

#define AD4170_REG_PIN_MUXING (AD4170_R2B | 0x68)

◆ AD4170_REG_POWER_DOWN_SW

#define AD4170_REG_POWER_DOWN_SW (AD4170_R2B | 0x6e)

◆ AD4170_REG_PRODUCT_ID_H

#define AD4170_REG_PRODUCT_ID_H (AD4170_R1B | 0x05)

◆ AD4170_REG_PRODUCT_ID_L

#define AD4170_REG_PRODUCT_ID_L (AD4170_R1B | 0x04)

◆ AD4170_REG_READ_14

#define AD4170_REG_READ_14 ( x )

Value:

(((x) & 0x3FFF) | 0x4000)

◆ AD4170_REG_READ_6

#define AD4170_REG_READ_6 ( x )

Value:

(((x) & 0x3F) | 0x40)

◆ AD4170_REG_REF_CONTROL

#define AD4170_REG_REF_CONTROL (AD4170_R2B | 0x130)

◆ AD4170_REG_SCRATCH_PAD

#define AD4170_REG_SCRATCH_PAD (AD4170_R1B | 0x0a)

◆ AD4170_REG_SPI_REVISION

#define AD4170_REG_SPI_REVISION (AD4170_R1B | 0x0b)

◆ AD4170_REG_STANDBY_CTRL

#define AD4170_REG_STANDBY_CTRL (AD4170_R2B | 0x6c)

◆ AD4170_REG_V_BIAS

#define AD4170_REG_V_BIAS (AD4170_R2B | 0x134)

◆ AD4170_REG_VENDOR_H

#define AD4170_REG_VENDOR_H (AD4170_R1B | 0x0d)

◆ AD4170_REG_VENDOR_L

#define AD4170_REG_VENDOR_L (AD4170_R1B | 0x0c)

◆ AD4170_REG_WRITE_14

#define AD4170_REG_WRITE_14 ( x )

Value:

((x) & 0x3FFF)

◆ AD4170_REG_WRITE_6

#define AD4170_REG_WRITE_6 ( x )

Value:

((x) & 0x3F)

◆ AD4170_SDO_ENABLE_MSK

#define AD4170_SDO_ENABLE_MSK NO_OS_BIT(4)

◆ AD4170_SPI_SYNC_PATTERN

#define AD4170_SPI_SYNC_PATTERN 0x2645

◆ AD4170_STANDBY_CTRL_STB_EN_CLOCK_MSK

#define AD4170_STANDBY_CTRL_STB_EN_CLOCK_MSK NO_OS_BIT(8)

◆ AD4170_STANDBY_CTRL_STB_EN_DAC_MSK

#define AD4170_STANDBY_CTRL_STB_EN_DAC_MSK NO_OS_BIT(5)

◆ AD4170_STANDBY_CTRL_STB_EN_DIAGNOSTICS_MSK

#define AD4170_STANDBY_CTRL_STB_EN_DIAGNOSTICS_MSK NO_OS_BIT(6)

◆ AD4170_STANDBY_CTRL_STB_EN_IEXC_MSK

#define AD4170_STANDBY_CTRL_STB_EN_IEXC_MSK NO_OS_BIT(1)

◆ AD4170_STANDBY_CTRL_STB_EN_IPULLUP_MSK

#define AD4170_STANDBY_CTRL_STB_EN_IPULLUP_MSK NO_OS_BIT(7)

◆ AD4170_STANDBY_CTRL_STB_EN_PDSW0_MSK

#define AD4170_STANDBY_CTRL_STB_EN_PDSW0_MSK NO_OS_BIT(3)

◆ AD4170_STANDBY_CTRL_STB_EN_PDSW1_MSK

#define AD4170_STANDBY_CTRL_STB_EN_PDSW1_MSK NO_OS_BIT(4)

◆ AD4170_STANDBY_CTRL_STB_EN_REFERENCE_MSK

#define AD4170_STANDBY_CTRL_STB_EN_REFERENCE_MSK NO_OS_BIT(0)

◆ AD4170_STANDBY_CTRL_STB_EN_VBIAS_MSK

#define AD4170_STANDBY_CTRL_STB_EN_VBIAS_MSK NO_OS_BIT(2)

◆ AD4170_SW_RESET_MSK

#define AD4170_SW_RESET_MSK NO_OS_BIT(7)

◆ AD4170_SW_RESETX_MSK

#define AD4170_SW_RESETX_MSK NO_OS_BIT(0)

◆ AD4170_TRANSF_LEN

#define AD4170_TRANSF_LEN ( x )

Value:

((x) >> 16)

◆ AD4190_8_PRODUCT_ID_H_VALUE

#define AD4190_8_PRODUCT_ID_H_VALUE 0x0

◆ AD4190_8_PRODUCT_ID_L_VALUE

#define AD4190_8_PRODUCT_ID_L_VALUE 0x49

◆ AD4190_PRODUCT_ID_H_VALUE

#define AD4190_PRODUCT_ID_H_VALUE 0x0

◆ AD4190_PRODUCT_ID_L_VALUE

#define AD4190_PRODUCT_ID_L_VALUE 0x48

◆ AD4195_8_PRODUCT_ID_H_VALUE

#define AD4195_8_PRODUCT_ID_H_VALUE 0x0

◆ AD4195_8_PRODUCT_ID_L_VALUE

#define AD4195_8_PRODUCT_ID_L_VALUE 0x49

◆ ECOMM

#define ECOMM 70

Enumeration Type Documentation

◆ ad4170_ain

enum ad4170_ain

Multiplexer Positive/Negative Input for This Channel.

Enumerator
AD4170_AIN0
AD4170_AIN1
AD4170_AIN2
AD4170_AIN3
AD4170_AIN4
AD4170_AIN5
AD4170_AIN6
AD4170_AIN7
AD4170_AIN8
AD4170_AIN9
AD4170_AIN10
AD4170_AIN11
AD4170_AIN12
AD4170_AIN13
AD4170_AIN14
AD4170_AIN15
AD4170_AIN16
AD4170_TEMP_SENSOR_P
AD4170_TEMP_SENSOR_N
AD4170_AVDD_AVSS_P
AD4170_AVDD_AVSS_N
AD4170_IOVDD_DGND_P
AD4170_IOVDD_DGND_N
AD4170_DAC
AD4170_ALDO
AD4170_DLDO
AD4170_AVSS
AD4170_DGND
AD4170_REFIN1_P
AD4170_REFIN1_N
AD4170_REFIN2_P
AD4170_REFIN2_N
AD4170_REFOUT
AD4170_OPEN

◆ ad4170_burnout

enum ad4170_burnout

Burnout Current Values.

Enumerator
AD4170_BURNOUT_OFF	Off
AD4170_BURNOUT_100N	100nA
AD4170_BURNOUT_2U	2uA
AD4170_BURNOUT_10U	100uA

◆ ad4170_chan_to_gpio

enum ad4170_chan_to_gpio

Enables Current Channel Number Be Output to GPIO Pins.

Enumerator
AD4170_CHANNEL_NOT_TO_GPIO	Active Channel is Not Output to GPIO Pins.
AD4170_CHANNEL_TO_GPIO	Active Channel is Output to GPIO Pins.

◆ ad4170_chop_adc

enum ad4170_chop_adc

ADC/Mux Chopping Control.

Enumerator
AD4170_CHOP_OFF	No Chopping.
AD4170_CHOP_MUX	Chops Internal Mux.
AD4170_CHOP_ACX_4PIN	Chops AC Excitation Using 4 GPIO Pins.
AD4170_CHOP_ACX_2PIN	Chops AC Excitation Using 2 GPIO Pins.

◆ ad4170_chop_iexc

enum ad4170_chop_iexc

Excitation Current Chopping Control.

Enumerator
AD4170_CHOP_IEXC_OFF	No Chopping of Excitation Currents.
AD4170_CHOP_IEXC_AB	Chopping of Iout_A and Iout_B Excitation Currents.
AD4170_CHOP_IEXC_CD	Chopping of Iout_C and Iout_D Excitation Currents.
AD4170_CHOP_IEXC_ABCD	Chopping of Both Pairs of Excitation Currents.

◆ ad4170_clocksel

enum ad4170_clocksel

ADC Clock Select.

Enumerator
AD4170_INTERNAL_OSC	Internal Oscillator.
AD4170_INTERNAL_OSC_OUTPUT	Internal Oscillator, Output to XTAL2/CLKIO Pin.
AD4170_EXTERNAL_OSC	External Clock Input on XTAL2/CLKIO Pin.
AD4170_EXTERNAL_XTAL	External Crystal on XTAL1 and XTAL2/CLKIO Pins.

◆ ad4170_cont_read

enum ad4170_cont_read

Configures continuous Data Register Read/Transmit.

Enumerator
AD4170_CONT_READ_OFF	Disable Continuous Read/Transmit.
AD4170_CONT_READ_ON	Enable Continuous Read. This enables continuous read of the ADC Data register over SPI.
AD4170_CONT_TRANSMIT_ON	Enable Continuous Transmit. This enables continuous transmit of the ADC Data register over TDM.

◆ ad4170_dac_gain

enum ad4170_dac_gain

DAC Output Span.

Enumerator
AD4170_DAC_GAIN_1	DAC Output Range is 0V to REFOUT.
AD4170_DAC_GAIN_2	DAC Output Range is 0V to 2*REFOUT.

◆ ad4170_dclk_div

enum ad4170_dclk_div

Continuous Transmit Data Clock Divider.

Enumerator
AD4170_DCLKDIVBY1	DCLK Equals Master Clock Divide by 1.
AD4170_DCLKDIVBY2	DCLK Equals Master Clock Divide by 2.
AD4170_DCLKDIVBY4	DCLK Equals Master Clock Divide by 4.
AD4170_DCLKDIVBY8	DCLK Equals Master Clock Divide by 8.

◆ ad4170_delay_n

enum ad4170_delay_n

Delay to Add After Channel Switch.

Enumerator
AD4170_DLY_0	0 Delay.
AD4170_DLY_16	Delay 16 * Mod_Clk.
AD4170_DLY_256	Delay 256 * Mod_Clk.
AD4170_DLY_1024	Delay 1024 * Mod_Clk.
AD4170_DLY_2048	Delay 2048 * Mod_Clk.
AD4170_DLY_4096	Delay 4096 * Mod_Clk.
AD4170_DLY_8192	Delay 8192 * Mod_Clk.
AD4170_DLY_16384	Delay 16384 * Mod_Clk.

◆ ad4170_dig_aux1_ctrl

enum ad4170_dig_aux1_ctrl

Configures Functionality of DIG_AUX1 Pin.

Enumerator
AD4170_DIG_AUX1_DISABLED	Dig_Aux1 Pin Disabled. High Impedance
AD4170_DIG_AUX1_RDY	Dig_Aux1 Pin Configured as ADC Data Ready Output.
AD4170_DIG_AUX1_SYNC	Dig_Aux1 Pin Configured as SYNC_OUT Output.
AD4170_DIG_AUX1_MODOUT	Dig_Aux1 Pin Configured Modulator Data Output.

◆ ad4170_dig_aux2_ctrl

enum ad4170_dig_aux2_ctrl

Configures Functionality of DIG_AUX2 Pin.

Enumerator
AD4170_DIG_AUX2_DISABLED	Dig_Aux2 Pin Disabled. High Impedance
AD4170_DIG_AUX2_LDAC	Dig_Aux2 Pin Configured as DAC LDAC Input.
AD4170_DIG_AUX2_SYNC	Dig_Aux2 Pin Configured as START Input.
AD4170_DIG_AUX2_MODOUT	Dig_Aux2 Pin Configured as Modulator Data Output.

◆ ad4170_dig_out_str

enum ad4170_dig_out_str

Configures the drive strength of the Digital Outputs.

Enumerator
AD4170_DIG_STR_DEFAULT	Default Drive Strength. Recommended for higher IOVDD voltages.
AD4170_DIG_STR_HIGH	Increased Drive Strength.

◆ ad4170_filter_type

enum ad4170_filter_type

Filter Mode for Sinc-Based Filters.

Enumerator
AD4170_FILT_SINC5_AVG	Sinc5 Plus Average.
AD4170_FILT_SINC5	Sinc5
AD4170_FILT_SINC3	Sinc3

◆ ad4170_fir_coeff_set

enum ad4170_fir_coeff_set

Selects FIR coefficient set.

Enumerator
AD4170_FIR_COEFF_SET0
AD4170_FIR_COEFF_SET1

◆ ad4170_fir_mode

enum ad4170_fir_mode

Selects FIR Type.

Enumerator
AD4170_FIR_DEFAULT	FIR Default. Selects the default FIR filter and ignores any programmed FIR_Length and FIR Coefficient values.
AD4170_FIR_SYM_ODD	FIR Programmable with Odd Symmetric Coefficients.
AD4170_FIR_SYM_EVEN	FIR Programmable with Even Symmetric Coefficients.
AD4170_FIR_ANTISYM_ODD	FIR Programmable with Odd Anti-Symmetric Coefficients.
AD4170_FIR_ANTISYM_EVEN	FIR Programmable with Even Anti-Symmetric Coefficients.
AD4170_FIR_ASYM	FIR Programmable with Asymmetric Coefficients.

◆ ad4170_i_out_pin

enum ad4170_i_out_pin

Current Source Destination.

Enumerator
AD4170_I_OUT_AIN0	I_OUT is Available on AIN0.
AD4170_I_OUT_AIN1	I_OUT is Available on AIN1.
AD4170_I_OUT_AIN2	I_OUT is Available on AIN2.
AD4170_I_OUT_AIN3	I_OUT is Available on AIN3.
AD4170_I_OUT_AIN4	I_OUT is Available on AIN4.
AD4170_I_OUT_AIN5	I_OUT is Available on AIN5.
AD4170_I_OUT_AIN6	I_OUT is Available on AIN6.
AD4170_I_OUT_AIN7	I_OUT is Available on AIN7.
AD4170_I_OUT_AIN8	I_OUT is Available on AIN8.
AD4170_I_OUT_AIN9	I_OUT is Available on AIN9.
AD4170_I_OUT_AIN10	I_OUT is Available on AIN10.
AD4170_I_OUT_AIN11	I_OUT is Available on AIN11.
AD4170_I_OUT_AIN12	I_OUT is Available on AIN12.
AD4170_I_OUT_AIN13	I_OUT is Available on AIN13.
AD4170_I_OUT_AIN14	I_OUT is Available on AIN14.
AD4170_I_OUT_AIN15	I_OUT is Available on AIN15.
AD4170_I_OUT_AINCOM	I_OUT is Available on AINCOM.
AD4170_I_OUT_GPIO0	I_OUT is Available on GPIO0.
AD4170_I_OUT_GPIO1	I_OUT is Available on GPIO1.
AD4170_I_OUT_GPIO2	I_OUT is Available on GPIO2.
AD4170_I_OUT_GPIO3	I_OUT is Available on GPIO3.

◆ ad4170_i_out_val

enum ad4170_i_out_val

Current Source Value.

Enumerator
AD4170_I_OUT_0UA	0uA
AD4170_I_OUT_10UA	10uA
AD4170_I_OUT_50UA	50uA
AD4170_I_OUT_100UA	100uA
AD4170_I_OUT_250UA	250uA
AD4170_I_OUT_500UA	500uA
AD4170_I_OUT_1000UA	1000uA
AD4170_I_OUT_1500UA	1500uA

◆ ad4170_id

enum ad4170_id

Device selector ID.

Enumerator
ID_AD4170
ID_AD4171
ID_AD4172
ID_AD4190
ID_AD4195
ID_AD4190_8
ID_AD4195_8

◆ ad4170_mclk_div

enum ad4170_mclk_div

Master Clock Divider.

Enumerator
AD4170_CLKDIVBY1	Divide by 1.
AD4170_CLKDIVBY2	Divide by 2.
AD4170_CLKDIVBY4	Divide by 4.
AD4170_CLKDIVBY8	Divide by 8.

◆ ad4170_mode

enum ad4170_mode

ADC Operating Mode.

Enumerator
AD4170_MODE_CONT	Continuous Conversion Mode. ADC converts continuously on the enabled channel(s) using Sinc-based filters.
AD4170_MODE_CONT_FIR	Continuous Conversion Mode with FIR filter. ADC converts continuously on one channel using the FIR Filter.
AD4170_MODE_CONT_IIR	Continuous Conversion Mode with IIR filter. ADC converts continuously on one channel using the IIR Filter.
AD4170_MODE_SINGLE	Single conversion mode. ADC performs a single conversion (possibly repeated) on each enabled channel(s) using Sinc based filters.
AD4170_MODE_STANDBY	Standby Mode. Part enters Standby Mode.
AD4170_MODE_POWER_DOWN	Power-Down Mode. All blocks are disabled in Power-Down Mode, including the LDO regulators and the serial interface.
AD4170_MODE_IDLE	Idle Mode. ADC enters idle mode, part remains powered on.
AD4170_MODE_SYS_OFFSET_CAL	System Offset Calibration Mode.
AD4170_MODE_SYS_GAIN_CAL	System Gain Calibration Mode.
AD4170_MODE_SELF_OFFSET_CAL	Self Offset Calibration Mode.
AD4170_MODE_SELF_GAIN_CAL	Self Gain Calibration Mode.

◆ ad4170_pga_gain

enum ad4170_pga_gain

PGA Gain Selection.

Enumerator
AD4170_PGA_GAIN_1	PGA Gain = 1
AD4170_PGA_GAIN_2	PGA Gain = 2
AD4170_PGA_GAIN_4	PGA Gain = 4
AD4170_PGA_GAIN_8	PGA Gain = 8
AD4170_PGA_GAIN_16	PGA Gain = 16
AD4170_PGA_GAIN_32	PGA Gain = 32
AD4170_PGA_GAIN_64	PGA Gain = 64
AD4170_PGA_GAIN_128	PGA Gain = 128
AD4170_PGA_GAIN_0P5	PGA Gain = 0.5
AD4170_PGA_GAIN_1_PRECHARGE	PGA Gain = 1 Pre-charge Buffer. Input currents may increase when the pre-charge-buffer is used.

◆ ad4170_post_filter

enum ad4170_post_filter

Optional Post-Filter configuration.

Enumerator
AD4170_POST_FILTER_NONE	No Post Filter.
AD4170_POST_FILTER_40MS	Post Filter for 50/60Hz Rejection with 40ms Settling.
AD4170_POST_FILTER_50MS	Post Filter for 50/60Hz Rejection with 50ms Settling.
AD4170_POST_FILTER_60MS	Post Filter for 50/60Hz Rejection with 60ms Settling.
AD4170_POST_FILTER_FAST_AC	Post Filter for AC Excitation with 5ms Settling.
AD4170_POST_FILTER_AVG16	Post Filter for Average-By-16.
AD4170_POST_FILTER_AVG20	Post Filter for 60Hz Rejection with 16.7ms Settling.
AD4170_POST_FILTER_AVG24	Post Filter for 50Hz Rejection with 20ms Settling.

◆ ad4170_ref_buf

enum ad4170_ref_buf

REFIN Buffer Enable.

Enumerator
AD4170_REF_BUF_PRE	Pre-charge Buffer.
AD4170_REF_BUF_FULL	Full Buffer.
AD4170_REF_BUF_BYPASS	Bypass

◆ ad4170_ref_select

enum ad4170_ref_select

ADC Reference Selection.

Enumerator
AD4170_REFIN_REFIN1	Refin1+, Refin1-.
AD4170_REFIN_REFIN2	Refin2+, Refin2-.
AD4170_REFIN_REFOUT	Refout, AVSS. The 2.5V Refout must be enabled separately in the ref_control register.
AD4170_REFIN_AVDD	AVDD, AVSS.

◆ ad4170_sdo_rdby_dly

enum ad4170_sdo_rdby_dly

Reset Interface on CS or SCLK.

Enumerator
AD4170_SDO_RDY_SCLK	Reset on Last SCLK.
AD4170_SDO_RDY_CSB	Reset on /CS Edge.

◆ ad4170_sync_ctrl

enum ad4170_sync_ctrl

Configures SYNC_IN Pin for ADC Synchronization.

Enumerator
AD4170_SYNC_DISABLED	SYNC_IN Pin Disabled.
AD4170_SYNC_STANDARD	SYNC_IN Has Default SYNC Functionality.
AD4170_SYNC_ALTERNATE	SYNC_IN Has Alternative SYNC Functionality.

Function Documentation

◆ ad4170_continuous_read()

int ad4170_continuous_read	(	struct ad4170_dev *	dev,
		uint32_t *	data_out,
		uint8_t *	status_out,
		uint16_t	nb_samples )

Read multiple samples in continuous read mode.

Parameters

dev	- The device structure.
data_out	- Output pointer where to store the data values.
status_out	- Output pointer where to store the status values.
nb_samples	- The number of samples to read.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_continuous_read_exit()

int ad4170_continuous_read_exit ( struct ad4170_dev * dev )

Exit continuous read mode.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_continuous_transmit_exit()

int ad4170_continuous_transmit_exit ( struct ad4170_dev * dev )

Exit continuous transmit mode.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_dac_hw_toggle()

int ad4170_dac_hw_toggle	(	struct ad4170_dev *	dev,
		bool	polarity )

Perform a hardware toggle using the DIG_AUX2 pin, assumed to be pre-configured for this.

Parameters

dev	- The device structure.
polarity	- Polarity of the toggle operation.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_dac_sw_ldac()

int ad4170_dac_sw_ldac	(	struct ad4170_dev *	dev,
		bool	polarity )

Perform a software LDAC.

Parameters

dev	- The device structure.
polarity	- Polarity of the LDAC operation.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_dac_sw_toggle()

int ad4170_dac_sw_toggle	(	struct ad4170_dev *	dev,
		bool	polarity )

Perform a software toggle.

Parameters

dev	- The device structure.
polarity	- Polarity of the toggle operation.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_get_ch_data()

int ad4170_get_ch_data	(	struct ad4170_dev *	dev,
		uint8_t	ch,
		uint32_t *	data )

Get data from register Data_Per_Channel[n].

This function assumes Per-Channel ADC Data is enabled, otherwise the output data may contain zeroes.

Parameters

dev	- The device structure.
ch	- The channel number (0 to 15)
data	- Output pointer where to store the data value.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_get_data16()

int ad4170_get_data16	(	struct ad4170_dev *	dev,
		uint16_t *	data )

Get data from register Data_16b.

Parameters

dev	- The device structure.
data	- Output pointer where to store the data value.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_get_data16s()

int ad4170_get_data16s	(	struct ad4170_dev *	dev,
		uint16_t *	data,
		uint8_t *	status )

Get data and status from register Data_16b_Status.

Parameters

dev	- The device structure.
data	- Output pointer where to store the data value.
status	- Output pointer where to store the status value.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_get_data24()

int ad4170_get_data24	(	struct ad4170_dev *	dev,
		uint32_t *	data )

Get data from register Data_24b.

Parameters

dev	- The device structure.
data	- Output pointer where to store the data value.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_get_data24s()

int ad4170_get_data24s	(	struct ad4170_dev *	dev,
		uint32_t *	data,
		uint8_t *	status )

Get data and status from register Data_24b_Status.

Parameters

dev	- The device structure.
data	- Output pointer where to store the data value.
status	- Output pointer where to store the status value.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_get_data32()

int ad4170_get_data32	(	struct ad4170_dev *	dev,
		uint32_t *	data )

Get data from register Data_32b.

Parameters

dev	- The device structure.
data	- Output pointer where to store the data value.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_get_error()

int ad4170_get_error	(	struct ad4170_dev *	dev,
		uint16_t *	error )

Get the Error register.

Parameters

dev	- The device structure.
error	- Pointer to where Error register content should be stored.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_get_status()

int ad4170_get_status	(	struct ad4170_dev *	dev,
		uint16_t *	status )

Get status from register Data_Status.

Parameters

dev	- The device structure.
status	- Output pointer where to store the status value.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_init()

int ad4170_init	(	struct ad4170_dev **	device,
		struct ad4170_init_param *	init_param )

Initialize an AD4170 device structure.

Parameters

device	- Pointer to the device structure (memory is allocated within this function).
init_param	- Pointer to the initialization parameters.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_read16()

int ad4170_read16	(	struct ad4170_dev *	dev,
		uint32_t *	pbuf,
		uint16_t	nb_samples )

Read multiple samples using direct register access from Data_16b.

Parameters

dev	- The device structure.
pbuf	- Output pointer where to store the data values.
nb_samples	- The number of samples to read.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_read16s()

int ad4170_read16s	(	struct ad4170_dev *	dev,
		uint32_t *	pbuf,
		uint16_t	nb_samples )

Read multiple samples using direct register access from Data_16b_Status.

Parameters

dev	- The device structure.
pbuf	- Output pointer where to store the data values.
nb_samples	- The number of samples to read.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_read24()

int ad4170_read24	(	struct ad4170_dev *	dev,
		uint32_t *	pbuf,
		uint16_t	nb_samples )

Read multiple samples using direct register access from Data_24.

Parameters

dev	- The device structure.
pbuf	- Output pointer where to store the data values.
nb_samples	- The number of samples to read.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_read24s()

int ad4170_read24s	(	struct ad4170_dev *	dev,
		uint32_t *	pbuf,
		uint16_t	nb_samples )

Read multiple samples using direct register access from Data_24_Status.

Parameters

dev	- The device structure.
pbuf	- Output pointer where to store the data values.
nb_samples	- The number of samples to read.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_read32()

int ad4170_read32	(	struct ad4170_dev *	dev,
		uint32_t *	pbuf,
		uint16_t	nb_samples )

Read multiple samples using direct register access from Data_32b.

Parameters

dev	- The device structure.
pbuf	- Output pointer where to store the data values.
nb_samples	- The number of samples to read.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_regmap()

int ad4170_regmap ( struct ad4170_dev * dev )

Debugging function to print the register map to console.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_remove()

int ad4170_remove ( struct ad4170_dev * dev )

Remove the device and free al the resources.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_reset()

int ad4170_reset ( struct ad4170_dev * dev )

Perform a software reset.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_reset_spi_interface()

int ad4170_reset_spi_interface ( struct ad4170_dev * dev )

Reset the SPI interface by sending reset sequence to device.

Parameters

dev	- The device structure.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_adc_ctrl()

int ad4170_set_adc_ctrl	(	struct ad4170_dev *	dev,
		struct ad4170_adc_ctrl	adc_ctrl )

Set the AD4170 ADC Control.

Parameters

dev	- The device structure.
adc_ctrl	- AD4170 ADC Control configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_channel_en()

int ad4170_set_channel_en	(	struct ad4170_dev *	dev,
		uint16_t	channel_en )

Enable AD4170 channels.

Parameters

dev	- The device structure.
channel_en	- Channel enable mask.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_channel_map()

int ad4170_set_channel_map	(	struct ad4170_dev *	dev,
		uint8_t	ch,
		struct ad4170_channel_map	map )

Set the AD4170 Channel specific map.

Parameters

dev	- The device structure.
ch	- The channel number (0 to 15).
map	- AD4170 Channel specific map configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_channel_setup()

int ad4170_set_channel_setup	(	struct ad4170_dev *	dev,
		uint8_t	ch,
		struct ad4170_channel_setup	setup )

Set the AD4170 Channel specific setup.

Parameters

dev	- The device structure.
ch	- The channel number (0 to 15).
setup	- AD4170 Channel specific setup configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_clocksel()

int ad4170_set_clocksel	(	struct ad4170_dev *	dev,
		enum ad4170_clocksel	sel )

Set the AD4170 clock selection configuration.

Parameters

dev	- The device structure.
sel	- AD4170 clock selection configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_current_source()

int ad4170_set_current_source	(	struct ad4170_dev *	dev,
		uint8_t	n,
		struct ad4170_current_source	current_source )

Set the AD4170 Excitation Current.

Parameters

dev	- The device structure.
n	- Current source number (0 to 3).
current_source	- Excitation current confguration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_dac_config()

int ad4170_set_dac_config	(	struct ad4170_dev *	dev,
		struct ad4170_dac_config	config )

Set the AD4170 DAC settings.

Parameters

dev	- The device structure.
config	- The DAC configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_dac_data()

int ad4170_set_dac_data	(	struct ad4170_dev *	dev,
		uint16_t	code )

Set the AD4170 DAC data by directly writing the DAT_DATA register.

Parameters

dev	- The device structure.
code	- The DAC code.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_dac_inputa()

int ad4170_set_dac_inputa	(	struct ad4170_dev *	dev,
		uint16_t	code )

Set the AD4170 DAC data by writing the INPUTA register to be loaded separately by LDAC or Toggle operations.

Parameters

dev	- The device structure.
code	- The DAC code.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_dac_inputb()

int ad4170_set_dac_inputb	(	struct ad4170_dev *	dev,
		uint16_t	code )

Set the AD4170 DAC data by writing the INPUTB register to be loaded separately by LDAC or Toggle operations.

Parameters

dev	- The device structure.
code	- The DAC code.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_dclk_div()

int ad4170_set_dclk_div	(	struct ad4170_dev *	dev,
		enum ad4170_dclk_div	div )

Set the AD4170 DCLK configuration.

Parameters

dev	- The device structure.
div	- AD4170 DCLK configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_error()

int ad4170_set_error	(	struct ad4170_dev *	dev,
		uint16_t	error )

Set the Error register with a value to clear specific errors.

Parameters

dev	- The device structure.
error	- Error mask (set bits will be cleared from the Error register).

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_error_en()

int ad4170_set_error_en	(	struct ad4170_dev *	dev,
		uint16_t	error_en )

Set the AD4170 Error enable settings.

Parameters

dev	- The device structure.
error_en	- AD4170 Error enable configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_fir_control()

int ad4170_set_fir_control	(	struct ad4170_dev *	dev,
		struct ad4170_fir_control	fir_control )

Set the AD4170 FIR control settings.

Parameters

dev	- The device structure.
fir_control	- FIR control configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_i_pullup()

int ad4170_set_i_pullup	(	struct ad4170_dev *	dev,
		uint16_t	ch_mask )

Set the AD4170 Input pullup.

Parameters

dev	- The device structure.
ch_mask	- Input pullup enable mask.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_mclk_div()

int ad4170_set_mclk_div	(	struct ad4170_dev *	dev,
		enum ad4170_mclk_div	div )

Set the AD4170 MCLK configuration.

Parameters

dev	- The device structure.
div	- AD4170 MCLK configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_pin_muxing()

int ad4170_set_pin_muxing	(	struct ad4170_dev *	dev,
		struct ad4170_pin_muxing	pin_muxing )

Set the AD4170 Pin Muxing settings.

Parameters

dev	- The device structure.
pin_muxing	- AD4170 Pin Muxing configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_powerdown_sw()

int ad4170_set_powerdown_sw	(	struct ad4170_dev *	dev,
		uint16_t	powerdown_sw )

Set the AD4170 Powerdown switches settings.

Parameters

dev	- The device structure.
powerdown_sw	- AD4170 Powerdown switches configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_ref_control()

int ad4170_set_ref_control	(	struct ad4170_dev *	dev,
		bool	enable )

Set the AD4170 Ref Control.

Parameters

dev	- The device structure.
enable	- Enable/Disable Ref Control.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_setup()

int ad4170_set_setup	(	struct ad4170_dev *	dev,
		uint8_t	n,
		struct ad4170_setup	setup )

Configure an ADC setup.

Parameters

dev	- The device structure.
n	- The setup number (0 to 8).
setup	- AD4170 setup configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_standby_ctrl()

int ad4170_set_standby_ctrl	(	struct ad4170_dev *	dev,
		uint16_t	standby_ctrl )

Set the AD4170 Standby control settings.

Parameters

dev	- The device structure.
standby_ctrl	- AD4170 Standby control configuration.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_set_v_bias()

int ad4170_set_v_bias	(	struct ad4170_dev *	dev,
		uint16_t	ch_mask )

Set the AD4170 Voltage bias.

Parameters

dev	- The device structure.
ch_mask	- Voltage bias enable mask.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_spi_reg_read()

int ad4170_spi_reg_read	(	struct ad4170_dev *	dev,
		uint32_t	reg_addr,
		uint32_t *	reg_data )

Read device register.

Parameters

dev	- The device structure.
reg_addr	- The register address.
reg_data	- The data read from the register.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_spi_reg_write()

int ad4170_spi_reg_write	(	struct ad4170_dev *	dev,
		uint32_t	reg_addr,
		uint32_t	reg_data )

Write device register.

Parameters

dev	- The device structure.
reg_addr	- The register address.
reg_data	- The register data.

Returns: 0 in case of success, negative error code otherwise.

◆ ad4170_spi_reg_write_mask()

int ad4170_spi_reg_write_mask	(	struct ad4170_dev *	dev,
		uint32_t	reg_addr,
		uint8_t	mask,
		uint32_t	reg_data )

SPI write device register using a mask.

Parameters

dev	- The device structure.
reg_addr	- The register address.
mask	- The mask.
reg_data	- The register data.

Returns: 0 in case of success, negative error code otherwise.

Variable Documentation

◆ ad4170_config_reset

struct ad4170_config ad4170_config_reset

extern

ad4170_config default state when the chip is hardware/software reset.

Classes

Macros

Enumerations

Functions

Variables

Detailed Description

Macro Definition Documentation

◆ AD4170_ADC_CTRL_CONT_READ_STATUS_EN_MSK

◆ AD4170_ADC_CTRL_MULTI_DATA_REG_SEL_MSK

◆ AD4170_ADC_CTRL_PARALLEL_FILT_EN_MSK

◆ AD4170_ADC_SETUPS_AFE_BIPOLAR_MSK

◆ AD4170_ADC_SETUPS_AFE_PGA_GAIN_MSK

◆ AD4170_ADC_SETUPS_AFE_REF_BUF_M_MSK

◆ AD4170_ADC_SETUPS_AFE_REF_BUF_P_MSK

◆ AD4170_ADC_SETUPS_AFE_REF_SELECT_MSK

◆ AD4170_ADC_SETUPS_FILTER_TYPE_MSK

◆ AD4170_ADC_SETUPS_MISC_BURNOUT_MSK

◆ AD4170_ADC_SETUPS_MISC_CHOP_ADC_MSK

◆ AD4170_ADC_SETUPS_MISC_CHOP_IEXC_MSK

◆ AD4170_ADC_SETUPS_POST_FILTER_SEL_MSK

◆ AD4170_ADDR

◆ AD4170_ADDR_ASCENSION_MSK

◆ AD4170_CHANNEL

◆ AD4170_CHANNEL_MAPN_AINM_MSK

◆ AD4170_CHANNEL_MAPN_AINP_MSK

◆ AD4170_CHANNEL_SETUPN_DELAY_N_MSK

◆ AD4170_CHANNEL_SETUPN_REPEAT_N_MSK

◆ AD4170_CHANNEL_SETUPN_SETUP_N_MSK

◆ AD4170_CLOCK_CTRL_CLOCKDIV_MSK

◆ AD4170_CLOCK_CTRL_CLOCKSEL_MSK

◆ AD4170_CLOCK_CTRL_DCLK_DIVIDE_MSK

◆ AD4170_CRC8_INITIAL_VALUE

◆ AD4170_CRC8_POLYNOMIAL

◆ AD4170_CURRENT_SOURCE_I_OUT_PIN_MSK

◆ AD4170_CURRENT_SOURCE_I_OUT_VAL_MSK

◆ AD4170_DATA_STATUS_CH_ACTIVE_MSK

◆ AD4170_DATA_STATUS_MASTER_ERR_S_MSK

◆ AD4170_DATA_STATUS_POR_FLAG_S_MSK

◆ AD4170_DATA_STATUS_RDYB_MSK

◆ AD4170_DATA_STATUS_SETTLED_FIR_MSK

◆ AD4170_ERROR_ADC_CONV_ERR_MSK

◆ AD4170_ERROR_AINM_OV_UV_ERR_MSK

◆ AD4170_ERROR_AINP_OV_UV_ERR_MSK

◆ AD4170_ERROR_ALDO_PSM_ERR_MSK

◆ AD4170_ERROR_DEVICE_ERROR_MSK

◆ AD4170_ERROR_DLDO_PSM_ERR_MSK

◆ AD4170_ERROR_IOUT0_COMP_ERR_MSK

◆ AD4170_ERROR_IOUT1_COMP_ERR_MSK

◆ AD4170_ERROR_IOUT2_COMP_ERR_MSK

◆ AD4170_ERROR_IOUT3_COMP_ERR_MSK

◆ AD4170_ERROR_MM_CRC_ERR_MSK

◆ AD4170_ERROR_REF_DIFF_MIN_ERR_MSK

◆ AD4170_ERROR_REF_OV_UV_ERR_MSK

◆ AD4170_ERROR_ROM_CRC_ERR_MSK

◆ AD4170_FIR_COEFF_MAX_LENGTH

◆ AD4170_FIR_CONTROL_COEFF_SET_MSK

◆ AD4170_FIR_CONTROL_FIR_LENGTH_MSK

◆ AD4170_FIR_CONTROL_FIR_MODE_MSK

◆ AD4170_FIR_CONTROL_IIR_MODE_MSK

◆ AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION

◆ AD4170_INTERFACE_CONFIG_B_SHORT_INSTRUCTION_MSK

◆ AD4170_INTERFACE_CONFIG_B_SINGLE_INST_MSK

◆ AD4170_INTERFACE_CONFIG_C_CRC

◆ AD4170_INTERFACE_CONFIG_C_CRC_MSK

◆ AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS

◆ AD4170_INTERFACE_CONFIG_C_STRICT_REG_ACCESS_MSK

◆ AD4170_INTERFACE_STATUS_A_ADDR_INVALID_ERR_MSK

◆ AD4170_INTERFACE_STATUS_A_CLOCK_COUNT_ERR_MSK

◆ AD4170_INTERFACE_STATUS_A_CRC_ERR_MSK

◆ AD4170_INTERFACE_STATUS_A_INVALID_ACCESS_ERR_MSK

◆ AD4170_INTERFACE_STATUS_A_NOT_READY_ERR_MSK

◆ AD4170_INTERFACE_STATUS_A_PARTIAL_ACCESS_ERR_MSK

◆ AD4170_NUM_CHANNELS

◆ AD4170_NUM_CURRENT_SOURCE

◆ AD4170_NUM_SETUPS

◆ AD4170_PIN_MUXING_CHAN_TO_GPIO_MSK

◆ AD4170_PIN_MUXING_DIG_AUX1_CTRL_MSK

◆ AD4170_PIN_MUXING_DIG_AUX2_CTRL_MSK

◆ AD4170_PIN_MUXING_DIG_OUT_STR_MSK

◆ AD4170_PIN_MUXING_SDO_RDBY_DLY_MSK