ad5706r.h File Reference

Header file of AD5706R Driver. More...

#include <stdint.h>
#include <stdbool.h>
#include "no_os_gpio.h"
#include "no_os_spi.h"
#include "no_os_crc8.h"

Include dependency graph for ad5706r.h:

Classes
struct	ad5706r_device_spi_settings
struct	ad5706r_ldac_settings
struct	ad5706r_transfer_data
struct	ad5706r_dev
struct	ad5706r_init_param

Macros
#define	AD5706R_R1B   (1ul << 16) /* 1-byte register address */
#define	AD5706R_R2B   (2ul << 16) /* 2-byte register address */
#define	AD5706R_LEN(x)
#define	AD5706R_ADDR(x)
#define	AD5706R_ADDR_MD(x)
#define	AD5706R_MD_ADDR_MASK   NO_OS_GENMASK(1, 0)
#define	AD5706R_MD_ADDR(x)
#define	AD5706R_READ_BIT   NO_OS_BIT(7)
#define	AD5706R_ADDR_MASK   (~AD5706R_READ_BIT)
#define	AD5706R_WRITE_BIT_LONG_INSTR   0x00
#define	AD5706R_CRC_POLY   0x07
#define	AD5706R_CRC_SEED   0xA5
#define	AD5706R_SCRATCH_PAD_TEST_VAL   0x6A
#define	AD5706R_MULTIBYTE_REG_START   0x14
#define	AD5706R_MULTIBYTE_REG_END   0x71
#define	AD5706R_REG_INTERFACE_CONFIG_A   (AD5706R_R1B | 0x00)
#define	AD5706R_REG_INTERFACE_CONFIG_B   (AD5706R_R1B | 0x01)
#define	AD5706R_REG_DEVICE_CONFIG   (AD5706R_R1B | 0x02)
#define	AD5706R_REG_CHIP_TYPE   (AD5706R_R1B | 0x03)
#define	AD5706R_REG_PRODUCT_ID_L   (AD5706R_R1B | 0x04)
#define	AD5706R_REG_PRODUCT_ID_H   (AD5706R_R1B | 0x05)
#define	AD5706R_REG_CHIP_GRADE   (AD5706R_R1B | 0x06)
#define	AD5706R_REG_DEVICE_INDEX   (AD5706R_R1B | 0x09)
#define	AD5706R_REG_SCRATCH_PAD   (AD5706R_R1B | 0x0A)
#define	AD5706R_REG_SPI_REVISION   (AD5706R_R1B | 0x0B)
#define	AD5706R_REG_VENDOR_L   (AD5706R_R1B | 0x0C)
#define	AD5706R_REG_VENDOR_H   (AD5706R_R1B | 0x0D)
#define	AD5706R_REG_STREAM_MODE   (AD5706R_R1B | 0x0E)
#define	AD5706R_REG_TRANSFER_CONFIG   (AD5706R_R1B | 0x0F)
#define	AD5706R_REG_INTERFACE_CONFIG_C   (AD5706R_R1B | 0x10)
#define	AD5706R_REG_INTERFACE_STATUS_A   (AD5706R_R1B | 0x11)
#define	AD5706R_REG_MULTI_DAC_CH_SEL   (AD5706R_R2B | 0x14)
#define	AD5706R_REG_LDAC_SYNC_ASYNC   (AD5706R_R2B | 0x16)
#define	AD5706R_REG_LDAC_HW_SW   (AD5706R_R2B | 0x18)
#define	AD5706R_REG_LDAC_EDGE_SEL_CH(x)
#define	AD5706R_REG_OUT_OPERATING_MODE   (AD5706R_R2B | 0x22)
#define	AD5706R_REG_OUT_SWITCH_EN   (AD5706R_R2B | 0x24)
#define	AD5706R_REG_HW_SHUTDOWN_EN   (AD5706R_R2B | 0x26)
#define	AD5706R_REG_OUT_RANGE_CH(x)
#define	AD5706R_REG_FUNC_EN   (AD5706R_R2B | 0x30)
#define	AD5706R_REG_FUNC_MODE_SEL_CH(x)
#define	AD5706R_REG_FUNC_DAC_INPUT_B_CH(x)
#define	AD5706R_REG_FUNC_DITHER_PERIOD_CH(x)
#define	AD5706R_REG_FUNC_DITHER_PHASE_CH(x)
#define	AD5706R_REG_MUX_OUT_SEL   (AD5706R_R2B | 0x54)
#define	AD5706R_REG_MUX_OUT_CONTROL   (AD5706R_R2B | 0x56)
#define	AD5706R_REG_TEMP_WARN_INT_EN   (AD5706R_R2B | 0x58)
#define	AD5706R_REG_MULTI_DAC_SW_LDAC   (AD5706R_R2B | 0x5A)
#define	AD5706R_REG_MULTI_DAC_INPUT_A   (AD5706R_R2B | 0x5C)
#define	AD5706R_REG_DAC_SW_LDAC   (AD5706R_R2B | 0x5E)
#define	AD5706R_REG_DAC_INPUT_A_CH(x)
#define	AD5706R_REG_DAC_DATA_READBACK_CH(x)
#define	AD5706R_REG_TEMP_WARN_STAT   (AD5706R_R2B | 0x70)
#define	AD5706R_REG_DIGITAL_STATUS   (AD5706R_R1B | 0x72)
#define	AD5706R_REG_BANDGAP_CONTROL   (AD5706R_R1B | 0x73)
#define	AD5706R_REG_USER_SPARE_0   (AD5706R_R1B | 0x74)
#define	AD5706R_REG_USER_SPARE_1   (AD5706R_R1B | 0x75)
#define	AD5706R_REG_USER_SPARE_2   (AD5706R_R1B | 0x76)
#define	AD5706R_REG_USER_SPARE_3   (AD5706R_R1B | 0x77)
#define	AD5706R_INT_CONFIG_A_SW_RESET_MASK   (NO_OS_BIT(7) | NO_OS_BIT(0))
#define	AD5706R_INT_CONFIG_A_ADDR_ASC_MASK   NO_OS_BIT(5)
#define	AD5706R_INT_CONFIG_A_SDO_EN_MASK   NO_OS_BIT(4)
#define	AD5706R_INT_CONFIG_B_SINGLE_INSTR_MASK   NO_OS_BIT(7)
#define	AD5706R_INT_CONFIG_B_SHORT_INSTR_MASK   NO_OS_BIT(3)
#define	AD5706R_DEVICE_CONFIG_OPERATING_MODE   NO_OS_GENMASK(1, 0)
#define	AD5706R_CHIP_TYPE_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_CHIP_TYPE   0x4
#define	AD5706R_PRODUCT_ID_L   0x30
#define	AD5706R_PRODUCT_ID_H   0x41
#define	AD5706R_CHIP_GRADE_MASK   NO_OS_GENMASK(7, 4)
#define	AD5706R_CHIP_GRADE   0x0
#define	AD5706R_DEVICE_REV_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_DEVICE_REV   0x0
#define	AD5706R_SPI_TYPE_MASK   NO_OS_GENMASK(7, 6)
#define	AD5706R_SPI_TYPE   0x2
#define	AD5706R_SPI_VER_MASK   NO_OS_GENMASK(5, 0)
#define	AD5706R_SPI_VER   0x4
#define	AD5706R_VENDOR_ID_L   0x56
#define	AD5706R_VENDOR_ID_H   0x04
#define	AD5706R_TRANSFER_CONFIG_MASK   NO_OS_BIT(2)
#define	AD5706R_CRC_ENABLE_MASK   (NO_OS_GENMASK(7, 6) | NO_OS_GENMASK(1, 0))
#define	AD5706R_INT_CONFIG_C_STRICT_INSTR_MASK   NO_OS_BIT(3)
#define	AD5706R_NOT_READY_ERR_MASK   NO_OS_BIT(7)
#define	AD5706R_CLK_COUNT_ERR_MASK   NO_OS_BIT(4)
#define	AD5706R_CRC_ERR_MASK   NO_OS_BIT(3)
#define	AD5706R_WRITE_TO_READ_ONLY_REG_ERR_MASK   NO_OS_BIT(2)
#define	AD5706R_REG_PARTIAL_ACC_ERR_MASK   NO_OS_BIT(1)
#define	AD5706R_ADDR_INV_ERR_MASK   NO_OS_BIT(0)
#define	AD5706R_MULTI_DAC_CH_SEL_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_MULTI_DAC_CH_SEL_MODE(x, ch)
#define	AD5706R_REG_LDAC_SYNC_ASYNC_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_LDAC_HW_SW_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_LDAC_EDGE_SEL_CH_MASK   NO_OS_GENMASK(1, 0)
#define	AD5706R_OUT_OPERATING_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_OUT_OPERATING_MODE(x, ch)
#define	AD5706R_OUT_SWITCH_EN_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_OUT_SWITCH_EN_MODE(x, ch)
#define	AD5706R_HW_SHUTDOWN_EN_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_HW_SHUTDOWN_EN_MODE(x, ch)
#define	AD5706R_OUT_RANGE_CHn_MASK   NO_OS_GENMASK(1, 0)
#define	AD5706R_FUNC_EN_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_FUNC_MODE_SEL_CHn   NO_OS_BIT(0)
#define	AD5706R_FUNC_DITHER_PERIOD_CHn_MASK   NO_OS_GENMASK(2, 0)
#define	AD5706R_FUNC_DITHER_PHASE_CHn_MASK   NO_OS_GENMASK(1, 0)
#define	AD5706R_MUX_OUT_EN   NO_OS_BIT(7)
#define	AD5706R_MUX_PARAM_SEL_MASK   NO_OS_GENMASK(4, 0)
#define	AD5706R_MUX_OUT_BUFFER_EN   NO_OS_BIT(0)
#define	AD5706R_TEMP_WARN_INT_CHn_EN_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_TEMP_WARN_INT_CHn_EN(x, ch)
#define	AD5706R_MULTI_DAC_SW_LDAC_TRIG   NO_OS_BIT(0)
#define	AD5706R_DAC_SW_LDAC_MASK   NO_OS_GENMASK(3, 0)
#define	AD5706R_INTERFACE_ERR   NO_OS_BIT(2)
#define	AD5706R_POWERUP_COMPLETED   NO_OS_BIT(1)
#define	AD5706R_RESET_OCCURRED   NO_OS_BIT(0)
#define	AD5706R_BANDGAP_CONTROL_EN   NO_OS_BIT(0)
#define	AD5706R_CRC_ENABLE_VALUE   (NO_OS_BIT(6) | NO_OS_BIT(1))
#define	AD5706R_CRC_DISABLE_VALUE   NO_OS_GENMASK(1, 0)
#define	AD5706R_NUM_CH   4
#define	AD5706R_MAX_MD_ADDR   0x03
#define	AD5706R_REG_ADDR_MAX   0x77
#define	AD5706R_LDAC_PULSE_US   1
#define	AD5706R_CHANNEL_SEL(ch)
#define	AD5706R_INTF_CFG_A_DEFAULT   0x10
#define	AD5706R_PRODUCT_ID   ((AD5706R_PRODUCT_ID_H << 8) | (AD5706R_PRODUCT_ID_L))

Enumerations
enum	ad5706r_channels {   AD5706R_CH0 ,   AD5706R_CH1 ,   AD5706R_CH2 ,   AD5706R_CH3 ,   AD5706R_CH_MAX }
	AD5706R list of channels. More...
enum	ad5706r_dac_resolution {   AD5706R_16_BIT_RESOLUTION ,   AD5706R_12_BIT_RESOLUTION ,   AD5706R_10_BIT_RESOLUTION }
	AD5706R list of supported data resolution. More...
enum	ad5706r_vref_select {   AD5706R_EXTERNAL_VREF_PIN_INPUT ,   AD5706R_INTERNAL_VREF_PIN_2P5V }
	Voltage reference options. More...
enum	ad5706r_ldac_edge_trig {   AD5706R_RISING_EDGE_TRIG ,   AD5706R_FALLING_EDGE_TRIG ,   AD5706R_ANY_EDGE_TRIG }
	AD5706R hardware LDAC edge select options. More...
enum	ad5706r_output_op_mode {   AD5706R_SHUTDOWN_SW ,   AD5706R_SHUTDOWN_SW_W_GND ,   AD5706R_NORMAL_SW ,   AD5706R_SHUTDOWN_HW ,   AD5706R_SHUTDOWN_HW_W_GND ,   AD5706R_NORMAL_HW }
	AD5706R hardware-software LDAC select options. More...
enum	ad5706r_mux_out_select {   AD5706R_AGND ,   AD5706R_AVDD ,   AD5706R_VERVREF ,   AD5706R_AGND_SPARE ,   AD5706R_VOUT0 ,   AD5706R_VOUT1 ,   AD5706R_VOUT2 ,   AD5706R_VOUT3 ,   AD5706R_IOUT0 ,   AD5706R_IOUT1 ,   AD5706R_IOUT2 ,   AD5706R_IOUT3 ,   AD5706R_PVDD0 ,   AD5706R_PVDD1 ,   AD5706R_PVDD2 ,   AD5706R_PVDD3 ,   AD5706R_TDIODE0 ,   AD5706R_TDIODE1 ,   AD5706R_TDIODE2 ,   AD5706R_TDIODE3 ,   AD5706R_MUXIN0 ,   AD5706R_MUXIN1 ,   AD5706R_MUXIN2 ,   AD5706R_MUXIN3 }
	Signals to monitor on MUX_OUT pin. More...
enum	ad5706r_dac_mode {   AD5706R_DIRECT_WRITE_REG ,   AD5706R_SW_LDAC ,   AD5706R_HW_LDAC ,   AD5706R_SW_TOGGLE ,   AD5706R_HW_TOGGLE ,   AD5706R_SW_DITHER ,   AD5706R_HW_DITHER }
	DAC modes. More...
enum	ad5706r_output_range {   AD5706R_50mA ,   AD5706R_150mA ,   AD5706R_200mA ,   AD5706R_300mA }
	AD5706R list of output range. More...
enum	ad5706r_hw_sw_trig {   AD5706R_HW_TRIG ,   AD5706R_SW_TRIG }
	AD5706R HW or SW trigger mode. More...
enum	ad5706r_function_mode {   AD5706R_TOGGLE ,   AD5706R_DITHER }
	AD5706R list of function modes. More...
enum	ad5706r_dither_period {   AD5706R_SAMPLES_4 ,   AD5706R_SAMPLES_8 ,   AD5706R_SAMPLES_16 ,   AD5706R_SAMPLES_32 ,   AD5706R_SAMPLES_64 }
	AD5706R list of dither function period settings. More...
enum	ad5706r_dither_phase {   AD5706R_DEGREES_0 ,   AD5706R_DEGREES_90 ,   AD5706R_DEGREES_180 ,   AD5706R_DEGREES_270 }
	AD5706R list of dither function phase settings. More...
enum	ad5706r_mux_out_state {   AD5706R_HIGH_Z ,   AD5706R_BYPASS ,   AD5706R_BUFFER }
	AD5706R list of MUX Out states. More...

Functions
int	ad5706r_spi_reg_read (struct ad5706r_dev *dev, uint32_t reg_addr, uint16_t *reg_data)
	Read from device.
int	ad5706r_spi_reg_read_multiple (struct ad5706r_dev *dev, uint32_t start_addr, uint8_t count, uint8_t *buff)
	Read multiple register's values.
int	ad5706r_spi_reg_write (struct ad5706r_dev *dev, uint32_t reg_addr, uint16_t reg_data)
	Write to device.
int	ad5706r_spi_reg_write_multiple (struct ad5706r_dev *dev, uint32_t start_addr, uint8_t count, uint8_t *buff)
	Write multiple register's values.
int	ad5706r_spi_write_mask (struct ad5706r_dev *dev, uint32_t reg_addr, uint32_t mask, uint16_t data)
	SPI write to device using a mask.
int	ad5706r_set_reference (struct ad5706r_dev *dev, enum ad5706r_vref_select reference_selector)
	Set reference configuration.
int	ad5706r_set_operating_mode (struct ad5706r_dev *dev, enum ad5706r_channels chan_sel, enum ad5706r_output_op_mode op_mode)
	Set output operating mode of a channel.
int	ad5706r_set_ch_output_range (struct ad5706r_dev *dev, enum ad5706r_channels chan_sel, enum ad5706r_output_range range_sel)
	Set output range for a channel.
int	ad5706r_func_en (struct ad5706r_dev *dev, uint16_t en_mask)
	Set the function generator enable configuration.
int	ad5706r_func_mode_select (struct ad5706r_dev *dev, enum ad5706r_channels chan_sel, enum ad5706r_function_mode func_mode_sel)
	Set function generator mode for a channel.
int	ad5706r_set_dither_period (struct ad5706r_dev *dev, enum ad5706r_channels ch, enum ad5706r_dither_period period)
	Set period for dither function generator.
int	ad5706r_set_dither_phase (struct ad5706r_dev *dev, enum ad5706r_channels ch, enum ad5706r_dither_phase phase)
	Set phase for dither function generator.
int	ad5706r_set_hw_sw_ldac (struct ad5706r_dev *dev, uint16_t mask_hw_sw_ldac)
	Set the hardware and software ldac configuration.
int	ad5706r_set_sync_async_ldac (struct ad5706r_dev *dev, uint16_t mask_ldac_sync_async)
	Set sync/async ldac configuration.
int	ad5706r_set_ldac_config (struct ad5706r_dev *dev, enum ad5706r_channels chn, enum ad5706r_dac_mode dac_mode, struct ad5706r_ldac_settings *ldac_settings)
	Set ldac config for single channel.
int	ad5706r_multi_dac_sw_ldac_trigger (struct ad5706r_dev *dev)
	Trigger Multi DAC SW LDAC.
int	ad5706r_set_multi_ldac_config (struct ad5706r_dev *dev, uint16_t ch_mask, enum ad5706r_dac_mode dac_mode, struct ad5706r_ldac_settings *ldac_settings)
	Set ldac config for multiple channels.
int	ad5706r_set_dac_a_value (struct ad5706r_dev *dev, enum ad5706r_channels chn, uint16_t dac_value)
	Set dac value on DAC input register A.
int	ad5706r_set_dac_b_value (struct ad5706r_dev *dev, enum ad5706r_channels chn, uint16_t dac_value)
	Set dac value on DAC input register B.
int	ad5706r_set_multi_dac_a_value (struct ad5706r_dev *dev, uint16_t dac_value)
	Set dac value on Multi DAC input register A.
int	ad5706r_set_mux_out_mode (struct ad5706r_dev *dev, enum ad5706r_mux_out_state mux_output_mode_sel)
	Set the multiplexer output mode.
int	ad5706r_set_mux_out_select (struct ad5706r_dev *dev, enum ad5706r_mux_out_select mux_output_sel)
	Set the multiplexer output select register.
int	ad5706r_hw_ldac_trigger (struct ad5706r_dev *dev)
	Trigger the LDAC using hardware.
int	ad5706r_set_edge_trigger (struct ad5706r_dev *dev, enum ad5706r_channels chn, enum ad5706r_ldac_edge_trig trig_edge)
	Set LDAC/TGP/DCLK edge trigger.
int	ad5706r_sw_ldac_trigger (struct ad5706r_dev *dev)
	Trigger the LDAC using software.
int	ad5706r_sw_reset (struct ad5706r_dev *dev)
	Perform soft reset.
int	ad5706r_hw_reset (struct ad5706r_dev *dev)
	Perform hard reset.
int	ad5706r_device_config (struct ad5706r_dev *dev, struct ad5706r_init_param *init_param)
	Configures the device.
int	ad5706r_set_device_spi (struct ad5706r_dev *dev, struct ad5706r_device_spi_settings *spi_settings)
	Set device spi settings.
int	ad5706r_crc_enable (struct ad5706r_dev *dev, bool crc_enable)
	Configures the CRC selection bit .
int	ad5706r_shdn_trigger (struct ad5706r_dev *dev, bool shdn_state)
	Set SHDN pin state.
int	ad5706r_init (struct ad5706r_dev **device, struct ad5706r_init_param *init_param)
	Initialize the device.
int	ad5706r_remove (struct ad5706r_dev *dev)
	Free the device descriptor.

Detailed Description

Header file of AD5706R Driver.

Author

NAlteza (natha.nosp@m.niel.nosp@m..alte.nosp@m.za@a.nosp@m.nalog.nosp@m..com)

Copyright 2024-2026(c) Analog Devices, Inc. SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

AD5706R_ADDR

#define AD5706R_ADDR

(

x

)

Value:

(x & 0xFFFF)

AD5706R_ADDR_INV_ERR_MASK

#define AD5706R_ADDR_INV_ERR_MASK   NO_OS_BIT(0)

AD5706R_ADDR_MASK

#define AD5706R_ADDR_MASK   (~AD5706R_READ_BIT)

AD5706R_ADDR_MD

#define AD5706R_ADDR_MD

(

x

)

Value:

(x & 0x0FFF)    /* Reg Addr exclude MD Addr */

AD5706R_BANDGAP_CONTROL_EN

#define AD5706R_BANDGAP_CONTROL_EN   NO_OS_BIT(0)

AD5706R_CHANNEL_SEL

#define AD5706R_CHANNEL_SEL

(

ch

)

Value:

NO_OS_BIT(ch)

AD5706R_CHIP_GRADE

#define AD5706R_CHIP_GRADE   0x0

AD5706R_CHIP_GRADE_MASK

#define AD5706R_CHIP_GRADE_MASK   NO_OS_GENMASK(7, 4)

AD5706R_CHIP_TYPE

#define AD5706R_CHIP_TYPE   0x4

AD5706R_CHIP_TYPE_MASK

#define AD5706R_CHIP_TYPE_MASK   NO_OS_GENMASK(3, 0)

AD5706R_CLK_COUNT_ERR_MASK

#define AD5706R_CLK_COUNT_ERR_MASK   NO_OS_BIT(4)

AD5706R_CRC_DISABLE_VALUE

#define AD5706R_CRC_DISABLE_VALUE   NO_OS_GENMASK(1, 0)

AD5706R_CRC_ENABLE_MASK

#define AD5706R_CRC_ENABLE_MASK   (NO_OS_GENMASK(7, 6) | NO_OS_GENMASK(1, 0))

AD5706R_CRC_ENABLE_VALUE

#define AD5706R_CRC_ENABLE_VALUE   (NO_OS_BIT(6) | NO_OS_BIT(1))

AD5706R_CRC_ERR_MASK

#define AD5706R_CRC_ERR_MASK   NO_OS_BIT(3)

AD5706R_CRC_POLY

#define AD5706R_CRC_POLY   0x07

AD5706R_CRC_SEED

#define AD5706R_CRC_SEED   0xA5

AD5706R_DAC_SW_LDAC_MASK

#define AD5706R_DAC_SW_LDAC_MASK   NO_OS_GENMASK(3, 0)

AD5706R_DEVICE_CONFIG_OPERATING_MODE

#define AD5706R_DEVICE_CONFIG_OPERATING_MODE   NO_OS_GENMASK(1, 0)

AD5706R_DEVICE_REV

#define AD5706R_DEVICE_REV   0x0

AD5706R_DEVICE_REV_MASK

#define AD5706R_DEVICE_REV_MASK   NO_OS_GENMASK(3, 0)

AD5706R_FUNC_DITHER_PERIOD_CHn_MASK

#define AD5706R_FUNC_DITHER_PERIOD_CHn_MASK   NO_OS_GENMASK(2, 0)

AD5706R_FUNC_DITHER_PHASE_CHn_MASK

#define AD5706R_FUNC_DITHER_PHASE_CHn_MASK   NO_OS_GENMASK(1, 0)

AD5706R_FUNC_EN_MASK

#define AD5706R_FUNC_EN_MASK   NO_OS_GENMASK(3, 0)

AD5706R_FUNC_MODE_SEL_CHn

#define AD5706R_FUNC_MODE_SEL_CHn   NO_OS_BIT(0)

AD5706R_HW_SHUTDOWN_EN_MASK

#define AD5706R_HW_SHUTDOWN_EN_MASK   NO_OS_GENMASK(3, 0)

AD5706R_HW_SHUTDOWN_EN_MODE

#define AD5706R_HW_SHUTDOWN_EN_MODE	(		x,
			ch )

Value:

(((x) & 0x1) << (ch))

AD5706R_INT_CONFIG_A_ADDR_ASC_MASK

#define AD5706R_INT_CONFIG_A_ADDR_ASC_MASK   NO_OS_BIT(5)

AD5706R_INT_CONFIG_A_SDO_EN_MASK

#define AD5706R_INT_CONFIG_A_SDO_EN_MASK   NO_OS_BIT(4)

AD5706R_INT_CONFIG_A_SW_RESET_MASK

#define AD5706R_INT_CONFIG_A_SW_RESET_MASK   (NO_OS_BIT(7) | NO_OS_BIT(0))

AD5706R_INT_CONFIG_B_SHORT_INSTR_MASK

#define AD5706R_INT_CONFIG_B_SHORT_INSTR_MASK   NO_OS_BIT(3)

AD5706R_INT_CONFIG_B_SINGLE_INSTR_MASK

#define AD5706R_INT_CONFIG_B_SINGLE_INSTR_MASK   NO_OS_BIT(7)

AD5706R_INT_CONFIG_C_STRICT_INSTR_MASK

#define AD5706R_INT_CONFIG_C_STRICT_INSTR_MASK   NO_OS_BIT(3)

AD5706R_INTERFACE_ERR

#define AD5706R_INTERFACE_ERR   NO_OS_BIT(2)

AD5706R_INTF_CFG_A_DEFAULT

#define AD5706R_INTF_CFG_A_DEFAULT   0x10

AD5706R_LDAC_EDGE_SEL_CH_MASK

#define AD5706R_LDAC_EDGE_SEL_CH_MASK   NO_OS_GENMASK(1, 0)

AD5706R_LDAC_HW_SW_MASK

#define AD5706R_LDAC_HW_SW_MASK   NO_OS_GENMASK(3, 0)

AD5706R_LDAC_PULSE_US

#define AD5706R_LDAC_PULSE_US   1

AD5706R_LEN

#define AD5706R_LEN

(

x

)

Value:

(x >> 16)   /* Get register byte length */

AD5706R_MAX_MD_ADDR

#define AD5706R_MAX_MD_ADDR   0x03

AD5706R_MD_ADDR

#define AD5706R_MD_ADDR

(

x

)

Value:

((x & AD5706R_MD_ADDR_MASK) << 4)

AD5706R_MD_ADDR_MASK

#define AD5706R_MD_ADDR_MASK   NO_OS_GENMASK(1, 0)

AD5706R_MULTI_DAC_CH_SEL_MASK

#define AD5706R_MULTI_DAC_CH_SEL_MASK   NO_OS_GENMASK(3, 0)

AD5706R_MULTI_DAC_CH_SEL_MODE

#define AD5706R_MULTI_DAC_CH_SEL_MODE	(		x,
			ch )

Value:

(((x) & 0x1) << (ch))

AD5706R_MULTI_DAC_SW_LDAC_TRIG

#define AD5706R_MULTI_DAC_SW_LDAC_TRIG   NO_OS_BIT(0)

AD5706R_MULTIBYTE_REG_END

#define AD5706R_MULTIBYTE_REG_END   0x71

AD5706R_MULTIBYTE_REG_START

#define AD5706R_MULTIBYTE_REG_START   0x14

AD5706R_MUX_OUT_BUFFER_EN

#define AD5706R_MUX_OUT_BUFFER_EN   NO_OS_BIT(0)

AD5706R_MUX_OUT_EN

#define AD5706R_MUX_OUT_EN   NO_OS_BIT(7)

AD5706R_MUX_PARAM_SEL_MASK

#define AD5706R_MUX_PARAM_SEL_MASK   NO_OS_GENMASK(4, 0)

AD5706R_NOT_READY_ERR_MASK

#define AD5706R_NOT_READY_ERR_MASK   NO_OS_BIT(7)

AD5706R_NUM_CH

#define AD5706R_NUM_CH   4

AD5706R_OUT_OPERATING_MASK

#define AD5706R_OUT_OPERATING_MASK   NO_OS_GENMASK(3, 0)

AD5706R_OUT_OPERATING_MODE

#define AD5706R_OUT_OPERATING_MODE	(		x,
			ch )

Value:

(((x) & 0x1) << (ch))

AD5706R_OUT_RANGE_CHn_MASK

#define AD5706R_OUT_RANGE_CHn_MASK   NO_OS_GENMASK(1, 0)

AD5706R_OUT_SWITCH_EN_MASK

#define AD5706R_OUT_SWITCH_EN_MASK   NO_OS_GENMASK(3, 0)

AD5706R_OUT_SWITCH_EN_MODE

#define AD5706R_OUT_SWITCH_EN_MODE	(		x,
			ch )

Value:

(((x) & 0x1) << (ch))

AD5706R_POWERUP_COMPLETED

#define AD5706R_POWERUP_COMPLETED   NO_OS_BIT(1)

AD5706R_PRODUCT_ID

#define AD5706R_PRODUCT_ID   ((AD5706R_PRODUCT_ID_H << 8) | (AD5706R_PRODUCT_ID_L))

AD5706R_PRODUCT_ID_H

#define AD5706R_PRODUCT_ID_H   0x41

AD5706R_PRODUCT_ID_L

#define AD5706R_PRODUCT_ID_L   0x30

AD5706R_R1B

#define AD5706R_R1B   (1ul << 16) /* 1-byte register address */

AD5706R_R2B

#define AD5706R_R2B   (2ul << 16) /* 2-byte register address */

AD5706R_READ_BIT

#define AD5706R_READ_BIT   NO_OS_BIT(7)

AD5706R_REG_ADDR_MAX

#define AD5706R_REG_ADDR_MAX   0x77

AD5706R_REG_BANDGAP_CONTROL

#define AD5706R_REG_BANDGAP_CONTROL   (AD5706R_R1B | 0x73)

AD5706R_REG_CHIP_GRADE

#define AD5706R_REG_CHIP_GRADE   (AD5706R_R1B | 0x06)

AD5706R_REG_CHIP_TYPE

#define AD5706R_REG_CHIP_TYPE   (AD5706R_R1B | 0x03)

AD5706R_REG_DAC_DATA_READBACK_CH

#define AD5706R_REG_DAC_DATA_READBACK_CH

(

x

)

Value:

(AD5706R_R2B | (0x68 + (x * 2)))

AD5706R_REG_DAC_INPUT_A_CH

#define AD5706R_REG_DAC_INPUT_A_CH

(

x

)

Value:

(AD5706R_R2B | (0x60 + (x * 2)))

AD5706R_REG_DAC_SW_LDAC

#define AD5706R_REG_DAC_SW_LDAC   (AD5706R_R2B | 0x5E)

AD5706R_REG_DEVICE_CONFIG

#define AD5706R_REG_DEVICE_CONFIG   (AD5706R_R1B | 0x02)

AD5706R_REG_DEVICE_INDEX

#define AD5706R_REG_DEVICE_INDEX   (AD5706R_R1B | 0x09)

AD5706R_REG_DIGITAL_STATUS

#define AD5706R_REG_DIGITAL_STATUS   (AD5706R_R1B | 0x72)

AD5706R_REG_FUNC_DAC_INPUT_B_CH

#define AD5706R_REG_FUNC_DAC_INPUT_B_CH

(

x

)

Value:

(AD5706R_R2B | (0x3A + (x * 2)))

AD5706R_REG_FUNC_DITHER_PERIOD_CH

#define AD5706R_REG_FUNC_DITHER_PERIOD_CH

(

x

)

Value:

(AD5706R_R2B | (0x42 + (x * 2)))

AD5706R_REG_FUNC_DITHER_PHASE_CH

#define AD5706R_REG_FUNC_DITHER_PHASE_CH

(

x

)

Value:

(AD5706R_R2B | (0x4A + (x * 2)))

AD5706R_REG_FUNC_EN

#define AD5706R_REG_FUNC_EN   (AD5706R_R2B | 0x30)

AD5706R_REG_FUNC_MODE_SEL_CH

#define AD5706R_REG_FUNC_MODE_SEL_CH

(

x

)

Value:

(AD5706R_R2B | (0x32 + (x * 2)))

AD5706R_REG_HW_SHUTDOWN_EN

#define AD5706R_REG_HW_SHUTDOWN_EN   (AD5706R_R2B | 0x26)

AD5706R_REG_INTERFACE_CONFIG_A

#define AD5706R_REG_INTERFACE_CONFIG_A   (AD5706R_R1B | 0x00)

AD5706R_REG_INTERFACE_CONFIG_B

#define AD5706R_REG_INTERFACE_CONFIG_B   (AD5706R_R1B | 0x01)

AD5706R_REG_INTERFACE_CONFIG_C

#define AD5706R_REG_INTERFACE_CONFIG_C   (AD5706R_R1B | 0x10)

AD5706R_REG_INTERFACE_STATUS_A

#define AD5706R_REG_INTERFACE_STATUS_A   (AD5706R_R1B | 0x11)

AD5706R_REG_LDAC_EDGE_SEL_CH

#define AD5706R_REG_LDAC_EDGE_SEL_CH

(

x

)

Value:

(AD5706R_R2B | (0x1A + (x * 2)))

AD5706R_REG_LDAC_HW_SW

#define AD5706R_REG_LDAC_HW_SW   (AD5706R_R2B | 0x18)

AD5706R_REG_LDAC_SYNC_ASYNC

#define AD5706R_REG_LDAC_SYNC_ASYNC   (AD5706R_R2B | 0x16)

AD5706R_REG_LDAC_SYNC_ASYNC_MASK

#define AD5706R_REG_LDAC_SYNC_ASYNC_MASK   NO_OS_GENMASK(3, 0)

AD5706R_REG_MULTI_DAC_CH_SEL

#define AD5706R_REG_MULTI_DAC_CH_SEL   (AD5706R_R2B | 0x14)

AD5706R_REG_MULTI_DAC_INPUT_A

#define AD5706R_REG_MULTI_DAC_INPUT_A   (AD5706R_R2B | 0x5C)

AD5706R_REG_MULTI_DAC_SW_LDAC

#define AD5706R_REG_MULTI_DAC_SW_LDAC   (AD5706R_R2B | 0x5A)

AD5706R_REG_MUX_OUT_CONTROL

#define AD5706R_REG_MUX_OUT_CONTROL   (AD5706R_R2B | 0x56)

AD5706R_REG_MUX_OUT_SEL

#define AD5706R_REG_MUX_OUT_SEL   (AD5706R_R2B | 0x54)

AD5706R_REG_OUT_OPERATING_MODE

#define AD5706R_REG_OUT_OPERATING_MODE   (AD5706R_R2B | 0x22)

AD5706R_REG_OUT_RANGE_CH

#define AD5706R_REG_OUT_RANGE_CH

(

x

)

Value:

(AD5706R_R2B | (0x28 + (x * 2)))

AD5706R_REG_OUT_SWITCH_EN

#define AD5706R_REG_OUT_SWITCH_EN   (AD5706R_R2B | 0x24)

AD5706R_REG_PARTIAL_ACC_ERR_MASK

#define AD5706R_REG_PARTIAL_ACC_ERR_MASK   NO_OS_BIT(1)

AD5706R_REG_PRODUCT_ID_H

#define AD5706R_REG_PRODUCT_ID_H   (AD5706R_R1B | 0x05)

AD5706R_REG_PRODUCT_ID_L

#define AD5706R_REG_PRODUCT_ID_L   (AD5706R_R1B | 0x04)

AD5706R_REG_SCRATCH_PAD

#define AD5706R_REG_SCRATCH_PAD   (AD5706R_R1B | 0x0A)

AD5706R_REG_SPI_REVISION

#define AD5706R_REG_SPI_REVISION   (AD5706R_R1B | 0x0B)

AD5706R_REG_STREAM_MODE

#define AD5706R_REG_STREAM_MODE   (AD5706R_R1B | 0x0E)

AD5706R_REG_TEMP_WARN_INT_EN

#define AD5706R_REG_TEMP_WARN_INT_EN   (AD5706R_R2B | 0x58)

AD5706R_REG_TEMP_WARN_STAT

#define AD5706R_REG_TEMP_WARN_STAT   (AD5706R_R2B | 0x70)

AD5706R_REG_TRANSFER_CONFIG

#define AD5706R_REG_TRANSFER_CONFIG   (AD5706R_R1B | 0x0F)

AD5706R_REG_USER_SPARE_0

#define AD5706R_REG_USER_SPARE_0   (AD5706R_R1B | 0x74)

AD5706R_REG_USER_SPARE_1

#define AD5706R_REG_USER_SPARE_1   (AD5706R_R1B | 0x75)

AD5706R_REG_USER_SPARE_2

#define AD5706R_REG_USER_SPARE_2   (AD5706R_R1B | 0x76)

AD5706R_REG_USER_SPARE_3

#define AD5706R_REG_USER_SPARE_3   (AD5706R_R1B | 0x77)

AD5706R_REG_VENDOR_H

#define AD5706R_REG_VENDOR_H   (AD5706R_R1B | 0x0D)

AD5706R_REG_VENDOR_L

#define AD5706R_REG_VENDOR_L   (AD5706R_R1B | 0x0C)

AD5706R_RESET_OCCURRED

#define AD5706R_RESET_OCCURRED   NO_OS_BIT(0)

AD5706R_SCRATCH_PAD_TEST_VAL

#define AD5706R_SCRATCH_PAD_TEST_VAL   0x6A

AD5706R_SPI_TYPE

#define AD5706R_SPI_TYPE   0x2

AD5706R_SPI_TYPE_MASK

#define AD5706R_SPI_TYPE_MASK   NO_OS_GENMASK(7, 6)

AD5706R_SPI_VER

#define AD5706R_SPI_VER   0x4

AD5706R_SPI_VER_MASK

#define AD5706R_SPI_VER_MASK   NO_OS_GENMASK(5, 0)

AD5706R_TEMP_WARN_INT_CHn_EN

#define AD5706R_TEMP_WARN_INT_CHn_EN	(		x,
			ch )

Value:

(((x) & 0x1) << (ch))

AD5706R_TEMP_WARN_INT_CHn_EN_MASK

#define AD5706R_TEMP_WARN_INT_CHn_EN_MASK   NO_OS_GENMASK(3, 0)

AD5706R_TRANSFER_CONFIG_MASK

#define AD5706R_TRANSFER_CONFIG_MASK   NO_OS_BIT(2)

AD5706R_VENDOR_ID_H

#define AD5706R_VENDOR_ID_H   0x04

AD5706R_VENDOR_ID_L

#define AD5706R_VENDOR_ID_L   0x56

AD5706R_WRITE_BIT_LONG_INSTR

#define AD5706R_WRITE_BIT_LONG_INSTR   0x00

AD5706R_WRITE_TO_READ_ONLY_REG_ERR_MASK

#define AD5706R_WRITE_TO_READ_ONLY_REG_ERR_MASK   NO_OS_BIT(2)

Enumeration Type Documentation

ad5706r_channels

enum ad5706r_channels

AD5706R list of channels.

Enumerator
AD5706R_CH0	Channel 0
AD5706R_CH1	Channel 1
AD5706R_CH2	Channel 2
AD5706R_CH3	Channel 3
AD5706R_CH_MAX	Max number of channels

ad5706r_dac_mode

enum ad5706r_dac_mode

DAC modes.

Enumerator
AD5706R_DIRECT_WRITE_REG
AD5706R_SW_LDAC
AD5706R_HW_LDAC
AD5706R_SW_TOGGLE
AD5706R_HW_TOGGLE
AD5706R_SW_DITHER
AD5706R_HW_DITHER

ad5706r_dac_resolution

enum ad5706r_dac_resolution

AD5706R list of supported data resolution.

Enumerator
AD5706R_16_BIT_RESOLUTION
AD5706R_12_BIT_RESOLUTION
AD5706R_10_BIT_RESOLUTION

ad5706r_dither_period

enum ad5706r_dither_period

AD5706R list of dither function period settings.

Enumerator
AD5706R_SAMPLES_4	4 sample period setting
AD5706R_SAMPLES_8	8 sample period setting
AD5706R_SAMPLES_16	16 sample period setting
AD5706R_SAMPLES_32	32 sample period setting
AD5706R_SAMPLES_64	64 sample period setting

ad5706r_dither_phase

enum ad5706r_dither_phase

AD5706R list of dither function phase settings.

Enumerator
AD5706R_DEGREES_0	0 Degrees setting
AD5706R_DEGREES_90	90 Degrees setting
AD5706R_DEGREES_180	180 Degrees setting
AD5706R_DEGREES_270	270 Degrees setting

ad5706r_function_mode

enum ad5706r_function_mode

AD5706R list of function modes.

Enumerator
AD5706R_TOGGLE	Toggle Function
AD5706R_DITHER	Dither Function

ad5706r_hw_sw_trig

enum ad5706r_hw_sw_trig

AD5706R HW or SW trigger mode.

Enumerator
AD5706R_HW_TRIG	HW trigger
AD5706R_SW_TRIG	SW trigger

ad5706r_ldac_edge_trig

enum ad5706r_ldac_edge_trig

AD5706R hardware LDAC edge select options.

Enumerator
AD5706R_RISING_EDGE_TRIG	Trigger at Rising Edge.
AD5706R_FALLING_EDGE_TRIG	Trigger at Falling Edge.
AD5706R_ANY_EDGE_TRIG	Trigger at Any Edge.

ad5706r_mux_out_select

enum ad5706r_mux_out_select

Signals to monitor on MUX_OUT pin.

Enumerator
AD5706R_AGND
AD5706R_AVDD
AD5706R_VERVREF
AD5706R_AGND_SPARE
AD5706R_VOUT0
AD5706R_VOUT1
AD5706R_VOUT2
AD5706R_VOUT3
AD5706R_IOUT0
AD5706R_IOUT1
AD5706R_IOUT2
AD5706R_IOUT3
AD5706R_PVDD0
AD5706R_PVDD1
AD5706R_PVDD2
AD5706R_PVDD3
AD5706R_TDIODE0
AD5706R_TDIODE1
AD5706R_TDIODE2
AD5706R_TDIODE3
AD5706R_MUXIN0
AD5706R_MUXIN1
AD5706R_MUXIN2
AD5706R_MUXIN3

ad5706r_mux_out_state

enum ad5706r_mux_out_state

AD5706R list of MUX Out states.

Enumerator
AD5706R_HIGH_Z	High Impedance
AD5706R_BYPASS	Bypass
AD5706R_BUFFER	Buffer

ad5706r_output_op_mode

enum ad5706r_output_op_mode

AD5706R hardware-software LDAC select options.

Enumerator
AD5706R_SHUTDOWN_SW
AD5706R_SHUTDOWN_SW_W_GND
AD5706R_NORMAL_SW
AD5706R_SHUTDOWN_HW
AD5706R_SHUTDOWN_HW_W_GND
AD5706R_NORMAL_HW

ad5706r_output_range

enum ad5706r_output_range

AD5706R list of output range.

Enumerator
AD5706R_50mA	50mA output range
AD5706R_150mA	150mA output range
AD5706R_200mA	200mA output range
AD5706R_300mA	300mA output range

ad5706r_vref_select

enum ad5706r_vref_select

Voltage reference options.

Enumerator
AD5706R_EXTERNAL_VREF_PIN_INPUT
AD5706R_INTERNAL_VREF_PIN_2P5V

Function Documentation

ad5706r_crc_enable()

int ad5706r_crc_enable	(	struct ad5706r_dev *	dev,
		bool	crc_enable )

Configures the CRC selection bit .

Enable CRC

Parameters

dev	- The device structure.
crc_enable	- boolean selection for crc bit.

Returns

0 in case of success, negative error code otherwise.

ad5706r_device_config()

int ad5706r_device_config	(	struct ad5706r_dev *	dev,
		struct ad5706r_init_param *	init_param )

Configures the device.

Configures the device.

Parameters

dev	- The device structure to be initialized.
init_param	- Configuration parameters for the device.

Returns

0 in case of success, negative error code otherwise.

ad5706r_func_en()

int ad5706r_func_en	(	struct ad5706r_dev *	dev,
		uint16_t	en_mask )

Set the function generator enable configuration.

Set Function generator enable.

Parameters

dev	- The device structure.
en_mask	- Mask to enable function generator.

Returns

0 in case of success, negative error code otherwise.

ad5706r_func_mode_select()

int ad5706r_func_mode_select	(	struct ad5706r_dev *	dev,
		enum ad5706r_channels	ch,
		enum ad5706r_function_mode	func_mode_sel )

Set function generator mode for a channel.

Set Function generator mode.

Parameters

dev	- The device structure.
ch	- Channel selected.
func_mode_sel	- Function generator mode to be selected. Accepted values: AD5706R_TOGGLE (default) AD5706R_DITHER

Returns

0 in case of success, negative error code otherwise.

ad5706r_hw_ldac_trigger()

int ad5706r_hw_ldac_trigger

(

struct ad5706r_dev *

dev

)

Trigger the LDAC using hardware.

HW LDAC trigger.

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

ad5706r_hw_reset()

int ad5706r_hw_reset

(

struct ad5706r_dev *

dev

)

Perform hard reset.

Hard reset

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

ad5706r_init()

int ad5706r_init	(	struct ad5706r_dev **	device,
		struct ad5706r_init_param *	init_param )

Initialize the device.

Initialize the device.

Parameters

device	- The device structure.
init_param	- The structure that contains the device initial parameters.

Returns

0 in case of success, negative error code otherwise.

ad5706r_multi_dac_sw_ldac_trigger()

int ad5706r_multi_dac_sw_ldac_trigger

(

struct ad5706r_dev *

dev

)

Trigger Multi DAC SW LDAC.

Trigger Multi DAC SW LDAC.

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

ad5706r_remove()

int ad5706r_remove

(

struct ad5706r_dev *

dev

)

Free the device descriptor.

Free the resources allocated by ad5706r_init().

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_ch_output_range()

int ad5706r_set_ch_output_range	(	struct ad5706r_dev *	dev,
		enum ad5706r_channels	ch,
		enum ad5706r_output_range	range_sel )

Set output range for a channel.

Set out output range of a channel.

Parameters

dev	- The device structure.
ch	- Channel selected.
range_sel	- Output range to be selected. Accepted values: AD5706R_50mA (default) AD5706R_150mA AD5706R_200mA AD5706R_300mA

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_dac_a_value()

int ad5706r_set_dac_a_value	(	struct ad5706r_dev *	dev,
		enum ad5706r_channels	ch,
		uint16_t	dac_value )

Set dac value on DAC input register A.

Set dac value on DAC input register A.

Parameters

dev	- The device structure.
ch	- Channel selected.
dac_value	- value that will be set in DAC input register A.

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_dac_b_value()

int ad5706r_set_dac_b_value	(	struct ad5706r_dev *	dev,
		enum ad5706r_channels	ch,
		uint16_t	dac_value )

Set dac value on DAC input register B.

Set dac values on DAC input registers A and B.

Parameters

dev	- The device structure.
ch	- Channel selected.
dac_value	- value that will be set in DAC input register B.

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_device_spi()

int ad5706r_set_device_spi	(	struct ad5706r_dev *	dev,
		struct ad5706r_device_spi_settings *	spi_settings )

Set device spi settings.

Set SPI device settings

Parameters

dev	- The device structure.
spi_settings	- The structure that contains the device spi parameters.

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_dither_period()

int ad5706r_set_dither_period	(	struct ad5706r_dev *	dev,
		enum ad5706r_channels	ch,
		enum ad5706r_dither_period	period )

Set period for dither function generator.

Set period for dither function generator.

Parameters

dev	- The device structure.
ch	- Channel selected.
period	- Dither period to be selected. Accepted values: AD5706R_SAMPLES_4 (default) AD5706R_SAMPLES_8 AD5706R_SAMPLES_16 AD5706R_SAMPLES_32 AD5706R_SAMPLES_64

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_dither_phase()

int ad5706r_set_dither_phase	(	struct ad5706r_dev *	dev,
		enum ad5706r_channels	ch,
		enum ad5706r_dither_phase	phase )

Set phase for dither function generator.

Set phase for dither function generator.

Parameters

dev	- The device structure.
ch	- Channel selected.
phase	- Dither phase to be selected. Accepted values: AD5706R_DEGREES_0 (default) AD5706R_DEGREES_90 AD5706R_DEGREES_180 AD5706R_DEGREES_270

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_edge_trigger()

int ad5706r_set_edge_trigger	(	struct ad5706r_dev *	dev,
		enum ad5706r_channels	ch,
		enum ad5706r_ldac_edge_trig	trig_edge )

Set LDAC/TGP/DCLK edge trigger.

Set LDAC/TGP/DCLK edge trigger.

Parameters

dev	- The device structure.
ch	- Channel selected.
trig_edge	- Edge trigger to be selected. Accepted values: AD5706R_RISING_EDGE_TRIG (default) AD5706R_FALLING_EDGE_TRIG AD5706R_ANY_EDGE_TRIG

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_hw_sw_ldac()

int ad5706r_set_hw_sw_ldac	(	struct ad5706r_dev *	dev,
		uint16_t	mask_hw_sw_ldac )

Set the hardware and software ldac configuration.

Set HW/SW LDAC.

Parameters

dev	- The device structure.
mask_hw_sw_ldac	- The array contains HW/SW LDAC channel masks.

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_ldac_config()

int ad5706r_set_ldac_config	(	struct ad5706r_dev *	dev,
		enum ad5706r_channels	ch,
		enum ad5706r_dac_mode	dac_mode,
		struct ad5706r_ldac_settings *	ldac_settings )

Set ldac config for single channel.

Set ldac config for single channel.

Parameters

dev	- The device structure.
ch	- Channel selected.
dac_mode	- DAC Controller Mode to be configured for selected channel. Accepted values: AD5706R_DIRECT_WRITE_REG (default) AD5706R_SW_LDAC AD5706R_HW_LDAC AD5706R_SW_TOGGLE AD5706R_HW_TOGGLE AD5706R_SW_DITHER AD5706R_HW_DITHER
ldac_settings	- LDAC mode config Structure.

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_multi_dac_a_value()

int ad5706r_set_multi_dac_a_value	(	struct ad5706r_dev *	dev,
		uint16_t	dac_value )

Set dac value on Multi DAC input register A.

Set dac value on Multi DAC input register A.

Parameters

dev	- The device structure.
dac_value	- value that will be set in MULTI DAC input register A.

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_multi_ldac_config()

int ad5706r_set_multi_ldac_config	(	struct ad5706r_dev *	dev,
		uint16_t	ch_mask,
		enum ad5706r_dac_mode	dac_mode,
		struct ad5706r_ldac_settings *	ldac_settings )

Set ldac config for multiple channels.

Set ldac config for multiple channels.

Parameters

dev	- The device structure.
ch_mask	- Selected channels mask.
dac_mode	- DAC Controller Mode to be configured for selected channel. Accepted values: AD5706R_DIRECT_WRITE_REG (default) AD5706R_SW_LDAC AD5706R_HW_LDAC AD5706R_SW_TOGGLE AD5706R_HW_TOGGLE AD5706R_SW_DITHER AD5706R_HW_DITHER
ldac_settings	- LDAC mode config Structure.

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_mux_out_mode()

int ad5706r_set_mux_out_mode	(	struct ad5706r_dev *	dev,
		enum ad5706r_mux_out_state	mux_output_mode_sel )

Set the multiplexer output mode.

Set the multiplexer output mode.

Parameters

dev	- The device structure.
mux_output_mode_sel	- Select mux output state. Accepted values: AD5706R_HIGH_Z (default) AD5706R_BYPASS AD5706R_BUFFER

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_mux_out_select()

int ad5706r_set_mux_out_select	(	struct ad5706r_dev *	dev,
		enum ad5706r_mux_out_select	mux_output_sel )

Set the multiplexer output select register.

Set the multiplexer output select register.

Parameters

dev	- The device structure.
mux_output_sel	- Select signal to be monitored on the mux_out pin.

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_operating_mode()

int ad5706r_set_operating_mode	(	struct ad5706r_dev *	dev,
		enum ad5706r_channels	ch,
		enum ad5706r_output_op_mode	op_mode )

Set output operating mode of a channel.

Set output operating mode of a channel.

Parameters

dev	- The device structure.
ch	- Channel selected.
op_mode	- Output operating mode to be selected. Accepted values: AD5706R_SHUTDOWN_SW (default) AD5706R_SHUTDOWN_SW_W_GND AD5706R_NORMAL_SW AD5706R_SHUTDOWN_HW AD5706R_SHUTDOWN_HW_W_GND AD5706R_NORMAL_HW

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_reference()

int ad5706r_set_reference	(	struct ad5706r_dev *	dev,
		enum ad5706r_vref_select	reference_selector )

Set reference configuration.

Set reference configuration.

Parameters

dev	- The device structure.
reference_selector	- The reference to be selected. Accepted values: AD5706R_EXTERNAL_VREF_PIN_INPUT (default) AD5706R_INTERNAL_VREF_PIN_2P5V

Returns

0 in case of success, negative error code otherwise.

ad5706r_set_sync_async_ldac()

int ad5706r_set_sync_async_ldac	(	struct ad5706r_dev *	dev,
		uint16_t	mask_ldac_sync_async )

Set sync/async ldac configuration.

Set sync/async ldac configuration.

Parameters

dev	- The device structure.
mask_ldac_sync_async	- The array contains SYNC/ASYNC mode channel masks.

Returns

0 in case of success, negative error code otherwise.

ad5706r_shdn_trigger()

int ad5706r_shdn_trigger	(	struct ad5706r_dev *	dev,
		bool	shdn_state )

Set SHDN pin state.

Set SHDN pin state.

Parameters

dev	- The device structure.
shdn_state	- Boolean selection for SHDN state.

Returns

0 in case of success, negative error code otherwise.

ad5706r_spi_reg_read()

int ad5706r_spi_reg_read	(	struct ad5706r_dev *	dev,
		uint32_t	reg_addr,
		uint16_t *	reg_data )

Read from device.

Read from device.

Parameters

dev	- The device structure.
reg_addr	- The register address.
reg_data	- The register data.

Returns

0 in case of success, negative error code otherwise.

ad5706r_spi_reg_read_multiple()

int ad5706r_spi_reg_read_multiple	(	struct ad5706r_dev *	dev,
		uint32_t	start_addr,
		uint8_t	count,
		uint8_t *	buff )

Read multiple register's values.

Multiple read to device.

Parameters

dev	- The device structure.
start_addr	- Starting register address to read from.
count	- Number of bytes to read.
buff	- Buffer to store data.

Returns

0 in case of success, negative error code otherwise.

Offset register address when in descending address mode with respect to register length.

ad5706r_spi_reg_write()

int ad5706r_spi_reg_write	(	struct ad5706r_dev *	dev,
		uint32_t	reg_addr,
		uint16_t	reg_data )

Write to device.

Write to device.

Parameters

dev	- The device structure.
reg_addr	- The register address.
reg_data	- The register data.

Returns

0 in case of success, negative error code otherwise.

ad5706r_spi_reg_write_multiple()

int ad5706r_spi_reg_write_multiple	(	struct ad5706r_dev *	dev,
		uint32_t	start_addr,
		uint8_t	count,
		uint8_t *	buff )

Write multiple register's values.

Multiple write to device.

Parameters

dev	- The device structure.
start_addr	- Starting register address to write into.
count	- Number of bytes to write.
buff	- Buffer to write data from.

Returns

0 in case of success, negative error code otherwise.

Offset register address when in descending address mode with respect to register length.

ad5706r_spi_write_mask()

int ad5706r_spi_write_mask	(	struct ad5706r_dev *	dev,
		uint32_t	reg_addr,
		uint32_t	mask,
		uint16_t	data )

SPI write to device using a mask.

SPI write to device using a mask.

Parameters

dev	- The device structure.
reg_addr	- The register address.
mask	- The mask.
data	- The register data.

Returns

0 in case of success, negative error code otherwise.

ad5706r_sw_ldac_trigger()

int ad5706r_sw_ldac_trigger

(

struct ad5706r_dev *

dev

)

Trigger the LDAC using software.

SW LDAC trigger.

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

ad5706r_sw_reset()

int ad5706r_sw_reset

(

struct ad5706r_dev *

dev

)

Perform soft reset.

Soft reset

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.