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ad5710r.h File Reference

Header file of ad5710r Driver. More...

#include <stdint.h>
#include <stdbool.h>
#include "no_os_spi.h"
#include "no_os_gpio.h"
#include "no_os_util.h"
#include "no_os_crc8.h"
Include dependency graph for ad5710r.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes

struct  ad5710r_transfer_config
 
struct  ad5710r_transfer_data
 
struct  ad5710r_desc
 
struct  ad5710r_init_param
 

Macros

#define AD5710R_R1B   (1ul << 16)
 
#define AD5710R_R2B   (2ul << 16)
 
#define AD5710R_LEN(x)
 
#define AD5710R_ADDR(x)
 
#define AD5710R_MD_ADDR_MASK   NO_OS_GENMASK(1, 0)
 
#define AD5710R_MD_ADDR(x)
 
#define AD5710R_MAX_REG_SIZE   2
 
#define AD5710R_MAX_CHANNEL_OP_MODE_0   2
 
#define AD5710R_MAX_SHORT_REG_ADDR   (AD5710R_R1B | 0x80)
 
#define AD5710R_READ_BIT   NO_OS_BIT(7)
 
#define AD5710R_ADDR_MASK   (~AD5710R_READ_BIT)
 
#define AD5710R_WRITE_BIT_LONG_INSTR   0x00
 
#define AD5710R_EXTERNAL_VREF_MASK   NO_OS_BIT(1)
 
#define AD5710R_DEFAULT_STATUS_REG_VAL   0x04
 
#define AD5710R_SCRATCH_PAD_TEST_VAL   0x34
 
#define AD5710R_CRC_POLY   0x07
 
#define AD5710R_CRC_SEED   0xA5
 
#define AD5710R_REG_ADDR_OPERATING_MODE_CHN(x)
 
#define AD5710R_REG_ADDR_INTERFACE_CONFIG_A   (AD5710R_R1B | 0x00)
 
#define AD5710R_REG_ADDR_INTERFACE_CONFIG_B   (AD5710R_R1B | 0x01)
 
#define AD5710R_REG_ADDR_DEVICE_CONFIG   (AD5710R_R1B | 0x02)
 
#define AD5710R_REG_ADDR_CHIP_TYPE   (AD5710R_R1B | 0x03)
 
#define AD5710R_REG_ADDR_PRODUCT_ID_L   (AD5710R_R1B | 0x04)
 
#define AD5710R_REG_ADDR_PRODUCT_ID_H   (AD5710R_R1B | 0x05)
 
#define AD5710R_REG_ADDR_CHIP_GRADE   (AD5710R_R1B | 0x06)
 
#define AD5710R_REG_ADDR_SCRATCH_PAD   (AD5710R_R1B | 0x0A)
 
#define AD5710R_REG_ADDR_SPI_REVISION   (AD5710R_R1B | 0x0B)
 
#define AD5710R_REG_ADDR_VENDOR_L   (AD5710R_R1B | 0x0C)
 
#define AD5710R_REG_ADDR_VENDOR_H   (AD5710R_R1B | 0x0D)
 
#define AD5710R_REG_ADDR_STREAM_MODE   (AD5710R_R1B | 0x0E)
 
#define AD5710R_REG_ADDR_TRANSFER_REGISTER   (AD5710R_R1B | 0x0F)
 
#define AD5710R_REG_ADDR_INTERFACE_CONFIG_C   (AD5710R_R1B | 0x10)
 
#define AD5710R_REG_ADDR_INTERFACE_STATUS_A   (AD5710R_R1B | 0x11)
 
#define AD5710R_REG_ADDR_OPERATING_MODE_0   (AD5710R_R1B | 0x20)
 
#define AD5710R_REG_ADDR_OPERATING_MODE_1   (AD5710R_R1B | 0x21)
 
#define AD5710R_REG_ADDR_OUTPUT_CONTROL_0   (AD5710R_R1B | 0x2A)
 
#define AD5710R_REG_ADDR_REF_CONTROL_0   (AD5710R_R1B | 0x3C)
 
#define AD5710R_REG_ADDR_MUX_OUT_SELECT   (AD5710R_R1B | 0x93)
 
#define AD5710R_REG_ADDR_STATUS_CONTROL   (AD5710R_R1B | 0xC2)
 
#define AD5710R_REG_ADDR_HW_LDAC_EN_0   (AD5710R_R1B | 0xD0)
 
#define AD5710R_REG_ADDR_SW_LDAC_EN_0   (AD5710R_R1B | 0xD1)
 
#define AD5710R_REG_ADDR_DAC_CHN(x)
 
#define AD5710R_REG_ADDR_MULTI_DAC_CH   (AD5710R_R2B | 0XE2)
 
#define AD5710R_REG_ADDR_MULTI_DAC_SEL_0   (AD5710R_R1B | 0XE4)
 
#define AD5710R_REG_ADDR_SW_LDAC_TRIG_A   (AD5710R_R1B | 0XE5)
 
#define AD5710R_REG_ADDR_MULTI_INPUT_CH   (AD5710R_R2B | 0XE6)
 
#define AD5710R_REG_ADDR_MULTI_INPUT_SEL_0   (AD5710R_R1B | 0XE8)
 
#define AD5710R_REG_ADDR_SW_LDAC_TRIG_B   (AD5710R_R1B | 0XE9)
 
#define AD5710R_REG_ADDR_INPUT_CHN(x)
 
#define AD5710R_V_I_CH_OUTPUT_SELECT   (AD5710R_R1B | 0xFF)
 
#define AD5710R_MASK_SOFTWARE_RESET   (NO_OS_BIT(7) | NO_OS_BIT(0))
 
#define AD5710R_MASK_ADDR_ASCENSION   NO_OS_BIT(5)
 
#define AD5710R_MASK_SDO_ACTIVE   NO_OS_BIT(4)
 
#define AD5710R_MASK_SINGLE_INST   NO_OS_BIT(7)
 
#define AD5710R_MASK_SHORT_INSTRUCTION   NO_OS_BIT(3)
 
#define AD5710R_MASK_OPERATING_MODES   NO_OS_GENMASK(1, 0)
 
#define AD5710R_MASK_GRADE   NO_OS_GENMASK(7, 4)
 
#define AD5710R_MASK_DEVICE_REVISION   NO_OS_GENMASK(3, 0)
 
#define AD5710R_MASK_LENGTH   0xFF
 
#define AD5710R_MASK_STREAM_LENGTH_KEEP_VALUE   NO_OS_BIT(2)
 
#define AD5710R_MASK_CRC_ENABLE   (NO_OS_GENMASK(7, 6) | NO_OS_GENMASK(1, 0))
 
#define AD5710R_MASK_STRICT_REGISTER_ACCESS   NO_OS_BIT(5)
 
#define AD5710R_MASK_ACTIVE_INTERFACE_MODE   NO_OS_GENMASK(3, 2)
 
#define AD5710R_MASK_INTERFACE_NOT_READY   NO_OS_BIT(7)
 
#define AD5710R_MASK_CLOCK_COUNTING_ERROR   NO_OS_BIT(4)
 
#define AD5710R_MASK_INVALID_OR_NO_CRC   NO_OS_BIT(3)
 
#define AD5710R_MASK_PARTIAL_REGISTER_ACCESS   NO_OS_BIT(1)
 
#define AD5710R_MASK_OPERATING_MODE(x)
 
#define AD5710R_MASK_OUTPUT_RANGE   NO_OS_BIT(2)
 
#define AD5710R_MASK_REERENCE_SELECT   NO_OS_BIT(0)
 
#define AD5710R_MASK_MUX_SELECT   NO_OS_GENMASK(4, 0)
 
#define AD5710R_MASK_HW_LDAC_EN_0(x)
 
#define AD5710R_MASK_SW_LDAC_EN_0(x)
 
#define AD5710R_MASK_SW_LDAC_TRIG_B   NO_OS_BIT(7)
 
#define AD5710R_REG_ADDR_MAX   0xFF
 
#define AD5710R_NUM_CH   8
 
#define AD5710R_MASK_CH(ch)
 
#define AD5710R_LDAC_PULSE_US   1
 
#define AD5710R_CH_DAC_DATA_LSB(x)
 
#define AD5710R_CH_DAC_DATA_MSB(x)
 
#define AD5710R_CRC_ENABLE_VALUE   (NO_OS_BIT(6) | NO_OS_BIT(1))
 
#define AD5710R_CRC_DISABLE_VALUE   (NO_OS_BIT(1) | NO_OS_BIT(0))
 
#define AD5710R_NUM_MUX_OUT_SELECTS   27
 
#define AD5710R_NUM_REGS   46
 

Enumerations

enum  ad5710r_id { AD5710R_ID }
 Device IDs. More...
 
enum  ad5710r_product_id { PROD_ID_AD5710R = 0x00 }
 
enum  ad5710r_ch_mode_select {
  IMODE ,
  VMODE
}
 Channel Mode selects. More...
 
enum  ad5710r_ch_vref_select {
  AD5710R_EXTERNAL_VREF_PIN_INPUT ,
  AD5710R_INTERNAL_VREF_PIN_2P5V
}
 Channel voltage reference options. More...
 
enum  ad5710r_status {
  AD5710R_DEVICE_NOT_READY = 0x0001 ,
  AD5710R_INTERFACE_NOT_READY = 0x0002 ,
  AD5710R_RESET_STATUS = 0x0004 ,
  AD5710R_DAC_UPDATE_STATUS = 0x0008 ,
  AD5710R_PARTIAL_REGISTER_ACCESS = 0x0002 ,
  AD5710R_INVALID_OR_NO_CRC = 0x0008 ,
  AD5710R_CLOCK_COUNTING_ERROR = 0x0010 ,
  AD5710R_DEVICE_NOT_READY_ERR = 0x0080
}
 Status bits. More...
 
enum  ad5710r_ch_output_range {
  AD5710R_CH_OUTPUT_RANGE_0_VREF ,
  AD5710R_CH_OUTPUT_RANGE_0_2VREF
}
 Channel output range options. More...
 
enum  ad5710r_operating_mode {
  AD5710R_CH_OPERATING_MODE_0 ,
  AD5710R_CH_OPERATING_MODE_1 ,
  AD5710R_CH_OPERATING_MODE_2 ,
  AD5710R_CH_OPERATING_MODE_3
}
 Operating modes. More...
 
enum  ad5710r_write_mode {
  AD5710R_WRITE_DAC_REGS ,
  AD5710R_WRITE_INPUT_REGS ,
  AD5710R_WRITE_INPUT_REGS_AND_TRIGGER_LDAC
}
 Write modes. More...
 
enum  ad5710r_mux_out_select {
  POWERED_DOWN ,
  VOUT0 ,
  IOUT0_SOURCE_MODE ,
  IOUT0_SINK_MODE ,
  VOUT1 ,
  IOUT1_SOURCE_MODE ,
  IOUT1_SINK_MODE ,
  VOUT2 ,
  IOUT2_SOURCE_MODE ,
  IOUT2_SINK_MODE ,
  VOUT3 ,
  IOUT3_SOURCE_MODE ,
  IOUT3_SINK_MODE ,
  VOUT4 ,
  IOUT4_SOURCE_MODE ,
  IOUT4_SINK_MODE ,
  VOUT5 ,
  IOUT5_SOURCE_MODE ,
  IOUT5_SINK_MODE ,
  VOUT6 ,
  IOUT6_SOURCE_MODE ,
  IOUT6_SINK_MODE ,
  VOUT7 ,
  IOUT7_SOURCE_MODE ,
  IOUT7_SINK_MODE ,
  DIE_TEMPERATURE ,
  TIED_TO_AGND_INTERNALLY
}
 Signals to monitor on MUX_OUT pin. More...
 

Functions

int ad5710r_reg_write (struct ad5710r_desc *desc, uint32_t reg_addr, uint16_t reg_val)
 Write into device register.
 
int ad5710r_reg_read (struct ad5710r_desc *desc, uint32_t reg_addr, uint16_t *reg_val)
 Read from device register.
 
int ad5710r_spi_write_mask (struct ad5710r_desc *desc, uint32_t addr, uint32_t mask, uint16_t val)
 SPI write to device using a mask.
 
int ad5710r_update_interface_cfg (struct ad5710r_desc *desc, struct ad5710r_transfer_config *cfg)
 Updates the interface configuration.
 
int ad5710r_multiple_reg_write (struct ad5710r_desc *desc, uint32_t start_addr, uint8_t buff_len, uint8_t *buff)
 Write multiple register's values.
 
int ad5710r_multiple_reg_read (struct ad5710r_desc *desc, uint32_t addr, uint8_t buff_len, uint8_t *buff)
 Read multiple register's values.
 
int ad5710r_set_reference (struct ad5710r_desc *desc, enum ad5710r_ch_vref_select reference_selector)
 Set reference configuration.
 
int ad5710r_set_operating_mode (struct ad5710r_desc *desc, uint8_t chn_num, enum ad5710r_operating_mode chn_op_mode)
 Set operating mode for each channel.
 
int ad5710r_set_output_range (struct ad5710r_desc *desc, enum ad5710r_ch_output_range range_sel)
 Set output range for all channels.
 
int ad5710r_set_crc_enable (struct ad5710r_desc *desc, bool en_di)
 Configures the CRC selection bit.
 
int ad5710r_set_mux_out_select (struct ad5710r_desc *desc, enum ad5710r_mux_out_select mux_output_sel)
 Set the multiplexer output select register.
 
int ad5710r_set_hw_ldac (struct ad5710r_desc *desc, uint8_t mask_hw_ldac)
 Set the hardware ldac configuration.
 
int ad5710r_set_sw_ldac (struct ad5710r_desc *desc, uint8_t mask_sw_ldac)
 Set the software ldac configuration.
 
int ad5710r_set_dac_value (struct ad5710r_desc *desc, uint16_t dac_value, uint8_t dac_channel, enum ad5710r_write_mode write_mode)
 Set dac value based on the user selected DAC update mode.
 
int ad5710r_set_multidac_value (struct ad5710r_desc *desc, uint16_t dac_value, uint8_t dac_chn_mask, enum ad5710r_write_mode write_mode)
 Sets dac value for multiple channels.
 
int ad5710r_sw_ldac_trigger (struct ad5710r_desc *desc)
 Trigger the LDAC using software.
 
int ad5710r_hw_ldac_trigger (struct ad5710r_desc *desc)
 Trigger the LDAC using hardware.
 
int ad5710r_reset (struct ad5710r_desc *desc)
 Perform a hard/soft reset.
 
int ad5710r_channel_output_select (struct ad5710r_desc *desc, uint8_t chn_num, enum ad5710r_ch_mode_select ch_mode)
 Selects the output mode for a specific channel of the AD5710R DAC.
 
int ad5710r_init (struct ad5710r_desc **desc, struct ad5710r_init_param *init_param)
 Initialize the device structure.
 
int ad5710r_remove (struct ad5710r_desc *desc)
 Free the device descriptor.
 

Detailed Description

Header file of ad5710r Driver.

Author
Sai Kiran Gudla (saiki.nosp@m.ran..nosp@m.gudla.nosp@m.@ana.nosp@m.log.c.nosp@m.om)

Copyright 2025(c) Analog Devices, Inc.

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  • Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  • Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  • Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
  • The use of this software may or may not infringe the patent rights of one or more patent holders. This license does not release you from the requirement that you obtain separate licenses from these patent holders to use this software.
  • Use of the software either in source or binary form, must be run on or directly connected to an Analog Devices Inc. component.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT

  • LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD5710R_ADDR

#define AD5710R_ADDR ( x)
Value:
(x & 0xFFFF)

◆ AD5710R_ADDR_MASK

#define AD5710R_ADDR_MASK   (~AD5710R_READ_BIT)

◆ AD5710R_CH_DAC_DATA_LSB

#define AD5710R_CH_DAC_DATA_LSB ( x)
Value:
((x) & 0xFF)

◆ AD5710R_CH_DAC_DATA_MSB

#define AD5710R_CH_DAC_DATA_MSB ( x)
Value:
((x) >> 8 & 0xFF)

◆ AD5710R_CRC_DISABLE_VALUE

#define AD5710R_CRC_DISABLE_VALUE   (NO_OS_BIT(1) | NO_OS_BIT(0))

◆ AD5710R_CRC_ENABLE_VALUE

#define AD5710R_CRC_ENABLE_VALUE   (NO_OS_BIT(6) | NO_OS_BIT(1))

◆ AD5710R_CRC_POLY

#define AD5710R_CRC_POLY   0x07

◆ AD5710R_CRC_SEED

#define AD5710R_CRC_SEED   0xA5

◆ AD5710R_DEFAULT_STATUS_REG_VAL

#define AD5710R_DEFAULT_STATUS_REG_VAL   0x04

◆ AD5710R_EXTERNAL_VREF_MASK

#define AD5710R_EXTERNAL_VREF_MASK   NO_OS_BIT(1)

◆ AD5710R_LDAC_PULSE_US

#define AD5710R_LDAC_PULSE_US   1

◆ AD5710R_LEN

#define AD5710R_LEN ( x)
Value:
(x >> 16)

◆ AD5710R_MASK_ACTIVE_INTERFACE_MODE

#define AD5710R_MASK_ACTIVE_INTERFACE_MODE   NO_OS_GENMASK(3, 2)

◆ AD5710R_MASK_ADDR_ASCENSION

#define AD5710R_MASK_ADDR_ASCENSION   NO_OS_BIT(5)

◆ AD5710R_MASK_CH

#define AD5710R_MASK_CH ( ch)
Value:
#define NO_OS_BIT(x)
Definition no_os_util.h:46

◆ AD5710R_MASK_CLOCK_COUNTING_ERROR

#define AD5710R_MASK_CLOCK_COUNTING_ERROR   NO_OS_BIT(4)

◆ AD5710R_MASK_CRC_ENABLE

#define AD5710R_MASK_CRC_ENABLE   (NO_OS_GENMASK(7, 6) | NO_OS_GENMASK(1, 0))

◆ AD5710R_MASK_DEVICE_REVISION

#define AD5710R_MASK_DEVICE_REVISION   NO_OS_GENMASK(3, 0)

◆ AD5710R_MASK_GRADE

#define AD5710R_MASK_GRADE   NO_OS_GENMASK(7, 4)

◆ AD5710R_MASK_HW_LDAC_EN_0

#define AD5710R_MASK_HW_LDAC_EN_0 ( x)
Value:

◆ AD5710R_MASK_INTERFACE_NOT_READY

#define AD5710R_MASK_INTERFACE_NOT_READY   NO_OS_BIT(7)

◆ AD5710R_MASK_INVALID_OR_NO_CRC

#define AD5710R_MASK_INVALID_OR_NO_CRC   NO_OS_BIT(3)

◆ AD5710R_MASK_LENGTH

#define AD5710R_MASK_LENGTH   0xFF

◆ AD5710R_MASK_MUX_SELECT

#define AD5710R_MASK_MUX_SELECT   NO_OS_GENMASK(4, 0)

◆ AD5710R_MASK_OPERATING_MODE

#define AD5710R_MASK_OPERATING_MODE ( x)
Value:
0x03 << ((x % 4)*2)

◆ AD5710R_MASK_OPERATING_MODES

#define AD5710R_MASK_OPERATING_MODES   NO_OS_GENMASK(1, 0)

◆ AD5710R_MASK_OUTPUT_RANGE

#define AD5710R_MASK_OUTPUT_RANGE   NO_OS_BIT(2)

◆ AD5710R_MASK_PARTIAL_REGISTER_ACCESS

#define AD5710R_MASK_PARTIAL_REGISTER_ACCESS   NO_OS_BIT(1)

◆ AD5710R_MASK_REERENCE_SELECT

#define AD5710R_MASK_REERENCE_SELECT   NO_OS_BIT(0)

◆ AD5710R_MASK_SDO_ACTIVE

#define AD5710R_MASK_SDO_ACTIVE   NO_OS_BIT(4)

◆ AD5710R_MASK_SHORT_INSTRUCTION

#define AD5710R_MASK_SHORT_INSTRUCTION   NO_OS_BIT(3)

◆ AD5710R_MASK_SINGLE_INST

#define AD5710R_MASK_SINGLE_INST   NO_OS_BIT(7)

◆ AD5710R_MASK_SOFTWARE_RESET

#define AD5710R_MASK_SOFTWARE_RESET   (NO_OS_BIT(7) | NO_OS_BIT(0))

◆ AD5710R_MASK_STREAM_LENGTH_KEEP_VALUE

#define AD5710R_MASK_STREAM_LENGTH_KEEP_VALUE   NO_OS_BIT(2)

◆ AD5710R_MASK_STRICT_REGISTER_ACCESS

#define AD5710R_MASK_STRICT_REGISTER_ACCESS   NO_OS_BIT(5)

◆ AD5710R_MASK_SW_LDAC_EN_0

#define AD5710R_MASK_SW_LDAC_EN_0 ( x)
Value:

◆ AD5710R_MASK_SW_LDAC_TRIG_B

#define AD5710R_MASK_SW_LDAC_TRIG_B   NO_OS_BIT(7)

◆ AD5710R_MAX_CHANNEL_OP_MODE_0

#define AD5710R_MAX_CHANNEL_OP_MODE_0   2

◆ AD5710R_MAX_REG_SIZE

#define AD5710R_MAX_REG_SIZE   2

◆ AD5710R_MAX_SHORT_REG_ADDR

#define AD5710R_MAX_SHORT_REG_ADDR   (AD5710R_R1B | 0x80)

◆ AD5710R_MD_ADDR

#define AD5710R_MD_ADDR ( x)
Value:
#define AD5710R_MD_ADDR_MASK
Definition ad5710r.h:57

◆ AD5710R_MD_ADDR_MASK

#define AD5710R_MD_ADDR_MASK   NO_OS_GENMASK(1, 0)

◆ AD5710R_NUM_CH

#define AD5710R_NUM_CH   8

◆ AD5710R_NUM_MUX_OUT_SELECTS

#define AD5710R_NUM_MUX_OUT_SELECTS   27

◆ AD5710R_NUM_REGS

#define AD5710R_NUM_REGS   46

◆ AD5710R_R1B

#define AD5710R_R1B   (1ul << 16)

◆ AD5710R_R2B

#define AD5710R_R2B   (2ul << 16)

◆ AD5710R_READ_BIT

#define AD5710R_READ_BIT   NO_OS_BIT(7)

◆ AD5710R_REG_ADDR_CHIP_GRADE

#define AD5710R_REG_ADDR_CHIP_GRADE   (AD5710R_R1B | 0x06)

◆ AD5710R_REG_ADDR_CHIP_TYPE

#define AD5710R_REG_ADDR_CHIP_TYPE   (AD5710R_R1B | 0x03)

◆ AD5710R_REG_ADDR_DAC_CHN

#define AD5710R_REG_ADDR_DAC_CHN ( x)
Value:
(AD5710R_R2B | (0xD2 + (x * 2)))
#define AD5710R_R2B
Definition ad5710r.h:54

◆ AD5710R_REG_ADDR_DEVICE_CONFIG

#define AD5710R_REG_ADDR_DEVICE_CONFIG   (AD5710R_R1B | 0x02)

◆ AD5710R_REG_ADDR_HW_LDAC_EN_0

#define AD5710R_REG_ADDR_HW_LDAC_EN_0   (AD5710R_R1B | 0xD0)

◆ AD5710R_REG_ADDR_INPUT_CHN

#define AD5710R_REG_ADDR_INPUT_CHN ( x)
Value:
(AD5710R_R2B | (0xEA + (x * 2)))

◆ AD5710R_REG_ADDR_INTERFACE_CONFIG_A

#define AD5710R_REG_ADDR_INTERFACE_CONFIG_A   (AD5710R_R1B | 0x00)

◆ AD5710R_REG_ADDR_INTERFACE_CONFIG_B

#define AD5710R_REG_ADDR_INTERFACE_CONFIG_B   (AD5710R_R1B | 0x01)

◆ AD5710R_REG_ADDR_INTERFACE_CONFIG_C

#define AD5710R_REG_ADDR_INTERFACE_CONFIG_C   (AD5710R_R1B | 0x10)

◆ AD5710R_REG_ADDR_INTERFACE_STATUS_A

#define AD5710R_REG_ADDR_INTERFACE_STATUS_A   (AD5710R_R1B | 0x11)

◆ AD5710R_REG_ADDR_MAX

#define AD5710R_REG_ADDR_MAX   0xFF

◆ AD5710R_REG_ADDR_MULTI_DAC_CH

#define AD5710R_REG_ADDR_MULTI_DAC_CH   (AD5710R_R2B | 0XE2)

◆ AD5710R_REG_ADDR_MULTI_DAC_SEL_0

#define AD5710R_REG_ADDR_MULTI_DAC_SEL_0   (AD5710R_R1B | 0XE4)

◆ AD5710R_REG_ADDR_MULTI_INPUT_CH

#define AD5710R_REG_ADDR_MULTI_INPUT_CH   (AD5710R_R2B | 0XE6)

◆ AD5710R_REG_ADDR_MULTI_INPUT_SEL_0

#define AD5710R_REG_ADDR_MULTI_INPUT_SEL_0   (AD5710R_R1B | 0XE8)

◆ AD5710R_REG_ADDR_MUX_OUT_SELECT

#define AD5710R_REG_ADDR_MUX_OUT_SELECT   (AD5710R_R1B | 0x93)

◆ AD5710R_REG_ADDR_OPERATING_MODE_0

#define AD5710R_REG_ADDR_OPERATING_MODE_0   (AD5710R_R1B | 0x20)

◆ AD5710R_REG_ADDR_OPERATING_MODE_1

#define AD5710R_REG_ADDR_OPERATING_MODE_1   (AD5710R_R1B | 0x21)

◆ AD5710R_REG_ADDR_OPERATING_MODE_CHN

#define AD5710R_REG_ADDR_OPERATING_MODE_CHN ( x)
Value:
(AD5710R_R1B | (0x20 + x/4))
#define AD5710R_R1B
Definition ad5710r.h:53

◆ AD5710R_REG_ADDR_OUTPUT_CONTROL_0

#define AD5710R_REG_ADDR_OUTPUT_CONTROL_0   (AD5710R_R1B | 0x2A)

◆ AD5710R_REG_ADDR_PRODUCT_ID_H

#define AD5710R_REG_ADDR_PRODUCT_ID_H   (AD5710R_R1B | 0x05)

◆ AD5710R_REG_ADDR_PRODUCT_ID_L

#define AD5710R_REG_ADDR_PRODUCT_ID_L   (AD5710R_R1B | 0x04)

◆ AD5710R_REG_ADDR_REF_CONTROL_0

#define AD5710R_REG_ADDR_REF_CONTROL_0   (AD5710R_R1B | 0x3C)

◆ AD5710R_REG_ADDR_SCRATCH_PAD

#define AD5710R_REG_ADDR_SCRATCH_PAD   (AD5710R_R1B | 0x0A)

◆ AD5710R_REG_ADDR_SPI_REVISION

#define AD5710R_REG_ADDR_SPI_REVISION   (AD5710R_R1B | 0x0B)

◆ AD5710R_REG_ADDR_STATUS_CONTROL

#define AD5710R_REG_ADDR_STATUS_CONTROL   (AD5710R_R1B | 0xC2)

◆ AD5710R_REG_ADDR_STREAM_MODE

#define AD5710R_REG_ADDR_STREAM_MODE   (AD5710R_R1B | 0x0E)

◆ AD5710R_REG_ADDR_SW_LDAC_EN_0

#define AD5710R_REG_ADDR_SW_LDAC_EN_0   (AD5710R_R1B | 0xD1)

◆ AD5710R_REG_ADDR_SW_LDAC_TRIG_A

#define AD5710R_REG_ADDR_SW_LDAC_TRIG_A   (AD5710R_R1B | 0XE5)

◆ AD5710R_REG_ADDR_SW_LDAC_TRIG_B

#define AD5710R_REG_ADDR_SW_LDAC_TRIG_B   (AD5710R_R1B | 0XE9)

◆ AD5710R_REG_ADDR_TRANSFER_REGISTER

#define AD5710R_REG_ADDR_TRANSFER_REGISTER   (AD5710R_R1B | 0x0F)

◆ AD5710R_REG_ADDR_VENDOR_H

#define AD5710R_REG_ADDR_VENDOR_H   (AD5710R_R1B | 0x0D)

◆ AD5710R_REG_ADDR_VENDOR_L

#define AD5710R_REG_ADDR_VENDOR_L   (AD5710R_R1B | 0x0C)

◆ AD5710R_SCRATCH_PAD_TEST_VAL

#define AD5710R_SCRATCH_PAD_TEST_VAL   0x34

◆ AD5710R_V_I_CH_OUTPUT_SELECT

#define AD5710R_V_I_CH_OUTPUT_SELECT   (AD5710R_R1B | 0xFF)

◆ AD5710R_WRITE_BIT_LONG_INSTR

#define AD5710R_WRITE_BIT_LONG_INSTR   0x00

Enumeration Type Documentation

◆ ad5710r_ch_mode_select

Channel Mode selects.

Enumerator
IMODE 
VMODE 

◆ ad5710r_ch_output_range

Channel output range options.

Enumerator
AD5710R_CH_OUTPUT_RANGE_0_VREF 
AD5710R_CH_OUTPUT_RANGE_0_2VREF 

◆ ad5710r_ch_vref_select

Channel voltage reference options.

Enumerator
AD5710R_EXTERNAL_VREF_PIN_INPUT 
AD5710R_INTERNAL_VREF_PIN_2P5V 

◆ ad5710r_id

enum ad5710r_id

Device IDs.

Enumerator
AD5710R_ID 

◆ ad5710r_mux_out_select

Signals to monitor on MUX_OUT pin.

Enumerator
POWERED_DOWN 
VOUT0 
IOUT0_SOURCE_MODE 
IOUT0_SINK_MODE 
VOUT1 
IOUT1_SOURCE_MODE 
IOUT1_SINK_MODE 
VOUT2 
IOUT2_SOURCE_MODE 
IOUT2_SINK_MODE 
VOUT3 
IOUT3_SOURCE_MODE 
IOUT3_SINK_MODE 
VOUT4 
IOUT4_SOURCE_MODE 
IOUT4_SINK_MODE 
VOUT5 
IOUT5_SOURCE_MODE 
IOUT5_SINK_MODE 
VOUT6 
IOUT6_SOURCE_MODE 
IOUT6_SINK_MODE 
VOUT7 
IOUT7_SOURCE_MODE 
IOUT7_SINK_MODE 
DIE_TEMPERATURE 
TIED_TO_AGND_INTERNALLY 

◆ ad5710r_operating_mode

Operating modes.

Enumerator
AD5710R_CH_OPERATING_MODE_0 
AD5710R_CH_OPERATING_MODE_1 
AD5710R_CH_OPERATING_MODE_2 
AD5710R_CH_OPERATING_MODE_3 

◆ ad5710r_product_id

AD5710R product ID

Enumerator
PROD_ID_AD5710R 

◆ ad5710r_status

Status bits.

Enumerator
AD5710R_DEVICE_NOT_READY 
AD5710R_INTERFACE_NOT_READY 
AD5710R_RESET_STATUS 
AD5710R_DAC_UPDATE_STATUS 
AD5710R_PARTIAL_REGISTER_ACCESS 
AD5710R_INVALID_OR_NO_CRC 
AD5710R_CLOCK_COUNTING_ERROR 
AD5710R_DEVICE_NOT_READY_ERR 

◆ ad5710r_write_mode

Write modes.

Enumerator
AD5710R_WRITE_DAC_REGS 
AD5710R_WRITE_INPUT_REGS 
AD5710R_WRITE_INPUT_REGS_AND_TRIGGER_LDAC 

Function Documentation

◆ ad5710r_channel_output_select()

int ad5710r_channel_output_select ( struct ad5710r_desc * desc,
uint8_t chn_num,
enum ad5710r_ch_mode_select ch_mode )

Selects the output mode for a specific channel of the AD5710R DAC.

Parameters
desc- The device structure.
chn_num- Channel number to configure.
ch_mode- Output mode to select for the channel (voltage or current).
Returns
0 in case of success, negative error code otherwise.

◆ ad5710r_hw_ldac_trigger()

int ad5710r_hw_ldac_trigger ( struct ad5710r_desc * desc)

Trigger the LDAC using hardware.

Parameters
desc- The device structure.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_init()

int ad5710r_init ( struct ad5710r_desc ** desc,
struct ad5710r_init_param * init_param )

Initialize the device structure.

Parameters
desc- The device structure to be initialized.
init_param- Initialization parameter for the device descriptor.
Returns
0 in case of success, negative error code otherwise.

◆ ad5710r_multiple_reg_read()

int ad5710r_multiple_reg_read ( struct ad5710r_desc * desc,
uint32_t addr,
uint8_t count,
uint8_t * buff )

Read multiple register's values.

Parameters
desc- The device structure.
addr- Starting register address to read from.
count- Number of bytes to read.
buff- Buffer to store data.
Returns
0 in case of success, negative error otherwise.

◆ ad5710r_multiple_reg_write()

int ad5710r_multiple_reg_write ( struct ad5710r_desc * desc,
uint32_t start_addr,
uint8_t count,
uint8_t * buff )

Write multiple register's values.

Parameters
desc- The device structure.
start_addr- Starting register address to write into.
count- Number of bytes to write.
buff- Buffer to write data from.
Returns
0 in case of success, negative error otherwise.

◆ ad5710r_reg_read()

int ad5710r_reg_read ( struct ad5710r_desc * desc,
uint32_t reg_addr,
uint16_t * reg_val )

Read from device register.

Parameters
desc- The device structure.
reg_addr- The register's address.
reg_val- The register's read value.
Returns
0 in case of success, negative error otherwise.
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◆ ad5710r_reg_write()

int ad5710r_reg_write ( struct ad5710r_desc * desc,
uint32_t reg_addr,
uint16_t reg_val )

Write into device register.

Parameters
desc- The device structure.
reg_addr- The register's address.
reg_val- The register's value.
Returns
0 in case of success, negative error otherwise.
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◆ ad5710r_remove()

int ad5710r_remove ( struct ad5710r_desc * desc)

Free the device descriptor.

Parameters
desc- The device structure.
Returns
0 in case of success, negative error code otherwise.

◆ ad5710r_reset()

int ad5710r_reset ( struct ad5710r_desc * desc)

Perform a hard/soft reset.

Parameters
desc- The device structure.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_set_crc_enable()

int ad5710r_set_crc_enable ( struct ad5710r_desc * desc,
bool en_di )

Configures the CRC selection bit.

Parameters
desc- The device structure.
en_di- boolean selection for crc bit.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_set_dac_value()

int ad5710r_set_dac_value ( struct ad5710r_desc * desc,
uint16_t dac_value,
uint8_t dac_channel,
enum ad5710r_write_mode write_mode )

Set dac value based on the user selected DAC update mode.

Parameters
desc- The device structure.
dac_value- value that will be set in the register.
dac_channel- selected channel.
write_mode- selected write mode.
Returns
0 in case of success, negative error code otherwise.

◆ ad5710r_set_hw_ldac()

int ad5710r_set_hw_ldac ( struct ad5710r_desc * desc,
uint8_t mask_hw_ldac )

Set the hardware ldac configuration.

Parameters
desc- The device structure.
mask_hw_ldac- The array contains HW LDAC channel masks.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_set_multidac_value()

int ad5710r_set_multidac_value ( struct ad5710r_desc * desc,
uint16_t dac_value,
uint8_t dac_chn_mask,
enum ad5710r_write_mode write_mode )

Sets dac value for multiple channels.

Parameters
desc- The device structure.
dac_value- value that will be set in the register.
dac_chn_mask- mask for selected channels.
write_mode- selected write mode.
Returns
0 in case of success, negative error code otherwise.

◆ ad5710r_set_mux_out_select()

int ad5710r_set_mux_out_select ( struct ad5710r_desc * desc,
enum ad5710r_mux_out_select mux_output_sel )

Set the multiplexer output select register.

Parameters
desc- The device structure.
mux_output_sel- signal to be monitored on the mux_out pin.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_set_operating_mode()

int ad5710r_set_operating_mode ( struct ad5710r_desc * desc,
uint8_t chn_num,
enum ad5710r_operating_mode chn_op_mode )

Set operating mode for each channel.

Parameters
desc- The device structure.
chn_num- Channel number to be configured.
chn_op_mode- Operation mode to be set.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_set_output_range()

int ad5710r_set_output_range ( struct ad5710r_desc * desc,
enum ad5710r_ch_output_range range_sel )

Set output range for all channels.

Parameters
desc- The device structure.
range_sel- Output range to be selected.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_set_reference()

int ad5710r_set_reference ( struct ad5710r_desc * desc,
enum ad5710r_ch_vref_select reference_selector )

Set reference configuration.

Parameters
desc- The device structure.
reference_selector- The reference to be selected.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_set_sw_ldac()

int ad5710r_set_sw_ldac ( struct ad5710r_desc * desc,
uint8_t mask_sw_ldac )

Set the software ldac configuration.

Parameters
desc- The device structure.
mask_sw_ldac- The array contains SW LDAC channel masks.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_spi_write_mask()

int ad5710r_spi_write_mask ( struct ad5710r_desc * desc,
uint32_t addr,
uint32_t mask,
uint16_t val )

SPI write to device using a mask.

Parameters
desc- The device structure.
addr- The register's address.
mask- The mask for a specific register field.
val- The register's value.
Returns
0 in case of success, negative error otherwise.
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◆ ad5710r_sw_ldac_trigger()

int ad5710r_sw_ldac_trigger ( struct ad5710r_desc * desc)

Trigger the LDAC using software.

Parameters
desc- The device structure.
Returns
0 in case of success, negative error code otherwise.
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◆ ad5710r_update_interface_cfg()

int ad5710r_update_interface_cfg ( struct ad5710r_desc * desc,
struct ad5710r_transfer_config * cfg )

Updates the interface configuration.

Parameters
desc- The device structure.
cfg- Updated interface configuration structure.
Returns
0 in case of success, negative error otherwise.
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