Go to the documentation of this file.
39 #ifndef AD5766_CORE_H_
40 #define AD5766_CORE_H_
@ NO_OS_SPI_MODE_1
Definition: no_os_spi.h:69
struct ad5758_init_param ad5758_default_init_param
Definition: ad5758_sdz.c:88
Structure holding the parameters for GPIO initialization.
Definition: no_os_gpio.h:85
uint32_t dma_baseaddr
Definition: ad5766_core.h:47
@ GPIO_PS
Definition: xilinx_gpio.h:62
@ SPI_PS
Definition: xilinx_spi.h:68
const struct xil_spi_init_param spi_extra
Definition: ad5758_sdz.c:59
#define SPI_ENGINE_CMD_ASSERT(delay, cs)
Definition: spi_engine_private.h:119
#define AD5758_SPI_CS
Definition: parameters.h:48
int32_t ad5766_core_setup(struct spi_engine_desc *eng_desc, ad5766_core **ad_core, ad5766_core_init_param init_param)
ad5766_core_setup
Definition: ad5766_core.c:169
uint32_t dma_source_addr
Definition: ad5766_core.h:56
Header file of SPI Interface.
Structure representing an SPI engine device.
Definition: spi_engine.h:107
Definition: ad5766_core.h:53
int32_t ad5758_dac_input_write(struct ad5758_dev *dev, uint16_t code)
Definition: ad5758.c:493
const struct no_os_gpio_platform_ops xil_gpio_ops
Xilinx platform specific GPIO platform ops structure.
Definition: xilinx_gpio.c:456
const struct no_os_spi_init_param spi_ip
Definition: ad5758_sdz.c:63
#define SPI_ENGINE_CONFIG_CPHA
Definition: spi_engine_private.h:90
uint32_t spi_clk_hz
Definition: ad5766_core.h:50
int32_t number
Definition: no_os_gpio.h:89
int32_t ad5766_core_setup(struct spi_engine_desc *eng_desc, ad5766_core **ad_core, ad5766_core_init_param init_param)
ad5766_core_setup
Definition: ad5766_core.c:169
void ad5766_core_read(ad5766_core *core, uint32_t reg_addr, uint32_t *reg_data)
ad5766_core_read
Definition: ad5766_core.c:137
@ RANGE_0V_10V
Definition: ad5758.h:338
#define SPI_ENGINE_REG_OFFLOAD_CMD_MEM(x)
Definition: spi_engine_private.h:108
uint32_t rate_hz
Definition: ad5766_core.h:57
uint32_t device_id
Definition: no_os_spi.h:133
Header file for ad5758 Driver.
uint32_t core_baseaddr
Definition: ad7616.h:230
#define SPI_ENGINE_CMD_TRANSFER(readwrite, n)
Definition: spi_engine_private.h:115
@ DPC_VOLTAGE_MODE
Definition: ad5758.h:274
uint32_t dma_source_addr
Definition: ad5766_core.h:48
Header file of AD5766 Core Driver.
uint32_t rate_hz
Definition: ad5766_core.h:49
void ad5766_dma_read(ad5766_core *core, uint32_t reg_addr, uint32_t *reg_data)
ad5766_core_read
Definition: ad5766_core.c:159
#define SPI_ENGINE_REG_OFFLOAD_CTRL(x)
Definition: spi_engine_private.h:105
#define SPI_ENGINE_REG_OFFLOAD_RESET(x)
Definition: spi_engine_private.h:107
#define SPI_ENGINE_CMD_CONFIG(reg, val)
Definition: spi_engine_private.h:123
@ CLKOUT_DISABLE
Definition: ad5758.h:293
const struct xil_gpio_init_param gpio_extra
Definition: ad5758_sdz.c:73
int32_t ad5758_init(struct ad5758_dev **device, struct ad5758_init_param *init_param)
Definition: ad5758.c:773
enum xil_spi_type type
Definition: xilinx_spi.h:80
@ CLKOUT_FREQ_500_KHZ
Definition: ad5758.h:302
#define SPI_ENGINE_CMD_SYNC(id)
Definition: spi_engine_private.h:132
Structure holding the initialization parameters for Xilinx platform specific SPI parameters when usin...
Definition: xilinx_spi.h:78
uint32_t core_baseaddr
Definition: ad5766_core.h:54
struct no_os_spi_init_param spi_init
Definition: ad5758.h:395
void * no_os_malloc(size_t size)
Allocate memory and return a pointer to it.
Definition: chibios_alloc.c:49
int32_t ad5766_core_write(ad5766_core *core, uint32_t reg_addr, uint32_t reg_data)
ad5766_core_write
Definition: ad5766_core.c:125
#define NO_OS_BIT(x)
Definition: no_os_util.h:51
void no_os_free(void *ptr)
Deallocate memory previously allocated by a call to no_os_calloc or no_os_malloc.
Definition: chibios_alloc.c:75
Definition: ad5766_core.h:45
@ NO_OS_SPI_BIT_ORDER_MSB_FIRST
Definition: no_os_spi.h:82
@ ILIMIT_200_mA
Definition: ad5758.h:329
int32_t ad5766_dma_write(ad5766_core *core, uint32_t reg_addr, uint32_t reg_data)
ad5766_core_write
Definition: ad5766_core.c:147
#define SPI_ENGINE_CMD_REG_CONFIG
Definition: spi_engine_private.h:78
const uint16_t sine_lut[512]
Definition: ad5766_core.c:55
uint32_t dma_baseaddr
Definition: ad5766_core.h:55
int main()
Definition: ad5758_sdz.c:104
#define NULL
Definition: wrapper.h:64
const struct no_os_spi_platform_ops xil_spi_ops
Spi engine platform specific SPI platform ops structure.
Definition: xilinx_spi.c:459
struct ad7616_init_param init_param
Definition: ad7616_sdz.c:119
uint32_t spi_clk_hz
Definition: ad5766_core.h:58
#define GPIO_DEVICE_ID
Definition: parameters.h:89
Structure holding the initialization parameters for Xilinx platform specific GPIO parameters.
Definition: xilinx_gpio.h:70
Header file of GPIO Interface.
@ SR_CLOCK_240_KHZ
Definition: ad5758.h:309
const struct no_os_gpio_init_param ldac_ip
Definition: ad5758_sdz.c:82
const struct no_os_gpio_init_param reset_ip
Definition: ad5758_sdz.c:77
#define SPI_ENGINE_CMD_REG_CLK_DIV
Definition: spi_engine_private.h:77
uint32_t core_baseaddr
Definition: ad5766_core.h:46
enum xil_gpio_type type
Definition: xilinx_gpio.h:72
int32_t spi_engine_write(struct spi_engine_desc *desc, uint32_t reg_addr, uint32_t reg_data)
Write SPI Engine's axi registers.
Definition: spi_engine.c:94
#define GPIO_DAC_LDAC_N
Definition: parameters.h:53
#define GPIO_DAC_RESET_N
Definition: parameters.h:52
Structure holding the parameters for SPI initialization.
Definition: no_os_spi.h:131