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spi_engine_desc Struct Reference

Structure representing an SPI engine device. More...

#include <spi_engine.h>

Collaboration diagram for spi_engine_desc:
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Public Attributes

uint32_t ref_clk_hz
 
enum xil_spi_type type
 
struct axi_dmacoffload_tx_dma
 
struct axi_dmacoffload_rx_dma
 
enum cyclic_transfer cyclic
 
uint8_t offload_config
 
uint8_t offload_tx_len
 
uint8_t offload_rx_len
 
uint32_t spi_engine_baseaddr
 
uint32_t rx_dma_baseaddr
 
uint32_t tx_dma_baseaddr
 
uint8_t cs_delay
 
uint32_t clk_div
 
uint8_t data_width
 
uint8_t max_data_width
 
uint8_t sdo_idle_state
 

Detailed Description

Structure representing an SPI engine device.

Member Data Documentation

◆ clk_div

uint32_t spi_engine_desc::clk_div

Clock divider used in transmission delays

◆ cs_delay

uint8_t spi_engine_desc::cs_delay

Delay between the CS toggle and the start of SCLK

◆ cyclic

enum cyclic_transfer spi_engine_desc::cyclic

Transfer mode for Tx DMAC

◆ data_width

uint8_t spi_engine_desc::data_width

Data with of one SPI transfer ( in bits )

◆ max_data_width

uint8_t spi_engine_desc::max_data_width

The maximum data width supported by the engine

◆ offload_config

uint8_t spi_engine_desc::offload_config

Offload's module transfer direction : TX, RX or both

◆ offload_rx_dma

struct axi_dmac* spi_engine_desc::offload_rx_dma

Pointer to a DMAC used in reception

◆ offload_rx_len

uint8_t spi_engine_desc::offload_rx_len

Number of words that the module has to receive

◆ offload_tx_dma

struct axi_dmac* spi_engine_desc::offload_tx_dma

Pointer to a DMAC used in transmission

◆ offload_tx_len

uint8_t spi_engine_desc::offload_tx_len

Number of words that the module has to send

◆ ref_clk_hz

uint32_t spi_engine_desc::ref_clk_hz

SPI engine reference clock

◆ rx_dma_baseaddr

uint32_t spi_engine_desc::rx_dma_baseaddr

Base address where the RX DMAC core is situated

◆ sdo_idle_state

uint8_t spi_engine_desc::sdo_idle_state

output of SDO when CS is inactive or read-only transfers

◆ spi_engine_baseaddr

uint32_t spi_engine_desc::spi_engine_baseaddr

Base address where the HDL core is situated

◆ tx_dma_baseaddr

uint32_t spi_engine_desc::tx_dma_baseaddr

Base address where the TX DMAC core is situated

◆ type

enum xil_spi_type spi_engine_desc::type

Type of implementation


The documentation for this struct was generated from the following file: