no-OS
Classes | Macros | Enumerations | Functions
ad7768.h File Reference

Header file of AD7768 Driver. More...

#include <stdint.h>
#include "no_os_gpio.h"
#include "no_os_spi.h"
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Classes

struct  ad7768_freq_config
 
struct  ad7768_avail_freq
 
struct  ad7768_dev
 
struct  ad7768_init_param
 

Macros

#define AD7768_REG_CH_STANDBY   0x00
 
#define AD7768_REG_CH_MODE_A   0x01
 
#define AD7768_REG_CH_MODE_B   0x02
 
#define AD7768_REG_CH_MODE_SEL   0x03
 
#define AD7768_REG_PWR_MODE   0x04
 
#define AD7768_REG_GENERAL_CFG   0x05
 
#define AD7768_REG_DATA_CTRL   0x06
 
#define AD7768_REG_INTERFACE_CFG   0x07
 
#define AD7768_REG_BIST_CTRL   0x08
 
#define AD7768_REG_DEV_STATUS   0x09
 
#define AD7768_REG_REV_ID   0x0A
 
#define AD7768_REG_DEV_ID_MSB   0x0B
 
#define AD7768_REG_DEV_ID_LSB   0x0C
 
#define AD7768_REG_SW_REV_ID   0x0D
 
#define AD7768_REG_GPIO_CTRL   0x0E
 
#define AD7768_REG_GPIO_WR_DATA   0x0F
 
#define AD7768_REG_GPIO_RD_DATA   0x10
 
#define AD7768_REG_PRECHARGE_BUF_1   0x11
 
#define AD7768_REG_PRECHARGE_BUF_2   0x12
 
#define AD7768_REG_POS_REF_BUF   0x13
 
#define AD7768_REG_NEG_REF_BUF   0x14
 
#define AD7768_REG_CH_OFFSET_1(ch)   (0x1E + (ch) * 3)
 
#define AD7768_REG_CH_OFFSET_2(ch)   (0x1F + (ch) * 3)
 
#define AD7768_REG_CH_OFFSET_3(ch)   (0x20 + (ch) * 3)
 
#define AD7768_REG_CH_GAIN_1(ch)   (0x36 + (ch) * 3)
 
#define AD7768_REG_CH_GAIN_2(ch)   (0x37 + (ch) * 3)
 
#define AD7768_REG_CH_GAIN_3(ch)   (0x38 + (ch) * 3)
 
#define AD7768_REG_CH_SYNC_OFFSET(ch)   (0x4E + (ch) * 3)
 
#define AD7768_REG_DIAG_METER_RX   0x56
 
#define AD7768_REG_DIAG_CTRL   0x57
 
#define AD7768_REG_DIAG_MOD_DELAY_CTRL   0x58
 
#define AD7768_REG_DIAG_CHOP_CTRL   0x59
 
#define AD7768_CH_STANDBY(x)   (1 << (x))
 
#define AD7768_CH_MODE_FILTER_TYPE   (1 << 3)
 
#define AD7768_CH_MODE_DEC_RATE_MSK   NO_OS_GENMASK(2, 0)
 
#define AD7768_CH_MODE_DEC_RATE(x)   (((x) & 0x7) << 0)
 
#define AD7768_CH_MODE(x)   (1 << (x))
 
#define AD7768_PWR_MODE_POWER_MODE_MSK   NO_OS_GENMASK(5, 4)
 
#define AD7768_PWR_MODE_SLEEP_MODE   (1 << 7)
 
#define AD7768_PWR_MODE_POWER_MODE(x)   (((x) & 0x3) << 4)
 
#define AD7768_PWR_MODE_LVDS_ENABLE   (1 << 3)
 
#define AD7768_PWR_MODE_MCLK_DIV_MSK   NO_OS_GENMASK(1, 0)
 
#define AD7768_PWR_MODE_MCLK_DIV(x)   (((x) & 0x3) << 0)
 
#define ad7768_map_power_mode_to_regval(x)   ((x) ? ((x) + 1) : 0)
 
#define AD7768_DATA_CTRL_SPI_SYNC   (1 << 7)
 
#define AD7768_DATA_CTRL_SINGLE_SHOT_EN   (1 << 4)
 
#define AD7768_DATA_CTRL_SPI_RESET(x)   (((x) & 0x3) << 0)
 
#define AD7768_DATA_CONTROL_SPI_SYNC_MSK   NO_OS_BIT(7)
 
#define AD7768_DATA_CONTROL_SPI_SYNC   NO_OS_BIT(7)
 
#define AD7768_DATA_CONTROL_SPI_SYNC_CLEAR   0
 
#define AD7768_INTERFACE_CFG_CRC_SEL(x)   (((x) & 0x3) << 2)
 
#define AD7768_INTERFACE_CFG_DCLK_DIV(x)   (((x) & 0x3) << 0)
 
#define AD7768_INTERFACE_CFG_DCLK_DIV_MSK   NO_OS_GENMASK(1, 0)
 
#define AD7768_INTERFACE_CFG_DCLK_DIV_MODE(x)   (4 - no_os_find_first_set_bit(x))
 
#define AD7768_MAX_DCLK_DIV   8
 
#define AD7768_RESOLUTION   24
 
#define AD7768_SAMPLE_SIZE   32
 
#define AD7768_MAX_FREQ_PER_MODE   6
 
#define AD7768_NUM_CHANNELS   8
 

Enumerations

enum  ad7768_sleep_mode {
  AD7768_ACTIVE,
  AD7768_SLEEP
}
 
enum  ad7768_power_mode {
  AD7768_ECO = 0,
  AD7768_MEDIAN = 2,
  AD7768_FAST = 3
}
 
enum  ad7768_power_modes_raw {
  AD7768_LOW_POWER_MODE,
  AD7768_MEDIAN_MODE,
  AD7768_FAST_MODE,
  AD7768_NUM_POWER_MODES
}
 
enum  ad7768_mclk_div {
  AD7768_MCLK_DIV_32 = 0,
  AD7768_MCLK_DIV_8 = 2,
  AD7768_MCLK_DIV_4 = 3
}
 
enum  ad7768_dclk_div {
  AD7768_DCLK_DIV_8,
  AD7768_DCLK_DIV_4,
  AD7768_DCLK_DIV_2,
  AD7768_DCLK_DIV_1
}
 
enum  ad7768_pin_spi_ctrl {
  AD7768_PIN_CTRL,
  AD7768_SPI_CTRL
}
 
enum  ad7768_conv_op {
  AD7768_STANDARD_CONV,
  AD7768_ONE_SHOT_CONV
}
 
enum  ad7768_crc_sel {
  AD7768_NO_CRC,
  AD7768_CRC_4,
  AD7768_CRC_16,
  AD7768_CRC_16_2ND
}
 
enum  ad7768_ch {
  AD7768_CH0,
  AD7768_CH1,
  AD7768_CH2,
  AD7768_CH3,
  AD7768_CH4,
  AD7768_CH5,
  AD7768_CH6,
  AD7768_CH7,
  AD7768_CH_NO
}
 
enum  ad7768_ch_state {
  AD7768_ENABLED,
  AD7768_STANDBY
}
 
enum  ad7768_ch_mode {
  AD7768_MODE_A,
  AD7768_MODE_B
}
 
enum  ad7768_filt_type {
  AD7768_FILTER_WIDEBAND,
  AD7768_FILTER_SINC
}
 
enum  ad7768_dec_rate {
  AD7768_DEC_X32,
  AD7768_DEC_X64,
  AD7768_DEC_X128,
  AD7768_DEC_X256,
  AD7768_DEC_X512,
  AD7768_DEC_X1024,
  AD7768_DEC_X1024_2ND,
  AD7768_DEC_X1024_3RD
}
 

Functions

int32_t ad7768_spi_read (ad7768_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
 
int32_t ad7768_spi_write (ad7768_dev *dev, uint8_t reg_addr, uint8_t reg_data)
 
int32_t ad7768_spi_read_mask (ad7768_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t *data)
 
int32_t ad7768_spi_write_mask (ad7768_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
 
int32_t ad7768_set_sleep_mode (ad7768_dev *dev, ad7768_sleep_mode mode)
 
int32_t ad7768_get_sleep_mode (ad7768_dev *dev, ad7768_sleep_mode *mode)
 
int32_t ad7768_set_power_mode (ad7768_dev *dev, ad7768_power_mode mode)
 
int32_t ad7768_get_power_mode (ad7768_dev *dev, ad7768_power_mode *mode)
 
int32_t ad7768_set_mclk_div (ad7768_dev *dev, ad7768_mclk_div clk_div)
 
int32_t ad7768_get_mclk_div (ad7768_dev *dev, ad7768_mclk_div *clk_div)
 
int32_t ad7768_set_dclk_div (ad7768_dev *dev, ad7768_dclk_div clk_div)
 
int32_t ad7768_get_dclk_div (ad7768_dev *dev, ad7768_dclk_div *clk_div)
 
int32_t ad7768_set_conv_op (ad7768_dev *dev, ad7768_conv_op conv_op)
 
int32_t ad7768_get_conv_op (ad7768_dev *dev, ad7768_conv_op *conv_op)
 
int32_t ad7768_set_crc_sel (ad7768_dev *dev, ad7768_crc_sel crc_sel)
 
int32_t ad7768_get_crc_sel (ad7768_dev *dev, ad7768_crc_sel *crc_sel)
 
int32_t ad7768_set_ch_state (ad7768_dev *dev, ad7768_ch ch, ad7768_ch_state state)
 
int32_t ad7768_get_ch_state (ad7768_dev *dev, ad7768_ch ch, ad7768_ch_state *state)
 
int32_t ad7768_set_mode_config (ad7768_dev *dev, ad7768_ch_mode mode, ad7768_filt_type filt_type, ad7768_dec_rate dec_rate)
 
int32_t ad7768_get_mode_config (ad7768_dev *dev, ad7768_ch_mode mode, ad7768_filt_type *filt_type, ad7768_dec_rate *dec_rate)
 
int32_t ad7768_set_ch_mode (ad7768_dev *dev, ad7768_ch ch, ad7768_ch_mode mode)
 
int32_t ad7768_get_ch_mode (ad7768_dev *dev, ad7768_ch ch, ad7768_ch_mode *mode)
 
int32_t ad7768_setup (ad7768_dev **device, ad7768_init_param init_param)
 
int ad7768_remove (ad7768_dev *dev)
 
int32_t ad7768_setup_begin (ad7768_dev **device, ad7768_init_param init_param)
 
int32_t ad7768_setup_finish (ad7768_dev *dev, ad7768_init_param init_param)
 
void ad7768_set_available_sampl_freq (ad7768_dev *dev)
 
int ad7768_set_power_mode_and_sampling_freq (ad7768_dev *dev, enum ad7768_power_modes_raw mode)
 

Detailed Description

Header file of AD7768 Driver.

Author
DBogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Copyright 2016(c) Analog Devices, Inc.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD7768_CH_MODE

#define AD7768_CH_MODE (   x)    (1 << (x))

◆ AD7768_CH_MODE_DEC_RATE

#define AD7768_CH_MODE_DEC_RATE (   x)    (((x) & 0x7) << 0)

◆ AD7768_CH_MODE_DEC_RATE_MSK

#define AD7768_CH_MODE_DEC_RATE_MSK   NO_OS_GENMASK(2, 0)

◆ AD7768_CH_MODE_FILTER_TYPE

#define AD7768_CH_MODE_FILTER_TYPE   (1 << 3)

◆ AD7768_CH_STANDBY

#define AD7768_CH_STANDBY (   x)    (1 << (x))

◆ AD7768_DATA_CONTROL_SPI_SYNC

#define AD7768_DATA_CONTROL_SPI_SYNC   NO_OS_BIT(7)

◆ AD7768_DATA_CONTROL_SPI_SYNC_CLEAR

#define AD7768_DATA_CONTROL_SPI_SYNC_CLEAR   0

◆ AD7768_DATA_CONTROL_SPI_SYNC_MSK

#define AD7768_DATA_CONTROL_SPI_SYNC_MSK   NO_OS_BIT(7)

◆ AD7768_DATA_CTRL_SINGLE_SHOT_EN

#define AD7768_DATA_CTRL_SINGLE_SHOT_EN   (1 << 4)

◆ AD7768_DATA_CTRL_SPI_RESET

#define AD7768_DATA_CTRL_SPI_RESET (   x)    (((x) & 0x3) << 0)

◆ AD7768_DATA_CTRL_SPI_SYNC

#define AD7768_DATA_CTRL_SPI_SYNC   (1 << 7)

◆ AD7768_INTERFACE_CFG_CRC_SEL

#define AD7768_INTERFACE_CFG_CRC_SEL (   x)    (((x) & 0x3) << 2)

◆ AD7768_INTERFACE_CFG_DCLK_DIV

#define AD7768_INTERFACE_CFG_DCLK_DIV (   x)    (((x) & 0x3) << 0)

◆ AD7768_INTERFACE_CFG_DCLK_DIV_MODE

#define AD7768_INTERFACE_CFG_DCLK_DIV_MODE (   x)    (4 - no_os_find_first_set_bit(x))

◆ AD7768_INTERFACE_CFG_DCLK_DIV_MSK

#define AD7768_INTERFACE_CFG_DCLK_DIV_MSK   NO_OS_GENMASK(1, 0)

◆ ad7768_map_power_mode_to_regval

#define ad7768_map_power_mode_to_regval (   x)    ((x) ? ((x) + 1) : 0)

◆ AD7768_MAX_DCLK_DIV

#define AD7768_MAX_DCLK_DIV   8

◆ AD7768_MAX_FREQ_PER_MODE

#define AD7768_MAX_FREQ_PER_MODE   6

◆ AD7768_NUM_CHANNELS

#define AD7768_NUM_CHANNELS   8

◆ AD7768_PWR_MODE_LVDS_ENABLE

#define AD7768_PWR_MODE_LVDS_ENABLE   (1 << 3)

◆ AD7768_PWR_MODE_MCLK_DIV

#define AD7768_PWR_MODE_MCLK_DIV (   x)    (((x) & 0x3) << 0)

◆ AD7768_PWR_MODE_MCLK_DIV_MSK

#define AD7768_PWR_MODE_MCLK_DIV_MSK   NO_OS_GENMASK(1, 0)

◆ AD7768_PWR_MODE_POWER_MODE

#define AD7768_PWR_MODE_POWER_MODE (   x)    (((x) & 0x3) << 4)

◆ AD7768_PWR_MODE_POWER_MODE_MSK

#define AD7768_PWR_MODE_POWER_MODE_MSK   NO_OS_GENMASK(5, 4)

◆ AD7768_PWR_MODE_SLEEP_MODE

#define AD7768_PWR_MODE_SLEEP_MODE   (1 << 7)

◆ AD7768_REG_BIST_CTRL

#define AD7768_REG_BIST_CTRL   0x08

◆ AD7768_REG_CH_GAIN_1

#define AD7768_REG_CH_GAIN_1 (   ch)    (0x36 + (ch) * 3)

◆ AD7768_REG_CH_GAIN_2

#define AD7768_REG_CH_GAIN_2 (   ch)    (0x37 + (ch) * 3)

◆ AD7768_REG_CH_GAIN_3

#define AD7768_REG_CH_GAIN_3 (   ch)    (0x38 + (ch) * 3)

◆ AD7768_REG_CH_MODE_A

#define AD7768_REG_CH_MODE_A   0x01

◆ AD7768_REG_CH_MODE_B

#define AD7768_REG_CH_MODE_B   0x02

◆ AD7768_REG_CH_MODE_SEL

#define AD7768_REG_CH_MODE_SEL   0x03

◆ AD7768_REG_CH_OFFSET_1

#define AD7768_REG_CH_OFFSET_1 (   ch)    (0x1E + (ch) * 3)

◆ AD7768_REG_CH_OFFSET_2

#define AD7768_REG_CH_OFFSET_2 (   ch)    (0x1F + (ch) * 3)

◆ AD7768_REG_CH_OFFSET_3

#define AD7768_REG_CH_OFFSET_3 (   ch)    (0x20 + (ch) * 3)

◆ AD7768_REG_CH_STANDBY

#define AD7768_REG_CH_STANDBY   0x00

◆ AD7768_REG_CH_SYNC_OFFSET

#define AD7768_REG_CH_SYNC_OFFSET (   ch)    (0x4E + (ch) * 3)

◆ AD7768_REG_DATA_CTRL

#define AD7768_REG_DATA_CTRL   0x06

◆ AD7768_REG_DEV_ID_LSB

#define AD7768_REG_DEV_ID_LSB   0x0C

◆ AD7768_REG_DEV_ID_MSB

#define AD7768_REG_DEV_ID_MSB   0x0B

◆ AD7768_REG_DEV_STATUS

#define AD7768_REG_DEV_STATUS   0x09

◆ AD7768_REG_DIAG_CHOP_CTRL

#define AD7768_REG_DIAG_CHOP_CTRL   0x59

◆ AD7768_REG_DIAG_CTRL

#define AD7768_REG_DIAG_CTRL   0x57

◆ AD7768_REG_DIAG_METER_RX

#define AD7768_REG_DIAG_METER_RX   0x56

◆ AD7768_REG_DIAG_MOD_DELAY_CTRL

#define AD7768_REG_DIAG_MOD_DELAY_CTRL   0x58

◆ AD7768_REG_GENERAL_CFG

#define AD7768_REG_GENERAL_CFG   0x05

◆ AD7768_REG_GPIO_CTRL

#define AD7768_REG_GPIO_CTRL   0x0E

◆ AD7768_REG_GPIO_RD_DATA

#define AD7768_REG_GPIO_RD_DATA   0x10

◆ AD7768_REG_GPIO_WR_DATA

#define AD7768_REG_GPIO_WR_DATA   0x0F

◆ AD7768_REG_INTERFACE_CFG

#define AD7768_REG_INTERFACE_CFG   0x07

◆ AD7768_REG_NEG_REF_BUF

#define AD7768_REG_NEG_REF_BUF   0x14

◆ AD7768_REG_POS_REF_BUF

#define AD7768_REG_POS_REF_BUF   0x13

◆ AD7768_REG_PRECHARGE_BUF_1

#define AD7768_REG_PRECHARGE_BUF_1   0x11

◆ AD7768_REG_PRECHARGE_BUF_2

#define AD7768_REG_PRECHARGE_BUF_2   0x12

◆ AD7768_REG_PWR_MODE

#define AD7768_REG_PWR_MODE   0x04

◆ AD7768_REG_REV_ID

#define AD7768_REG_REV_ID   0x0A

◆ AD7768_REG_SW_REV_ID

#define AD7768_REG_SW_REV_ID   0x0D

◆ AD7768_RESOLUTION

#define AD7768_RESOLUTION   24

◆ AD7768_SAMPLE_SIZE

#define AD7768_SAMPLE_SIZE   32

Enumeration Type Documentation

◆ ad7768_ch

enum ad7768_ch
Enumerator
AD7768_CH0 
AD7768_CH1 
AD7768_CH2 
AD7768_CH3 
AD7768_CH4 
AD7768_CH5 
AD7768_CH6 
AD7768_CH7 
AD7768_CH_NO 

◆ ad7768_ch_mode

enum ad7768_ch_mode
Enumerator
AD7768_MODE_A 
AD7768_MODE_B 

◆ ad7768_ch_state

enum ad7768_ch_state
Enumerator
AD7768_ENABLED 
AD7768_STANDBY 

◆ ad7768_conv_op

enum ad7768_conv_op
Enumerator
AD7768_STANDARD_CONV 
AD7768_ONE_SHOT_CONV 

◆ ad7768_crc_sel

enum ad7768_crc_sel
Enumerator
AD7768_NO_CRC 
AD7768_CRC_4 
AD7768_CRC_16 
AD7768_CRC_16_2ND 

◆ ad7768_dclk_div

enum ad7768_dclk_div
Enumerator
AD7768_DCLK_DIV_8 
AD7768_DCLK_DIV_4 
AD7768_DCLK_DIV_2 
AD7768_DCLK_DIV_1 

◆ ad7768_dec_rate

enum ad7768_dec_rate
Enumerator
AD7768_DEC_X32 
AD7768_DEC_X64 
AD7768_DEC_X128 
AD7768_DEC_X256 
AD7768_DEC_X512 
AD7768_DEC_X1024 
AD7768_DEC_X1024_2ND 
AD7768_DEC_X1024_3RD 

◆ ad7768_filt_type

enum ad7768_filt_type
Enumerator
AD7768_FILTER_WIDEBAND 
AD7768_FILTER_SINC 

◆ ad7768_mclk_div

enum ad7768_mclk_div
Enumerator
AD7768_MCLK_DIV_32 
AD7768_MCLK_DIV_8 
AD7768_MCLK_DIV_4 

◆ ad7768_pin_spi_ctrl

enum ad7768_pin_spi_ctrl
Enumerator
AD7768_PIN_CTRL 
AD7768_SPI_CTRL 

◆ ad7768_power_mode

enum ad7768_power_mode
Enumerator
AD7768_ECO 
AD7768_MEDIAN 
AD7768_FAST 

◆ ad7768_power_modes_raw

enum ad7768_power_modes_raw
Enumerator
AD7768_LOW_POWER_MODE 
AD7768_MEDIAN_MODE 
AD7768_FAST_MODE 
AD7768_NUM_POWER_MODES 

◆ ad7768_sleep_mode

enum ad7768_sleep_mode
Enumerator
AD7768_ACTIVE 
AD7768_SLEEP 

Function Documentation

◆ ad7768_get_ch_mode()

int32_t ad7768_get_ch_mode ( ad7768_dev *  dev,
ad7768_ch  ch,
ad7768_ch_mode *  mode 
)

Get the channel mode.

Parameters
dev- The device structure.
ch- The channel number. Accepted values: AD7768_CH0 AD7768_CH1 AD7768_CH2 AD7768_CH3 AD7768_CH4 AD7768_CH5 AD7768_CH6 AD7768_CH7
mode- The channel mode.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_get_ch_state()

int32_t ad7768_get_ch_state ( ad7768_dev *  dev,
ad7768_ch  ch,
ad7768_ch_state *  state 
)

Get the channel state.

Parameters
dev- The device structure.
ch- The channel number. Accepted values: AD7768_CH0 AD7768_CH1 AD7768_CH2 AD7768_CH3 AD7768_CH4 AD7768_CH5 AD7768_CH6 AD7768_CH7
state- The channel state.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_get_conv_op()

int32_t ad7768_get_conv_op ( ad7768_dev *  dev,
ad7768_conv_op *  conv_op 
)

Get the conversion operation mode.

Parameters
dev- The device structure.
conv_op- The conversion operation mode.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_get_crc_sel()

int32_t ad7768_get_crc_sel ( ad7768_dev *  dev,
ad7768_crc_sel *  crc_sel 
)

Get the CRC selection.

Parameters
dev- The device structure.
crc_sel- The CRC selection.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_get_dclk_div()

int32_t ad7768_get_dclk_div ( ad7768_dev *  dev,
ad7768_dclk_div *  clk_div 
)

Get the DCLK divider.

Parameters
dev- The device structure.
clk_div- The DCLK divider.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_get_mclk_div()

int32_t ad7768_get_mclk_div ( ad7768_dev *  dev,
ad7768_mclk_div *  clk_div 
)

Get the MCLK divider.

Parameters
dev- The device structure.
clk_div- The MCLK divider.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_get_mode_config()

int32_t ad7768_get_mode_config ( ad7768_dev *  dev,
ad7768_ch_mode  mode,
ad7768_filt_type *  filt_type,
ad7768_dec_rate *  dec_rate 
)

Get the mode configuration.

Parameters
dev- The device structure.
mode- The channel mode.
filt_type- The filter type.
dec_rate- The decimation rate.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_get_power_mode()

int32_t ad7768_get_power_mode ( ad7768_dev *  dev,
ad7768_power_mode *  mode 
)

Get the device power mode.

Parameters
dev- The device structure.
mode- The device power mode.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_get_sleep_mode()

int32_t ad7768_get_sleep_mode ( ad7768_dev *  dev,
ad7768_sleep_mode *  mode 
)

Get the device sleep mode.

Parameters
dev- The device structure.
mode- The device sleep mode.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_remove()

int ad7768_remove ( ad7768_dev *  dev)

Free the resources allocated by ad7768_setup().

Parameters
dev- The device structure.
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_set_available_sampl_freq()

void ad7768_set_available_sampl_freq ( ad7768_dev *  dev)

Set available sampling frequency.

Parameters
dev- The device structure.
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_set_ch_mode()

int32_t ad7768_set_ch_mode ( ad7768_dev *  dev,
ad7768_ch  ch,
ad7768_ch_mode  mode 
)

Set the channel mode.

Parameters
dev- The device structure.
ch- The channel number. Accepted values: AD7768_CH0 AD7768_CH1 AD7768_CH2 AD7768_CH3 AD7768_CH4 AD7768_CH5 AD7768_CH6 AD7768_CH7
mode- The channel mode. Accepted values: AD7768_MODE_A AD7768_MODE_B
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_set_ch_state()

int32_t ad7768_set_ch_state ( ad7768_dev *  dev,
ad7768_ch  ch,
ad7768_ch_state  state 
)

Set the channel state.

Parameters
dev- The device structure.
ch- The channel number. Accepted values: AD7768_CH0 AD7768_CH1 AD7768_CH2 AD7768_CH3 AD7768_CH4 AD7768_CH5 AD7768_CH6 AD7768_CH7
state- The channel state. Accepted values: AD7768_ENABLED AD7768_STANDBY
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_set_conv_op()

int32_t ad7768_set_conv_op ( ad7768_dev *  dev,
ad7768_conv_op  conv_op 
)

Set the conversion operation mode.

Parameters
dev- The device structure.
conv_op- The conversion operation mode. Accepted values: AD7768_STANDARD_CONV AD7768_ONE_SHOT_CONV
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_set_crc_sel()

int32_t ad7768_set_crc_sel ( ad7768_dev *  dev,
ad7768_crc_sel  crc_sel 
)

Set the CRC selection.

Parameters
dev- The device structure.
crc_sel- The CRC selection. Accepted values: AD7768_NO_CRC AD7768_CRC_4 AD7768_CRC_16
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_set_dclk_div()

int32_t ad7768_set_dclk_div ( ad7768_dev *  dev,
ad7768_dclk_div  clk_div 
)

Set the DCLK divider.

Parameters
dev- The device structure.
clk_div- The DCLK divider. Accepted values: AD7768_DCLK_DIV_1 AD7768_DCLK_DIV_2 AD7768_DCLK_DIV_4 AD7768_DCLK_DIV_8
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_set_mclk_div()

int32_t ad7768_set_mclk_div ( ad7768_dev *  dev,
ad7768_mclk_div  clk_div 
)

Set the MCLK divider.

Parameters
dev- The device structure.
clk_div- The MCLK divider. Accepted values: AD7768_MCLK_DIV_32 AD7768_MCLK_DIV_8 AD7768_MCLK_DIV_4
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_set_mode_config()

int32_t ad7768_set_mode_config ( ad7768_dev *  dev,
ad7768_ch_mode  mode,
ad7768_filt_type  filt_type,
ad7768_dec_rate  dec_rate 
)

Set the mode configuration.

Parameters
dev- The device structure.
mode- The channel mode. Accepted values: AD7768_MODE_A AD7768_MODE_B
filt_type- The filter type. Accepted values: AD7768_FILTER_WIDEBAND AD7768_FILTER_SINC,
dec_rate- The decimation rate. Accepted values: AD7768_DEC_X32 AD7768_DEC_X64 AD7768_DEC_X128 AD7768_DEC_X256 AD7768_DEC_X512 AD7768_DEC_X1024
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_set_power_mode()

int32_t ad7768_set_power_mode ( ad7768_dev *  dev,
ad7768_power_mode  mode 
)

Set the device power mode.

Parameters
dev- The device structure.
mode- The device power mode. Accepted values: AD7768_ECO AD7768_MEDIAN AD7768_FAST
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_set_power_mode_and_sampling_freq()

int ad7768_set_power_mode_and_sampling_freq ( ad7768_dev *  dev,
enum ad7768_power_modes_raw  mode 
)

Set power mode and sampling frequency.

Parameters
dev- The device structure.
mode- The required power mode (raw value).
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_set_sleep_mode()

int32_t ad7768_set_sleep_mode ( ad7768_dev *  dev,
ad7768_sleep_mode  mode 
)

Set the device sleep mode.

Parameters
dev- The device structure.
mode- The device sleep mode. Accepted values: AD7768_ACTIVE AD7768_SLEEP
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_setup()

int32_t ad7768_setup ( ad7768_dev **  device,
ad7768_init_param  init_param 
)

Initialize the device.

Parameters
device- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_setup_begin()

int32_t ad7768_setup_begin ( ad7768_dev **  device,
ad7768_init_param  init_param 
)

Begin initializing the device.

Parameters
device- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_setup_finish()

int32_t ad7768_setup_finish ( ad7768_dev *  dev,
ad7768_init_param  init_param 
)

Finish initializing the device.

Parameters
dev- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_spi_read()

int32_t ad7768_spi_read ( ad7768_dev *  dev,
uint8_t  reg_addr,
uint8_t *  reg_data 
)

SPI read from device.

Parameters
dev- The device structure.
reg_addr- The register address.
reg_data- The register data.
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_spi_read_mask()

int32_t ad7768_spi_read_mask ( ad7768_dev *  dev,
uint8_t  reg_addr,
uint8_t  mask,
uint8_t *  data 
)

SPI read from device using a mask.

Parameters
dev- The device structure.
reg_addr- The register address.
mask- The mask.
data- The register data.
Returns
0 in case of success, negative error code otherwise.

◆ ad7768_spi_write()

int32_t ad7768_spi_write ( ad7768_dev *  dev,
uint8_t  reg_addr,
uint8_t  reg_data 
)

SPI write to device.

Parameters
dev- The device structure.
reg_addr- The register address.
reg_data- The register data.
Returns
0 in case of success, negative error code otherwise.
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◆ ad7768_spi_write_mask()

int32_t ad7768_spi_write_mask ( ad7768_dev *  dev,
uint8_t  reg_addr,
uint8_t  mask,
uint8_t  data 
)

SPI write to device using a mask.

Parameters
dev- The device structure.
reg_addr- The register address.
mask- The mask.
data- The register data.
Returns
0 in case of success, negative error code otherwise.
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