Header file of AD9081 Driver. More...

#include <stdbool.h>
#include <stdint.h>
#include "no_os_clk.h"
#include "no_os_spi.h"
#include "no_os_gpio.h"
#include "adi_ad9081.h"
#include "jesd204.h"

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Classes
struct	ad9081_jesd_link

struct	dac_settings_cache

struct	ad9081_phy

struct	link_init_param

struct	ad9081_init_param

Macros
#define	MAX_NUM_MAIN_DATAPATHS 4

#define	MAX_NUM_CHANNELIZER 8

#define	AD9081_PERI_SEL_GPIO6 2

#define	AD9081_PERI_SEL_GPIO7 3

#define	AD9081_PERI_SEL_GPIO8 4

#define	AD9081_PERI_SEL_GPIO9 5

#define	AD9081_PERI_SEL_GPIO10 6

#define	AD9081_PERI_SEL_SYNCINB1_P 7

#define	AD9081_PERI_SEL_SYNCINB1_N 8

#define	AD9081_FFH_CHAN_SEL_REG_MODE 0 /* 0: Register Map control (Use ddc_nco_regmap_chan_sel) */

#define	AD9081_FFH_CHAN_SEL_1GPIO_MODE 1 /* 1: profile_pins[0] is used. Pin level control {3'b0, profile_pins[0]} */

#define	AD9081_FFH_CHAN_SEL_2GPIO_MODE 2 /* 2: profile_pins[1 :0] are used. Pin level control {2'b0, profile_pins[1:0]} */

#define	AD9081_FFH_CHAN_SEL_3GPIO_MODE 3 /* 3: profile_pins[2 :0] are used. Pin level control {1'b0, profile_pins[2:0]} */

#define	AD9081_FFH_CHAN_SEL_4GPIO_MODE 4 /* 4: profile_pins[3 :0] are used. Pin level control { profile_pins[3:0]} */

#define	AD9081_FFH_CHAN_SEL_GPIO0_EDGE_MODE 8 /* 8: profile_pins[0] Pin edge control- increment internal counter when rising edge of profile_pins[0] Pin. */

#define	AD9081_FFH_CHAN_SEL_GPIO1_EDGE_MODE 9 /* 9: profile_pins[1] Pin edge control- increment internal counter when rising edge of profile_pins[1] Pin. */

#define	AD9081_FFH_CHAN_SEL_GPIO2_EDGE_MODE 10 /* 10: profile_pins[2] Pin edge control- increment internal counter when rising edge of profile_pins[2] Pin. */

#define	AD9081_FFH_CHAN_SEL_GPIO3_EDGE_MODE 11 /* 11: profile_pins[3] Pin edge control- increment internal counter when rising edge of profile_pins[3] Pin. */

#define	AD9081_FFH_CHAN_SEL_FHT_EXP_MODE 12 /* 12: FHT expire based control - increment internal counter when FHT is expired. */

#define	DEFRAMER_LINK0_TX 0

#define	DEFRAMER_LINK1_TX 1

#define	FRAMER_LINK0_RX 2

#define	FRAMER_LINK1_RX 3

Functions
int32_t	ad9081_init (struct ad9081_phy *device, const struct ad9081_init_param init_param)

int32_t	ad9081_remove (struct ad9081_phy *device)

void	ad9081_work_func (struct ad9081_phy *phy)

Detailed Description

Header file of AD9081 Driver.

Author: DBogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ AD9081_FFH_CHAN_SEL_1GPIO_MODE

#define AD9081_FFH_CHAN_SEL_1GPIO_MODE 1 /* 1: profile_pins[0] is used. Pin level control {3'b0, profile_pins[0]} */

◆ AD9081_FFH_CHAN_SEL_2GPIO_MODE

#define AD9081_FFH_CHAN_SEL_2GPIO_MODE 2 /* 2: profile_pins[1 :0] are used. Pin level control {2'b0, profile_pins[1:0]} */

◆ AD9081_FFH_CHAN_SEL_3GPIO_MODE

#define AD9081_FFH_CHAN_SEL_3GPIO_MODE 3 /* 3: profile_pins[2 :0] are used. Pin level control {1'b0, profile_pins[2:0]} */

◆ AD9081_FFH_CHAN_SEL_4GPIO_MODE

#define AD9081_FFH_CHAN_SEL_4GPIO_MODE 4 /* 4: profile_pins[3 :0] are used. Pin level control { profile_pins[3:0]} */

◆ AD9081_FFH_CHAN_SEL_FHT_EXP_MODE

#define AD9081_FFH_CHAN_SEL_FHT_EXP_MODE 12 /* 12: FHT expire based control - increment internal counter when FHT is expired. */

◆ AD9081_FFH_CHAN_SEL_GPIO0_EDGE_MODE

#define AD9081_FFH_CHAN_SEL_GPIO0_EDGE_MODE 8 /* 8: profile_pins[0] Pin edge control- increment internal counter when rising edge of profile_pins[0] Pin. */

◆ AD9081_FFH_CHAN_SEL_GPIO1_EDGE_MODE

#define AD9081_FFH_CHAN_SEL_GPIO1_EDGE_MODE 9 /* 9: profile_pins[1] Pin edge control- increment internal counter when rising edge of profile_pins[1] Pin. */

◆ AD9081_FFH_CHAN_SEL_GPIO2_EDGE_MODE

#define AD9081_FFH_CHAN_SEL_GPIO2_EDGE_MODE 10 /* 10: profile_pins[2] Pin edge control- increment internal counter when rising edge of profile_pins[2] Pin. */

◆ AD9081_FFH_CHAN_SEL_GPIO3_EDGE_MODE

#define AD9081_FFH_CHAN_SEL_GPIO3_EDGE_MODE 11 /* 11: profile_pins[3] Pin edge control- increment internal counter when rising edge of profile_pins[3] Pin. */

◆ AD9081_FFH_CHAN_SEL_REG_MODE

#define AD9081_FFH_CHAN_SEL_REG_MODE 0 /* 0: Register Map control (Use ddc_nco_regmap_chan_sel) */

◆ AD9081_PERI_SEL_GPIO10

#define AD9081_PERI_SEL_GPIO10 6

◆ AD9081_PERI_SEL_GPIO6

#define AD9081_PERI_SEL_GPIO6 2

◆ AD9081_PERI_SEL_GPIO7

#define AD9081_PERI_SEL_GPIO7 3

◆ AD9081_PERI_SEL_GPIO8

#define AD9081_PERI_SEL_GPIO8 4

◆ AD9081_PERI_SEL_GPIO9

#define AD9081_PERI_SEL_GPIO9 5

◆ AD9081_PERI_SEL_SYNCINB1_N

#define AD9081_PERI_SEL_SYNCINB1_N 8

◆ AD9081_PERI_SEL_SYNCINB1_P

#define AD9081_PERI_SEL_SYNCINB1_P 7

◆ DEFRAMER_LINK0_TX

#define DEFRAMER_LINK0_TX 0

◆ DEFRAMER_LINK1_TX

#define DEFRAMER_LINK1_TX 1

◆ FRAMER_LINK0_RX

#define FRAMER_LINK0_RX 2

◆ FRAMER_LINK1_RX

#define FRAMER_LINK1_RX 3

◆ MAX_NUM_CHANNELIZER

#define MAX_NUM_CHANNELIZER 8

◆ MAX_NUM_MAIN_DATAPATHS

#define MAX_NUM_MAIN_DATAPATHS 4

Function Documentation

◆ ad9081_init()

int32_t ad9081_init	(	struct ad9081_phy **	dev,
		const struct ad9081_init_param *	init_param
	)

Initialize the device.

Parameters

dev	- The device structure.
init_param	- The structure that contains the device initial parameters.

Returns: 0 in case of success, negative error code otherwise.

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◆ ad9081_remove()

int32_t ad9081_remove ( struct ad9081_phy * dev )

Remove the device - release resources.