Contains AD917x APIs for DAC configuration and control. More...
Macros | |
#define | HW_RESET_PERIOD_US 10 |
#define | SPI_RESET_PERIOD_US 50 |
#define | NVRAM_RESET_PERIOD_US 1000 |
#define | DAC_9171_CLK_FREQ_MHZ_MAX 6000 |
#define | DAC_CLK_FREQ_MHZ_MAX 12000 |
#define | DAC_CLK_FREQ_MHZ_MIN 2900 |
#define | REF_CLK_FREQ_MHZ_MIN 30 |
#define | REF_CLK_FREQ_MHZ_MAX 2000 |
#define | PFD_CLK_FREQ_MHZ_MIN 25 |
#define | PFD_CLK_FREQ_MHZ_MAX 770 |
#define | DLL_CLK_FREQ_THRES_HZ 4500000000ull |
#define | DAC_9171_CLK_FREQ_MAX_HZ 6000000000ull |
#define | DAC_CLK_FREQ_MAX_HZ 12000000000ull |
#define | DAC_CLK_FREQ_MIN_HZ 2900000000ull |
Functions | |
int32_t | ad917x_init (ad917x_handle_t *h) |
Initialize AD917X Device This API must be called first before any other API calls. It performs internal API initialization of the memory and API states. If AD917X handle member hw_open is not NULL it shall call the function to which it points. This feature may be used to get and initialize the hardware resources required by the API and the AD917X devices. For example GPIO, SPI etc. | |
int32_t | ad917x_deinit (ad917x_handle_t *h) |
De-initialize the AD917X Device. | |
int32_t | ad917x_get_chip_id (ad917x_handle_t *h, adi_chip_id_t *chip_id) |
Get Chip Identification Data. | |
int32_t | ad917x_reset (ad917x_handle_t *h, uint8_t hw_reset) |
Reset the AD917X. | |
int32_t | ad917x_get_revision (ad917x_handle_t *h, uint8_t *rev_major, uint8_t *rev_minor, uint8_t *rev_rc) |
Get API Revision Data. | |
int32_t | ad917x_set_dac_pll_config (ad917x_handle_t *h, uint8_t dac_pll_en, uint8_t m_div, uint8_t n_div, uint8_t vco_div) |
Configure the On Chip DAC PLL. | |
int32_t | ad917x_set_dac_clk_freq (ad917x_handle_t *h, uint64_t dac_clk_freq_hz) |
Set the DAC CLK Frequency. | |
int32_t | ad917x_get_dac_clk_freq (ad917x_handle_t *h, uint64_t *dac_clk_freq_hz) |
Get the DAC CLK Frequency. | |
int32_t | ad917x_get_dac_clk_status (ad917x_handle_t *h, uint8_t *pll_lock_stat, uint8_t *dll_lock_stat) |
Get DAC CLK Status. | |
int32_t | ad917x_set_clkout_config (ad917x_handle_t *h, uint8_t l_div) |
Set CLKOUT configuration. | |
int32_t | ad917x_set_dac_clk (ad917x_handle_t *h, uint64_t dac_clk_freq_hz, uint8_t dac_pll_en, uint64_t ref_clk_freq_hz) |
Configure the DAC Clock Input path based on a the desired dac clock frequency, the applied reference clock and the onchip PLL. | |
int32_t | ad917x_set_page_idx (ad917x_handle_t *h, const uint32_t dac, const uint32_t channel) |
Select Page. | |
int32_t | ad917x_get_page_idx (ad917x_handle_t *h, int32_t *dac, int32_t *channel) |
Get select page index. | |
Contains AD917x APIs for DAC configuration and control.
release 1.1.x
Copyright(c) 2017 Analog Devices, Inc. All Rights Reserved. This software is proprietary to Analog Devices, Inc. and its licensors. By using this software you agree to the terms of the associated Analog Devices Software License Agreement.
#define DAC_9171_CLK_FREQ_MAX_HZ 6000000000ull |
#define DAC_9171_CLK_FREQ_MHZ_MAX 6000 |
#define DAC_CLK_FREQ_MAX_HZ 12000000000ull |
#define DAC_CLK_FREQ_MHZ_MAX 12000 |
#define DAC_CLK_FREQ_MHZ_MIN 2900 |
#define DAC_CLK_FREQ_MIN_HZ 2900000000ull |
#define DLL_CLK_FREQ_THRES_HZ 4500000000ull |
#define HW_RESET_PERIOD_US 10 |
#define NVRAM_RESET_PERIOD_US 1000 |
#define PFD_CLK_FREQ_MHZ_MAX 770 |
#define PFD_CLK_FREQ_MHZ_MIN 25 |
#define REF_CLK_FREQ_MHZ_MAX 2000 |
#define REF_CLK_FREQ_MHZ_MIN 30 |
#define SPI_RESET_PERIOD_US 50 |