no-OS
parameters.h
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1 /***************************************************************************/
33 #ifndef __PARAMETERS_H__
34 #define __PARAMETERS_H__
35 
36 /******************************************************************************/
37 /***************************** Include Files **********************************/
38 /******************************************************************************/
39 #include <xparameters.h>
40 
41 #define SPI_HMC7044_CS 0x00
42 
43 #define SPI_0_DEVICE_ID XPAR_SPI_0_DEVICE_ID
44 #define SPI_AD9208_0_CS 0x01
45 #define RX_0_JESD_BASEADDR XPAR_AXI_AD9208_0_JESD_RX_AXI_BASEADDR
46 #define RX_0_XCVR_BASEADDR XPAR_AXI_AD9208_0_XCVR_BASEADDR
47 #define RX_0_CORE_BASEADDR XPAR_RX_AD9208_0_TPL_CORE_ADC_TPL_CORE_BASEADDR
48 
49 #define SPI_DEVICE_ID XPAR_AXI_SPI_DEVICE_ID
50 #define SPI_AD9208_CS 0x02
51 
52 #define GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID
53 
54 #define RX_1_JESD_BASEADDR XPAR_AXI_AD9208_1_JESD_RX_AXI_BASEADDR
55 #define RX_1_XCVR_BASEADDR XPAR_AXI_AD9208_1_XCVR_BASEADDR
56 #define RX_1_CORE_BASEADDR XPAR_RX_AD9208_1_TPL_CORE_ADC_TPL_CORE_BASEADDR
57 
58 #define RX_DMA_BASEADDR XPAR_AXI_AD9208_DMA_BASEADDR
59 #define ADC_DDR_BASEADDR (XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR + 0x800000)
60 #define ADC_DDR_HIGHADDR XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR
61 
62 /* iio_app parameters */
63 #define UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID
64 #define UART_BAUDRATE 115200
65 #define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR
66 #define INTC_DEVICE_ID XPAR_INTC_SINGLE_DEVICE_ID
67 
68 #endif /* __PARAMETERS_H__ */