Parameters Definitions. More...

#include <xparameters.h>

Include dependency graph for parameters.h:

Macros
#define	SPI_HMC7044_CS 0x00

#define	SPI_0_DEVICE_ID XPAR_SPI_0_DEVICE_ID

#define	SPI_AD9208_0_CS 0x01

#define	RX_0_JESD_BASEADDR XPAR_AXI_AD9208_0_JESD_RX_AXI_BASEADDR

#define	RX_0_XCVR_BASEADDR XPAR_AXI_AD9208_0_XCVR_BASEADDR

#define	RX_0_CORE_BASEADDR XPAR_RX_AD9208_0_TPL_CORE_ADC_TPL_CORE_BASEADDR

#define	SPI_DEVICE_ID XPAR_AXI_SPI_DEVICE_ID

#define	SPI_AD9208_CS 0x02

#define	GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID

#define	RX_1_JESD_BASEADDR XPAR_AXI_AD9208_1_JESD_RX_AXI_BASEADDR

#define	RX_1_XCVR_BASEADDR XPAR_AXI_AD9208_1_XCVR_BASEADDR

#define	RX_1_CORE_BASEADDR XPAR_RX_AD9208_1_TPL_CORE_ADC_TPL_CORE_BASEADDR

#define	RX_DMA_BASEADDR XPAR_AXI_AD9208_DMA_BASEADDR

#define	ADC_DDR_BASEADDR (XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR + 0x800000)

#define	ADC_DDR_HIGHADDR XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR

#define	UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID

#define	UART_BAUDRATE 115200

#define	UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR

Detailed Description

Parameters Definitions.

Author: Stefan Popa (stefa.nosp@m.n.po.nosp@m.pa@an.nosp@m.alog.nosp@m..com)

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

◆ ADC_DDR_BASEADDR

#define ADC_DDR_BASEADDR (XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR + 0x800000)

◆ ADC_DDR_HIGHADDR

#define ADC_DDR_HIGHADDR XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR

◆ GPIO_DEVICE_ID

#define GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID

◆ RX_0_CORE_BASEADDR

#define RX_0_CORE_BASEADDR XPAR_RX_AD9208_0_TPL_CORE_ADC_TPL_CORE_BASEADDR

◆ RX_0_JESD_BASEADDR

#define RX_0_JESD_BASEADDR XPAR_AXI_AD9208_0_JESD_RX_AXI_BASEADDR

◆ RX_0_XCVR_BASEADDR

#define RX_0_XCVR_BASEADDR XPAR_AXI_AD9208_0_XCVR_BASEADDR

◆ RX_1_CORE_BASEADDR

#define RX_1_CORE_BASEADDR XPAR_RX_AD9208_1_TPL_CORE_ADC_TPL_CORE_BASEADDR

◆ RX_1_JESD_BASEADDR

#define RX_1_JESD_BASEADDR XPAR_AXI_AD9208_1_JESD_RX_AXI_BASEADDR

◆ RX_1_XCVR_BASEADDR

#define RX_1_XCVR_BASEADDR XPAR_AXI_AD9208_1_XCVR_BASEADDR

◆ RX_DMA_BASEADDR

#define RX_DMA_BASEADDR XPAR_AXI_AD9208_DMA_BASEADDR

◆ SPI_0_DEVICE_ID

#define SPI_0_DEVICE_ID XPAR_SPI_0_DEVICE_ID

◆ SPI_AD9208_0_CS

#define SPI_AD9208_0_CS 0x01

◆ SPI_AD9208_CS

#define SPI_AD9208_CS 0x02

◆ SPI_DEVICE_ID

#define SPI_DEVICE_ID XPAR_AXI_SPI_DEVICE_ID

◆ SPI_HMC7044_CS

#define SPI_HMC7044_CS 0x00

◆ UART_BAUDRATE

#define UART_BAUDRATE 115200

◆ UART_DEVICE_ID

#define UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID

◆ UART_IRQ_ID

#define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR

Macros