Parameters Definitions. More...

#include <xparameters.h>

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Macros
#define	SPI_HMC7044_CS 0x00

#define	SPI_0_DEVICE_ID XPAR_SPI_0_DEVICE_ID

#define	SPI_AD9208_0_CS 0x01

#define	RX_0_JESD_BASEADDR XPAR_AXI_AD9208_0_JESD_RX_AXI_BASEADDR

#define	RX_0_XCVR_BASEADDR XPAR_AXI_AD9208_0_XCVR_BASEADDR

#define	RX_0_CORE_BASEADDR XPAR_RX_AD9208_0_TPL_CORE_ADC_TPL_CORE_BASEADDR

#define	SPI_DEVICE_ID XPAR_AXI_SPI_DEVICE_ID

#define	SPI_AD9208_CS 0x02

#define	GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID

#define	RX_1_JESD_BASEADDR XPAR_AXI_AD9208_1_JESD_RX_AXI_BASEADDR

#define	RX_1_XCVR_BASEADDR XPAR_AXI_AD9208_1_XCVR_BASEADDR

#define	RX_1_CORE_BASEADDR XPAR_RX_AD9208_1_TPL_CORE_ADC_TPL_CORE_BASEADDR

#define	RX_DMA_BASEADDR XPAR_AXI_AD9208_DMA_BASEADDR

#define	ADC_DDR_BASEADDR (XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR + 0x800000)

#define	ADC_DDR_HIGHADDR XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR

#define	UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID

#define	UART_BAUDRATE 115200

#define	UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR

#define	INTC_DEVICE_ID XPAR_INTC_SINGLE_DEVICE_ID

Detailed Description

Parameters Definitions.

Author: Stefan Popa (stefa.nosp@m.n.po.nosp@m.pa@an.nosp@m.alog.nosp@m..com)

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ ADC_DDR_BASEADDR

#define ADC_DDR_BASEADDR (XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR + 0x800000)

◆ ADC_DDR_HIGHADDR

#define ADC_DDR_HIGHADDR XPAR_AXI_DDR_CNTRL_C0_DDR4_MEMORY_MAP_BASEADDR

◆ GPIO_DEVICE_ID

#define GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID

◆ INTC_DEVICE_ID

#define INTC_DEVICE_ID XPAR_INTC_SINGLE_DEVICE_ID

◆ RX_0_CORE_BASEADDR

#define RX_0_CORE_BASEADDR XPAR_RX_AD9208_0_TPL_CORE_ADC_TPL_CORE_BASEADDR

◆ RX_0_JESD_BASEADDR

#define RX_0_JESD_BASEADDR XPAR_AXI_AD9208_0_JESD_RX_AXI_BASEADDR

◆ RX_0_XCVR_BASEADDR

#define RX_0_XCVR_BASEADDR XPAR_AXI_AD9208_0_XCVR_BASEADDR

◆ RX_1_CORE_BASEADDR

#define RX_1_CORE_BASEADDR XPAR_RX_AD9208_1_TPL_CORE_ADC_TPL_CORE_BASEADDR

◆ RX_1_JESD_BASEADDR

#define RX_1_JESD_BASEADDR XPAR_AXI_AD9208_1_JESD_RX_AXI_BASEADDR

◆ RX_1_XCVR_BASEADDR

#define RX_1_XCVR_BASEADDR XPAR_AXI_AD9208_1_XCVR_BASEADDR

◆ RX_DMA_BASEADDR

#define RX_DMA_BASEADDR XPAR_AXI_AD9208_DMA_BASEADDR

◆ SPI_0_DEVICE_ID

#define SPI_0_DEVICE_ID XPAR_SPI_0_DEVICE_ID

◆ SPI_AD9208_0_CS

#define SPI_AD9208_0_CS 0x01

◆ SPI_AD9208_CS

#define SPI_AD9208_CS 0x02

◆ SPI_DEVICE_ID

#define SPI_DEVICE_ID XPAR_AXI_SPI_DEVICE_ID

◆ SPI_HMC7044_CS

#define SPI_HMC7044_CS 0x00

◆ UART_BAUDRATE

#define UART_BAUDRATE 115200

◆ UART_DEVICE_ID

#define UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID

◆ UART_IRQ_ID

#define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR

Macros