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no-OS
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Header file of ADAR3000/ADAR3001 Driver. More...
#include <stdbool.h>#include <stdint.h>#include "no_os_gpio.h"#include "no_os_spi.h"#include "no_os_util.h"Classes | |
| struct | adar300x_chip_info |
| Per part constants. More... | |
| struct | adar300x_dev |
| ADAR300X device descriptor. One instance is one physical chip, and several chips may share one SPI descriptor, see spi_desc_shared. More... | |
| struct | adar300x_init_param |
| ADAR300X initialization parameters. More... | |
Enumerations | |
| enum | adar300x_type { ADAR3000 , ADAR3001 } |
| Supported devices. More... | |
| enum | adar300x_beam_mode { ADAR300X_BEAM_MODE_DIRECT = 0 , ADAR300X_BEAM_MODE_MEMORY = 1 , ADAR300X_BEAM_MODE_FIFO = 2 , ADAR300X_BEAM_MODE_INST_DIRECT = 3 } |
| Source a beam takes its next beamstate from on an update. More... | |
| enum | adar300x_beamstate { ADAR300X_BEAMSTATE_DIRECT , ADAR300X_BEAMSTATE_RESET , ADAR300X_BEAMSTATE_MUTE } |
| Which of the three beamstate register banks to address. More... | |
| enum | adar300x_beam_amp_state { ADAR300X_BEAM_AMP_RESET = 0 , ADAR300X_BEAM_AMP_OPERATIONAL = 1 , ADAR300X_BEAM_AMP_MUTE = 2 , ADAR300X_BEAM_AMP_SLEEP = 3 } |
| Beam amplifier states, in register order from 0x0C0. More... | |
| enum | adar300x_element_amp_state { ADAR300X_ELEMENT_AMP_OPERATIONAL = 0 , ADAR300X_ELEMENT_AMP_SLEEP = 1 } |
| Element amplifier states, in register order from 0x0D0. The element bank has no reset state and orders the rest differently to the beam bank, so the two enumerations are deliberately not interchangeable. More... | |
| enum | adar300x_beam_command { ADAR300X_BEAM_CMD_UPDATE , ADAR300X_BEAM_CMD_RESET , ADAR300X_BEAM_CMD_MUTE } |
| Command applied to a beam when its update is strobed. More... | |
| enum | adar300x_element_param { ADAR300X_DELAY , ADAR300X_ATTENUATION } |
| The two values held per element. More... | |
Functions | |
| int | adar300x_reg_write (struct adar300x_dev *dev, uint16_t reg_addr, uint8_t data) |
| Writes data to ADAR300X over SPI. | |
| int | adar300x_reg_read (struct adar300x_dev *dev, uint16_t reg_addr, uint8_t *data) |
| Reads data from ADAR300X over SPI. | |
| int | adar300x_reg_update (struct adar300x_dev *dev, uint16_t reg_addr, uint8_t mask, uint8_t data) |
| Updates the value of an ADAR300X register. | |
| int | adar300x_set_page (struct adar300x_dev *dev, uint8_t page) |
| Selects the address page used by the beamstate RAM windows. | |
| int | adar300x_page_reg_write (struct adar300x_dev *dev, uint8_t page, uint16_t reg_addr, uint8_t data) |
| Writes a register on a given address page. | |
| int | adar300x_page_reg_read (struct adar300x_dev *dev, uint8_t page, uint16_t reg_addr, uint8_t *data) |
| Reads a register from a given address page. | |
| int | adar300x_set_element (struct adar300x_dev *dev, enum adar300x_beamstate beamstate, uint8_t beam, uint8_t element, enum adar300x_element_param param, uint8_t val) |
| Writes one element value in one of the beamstate banks. | |
| int | adar300x_get_element (struct adar300x_dev *dev, enum adar300x_beamstate beamstate, uint8_t beam, uint8_t element, enum adar300x_element_param param, uint8_t *val) |
| Reads one element value back from one of the beamstate banks. | |
| int | adar300x_set_beam_amp (struct adar300x_dev *dev, enum adar300x_beam_amp_state state, uint8_t beam, uint8_t bias, bool enable) |
| Sets the bias and enable of one beam amplifier in one state. | |
| int | adar300x_get_beam_amp (struct adar300x_dev *dev, enum adar300x_beam_amp_state state, uint8_t beam, uint8_t *bias, bool *enable) |
| Reads back the bias and enable of one beam amplifier. | |
| int | adar300x_set_element_amp (struct adar300x_dev *dev, enum adar300x_element_amp_state state, uint8_t element, uint8_t bias, bool enable) |
| Sets the bias and enable of one element amplifier in one state. | |
| int | adar300x_get_element_amp (struct adar300x_dev *dev, enum adar300x_element_amp_state state, uint8_t element, uint8_t *bias, bool *enable) |
| Reads back the bias and enable of one element amplifier. | |
| int | adar300x_set_beam_mode (struct adar300x_dev *dev, uint8_t beam, enum adar300x_beam_mode mode) |
| Selects where a beam takes its next beamstate from. | |
| int | adar300x_get_beam_mode (struct adar300x_dev *dev, uint8_t beam, enum adar300x_beam_mode *mode) |
| Reads back the mode of a beam. | |
| int | adar300x_beam_command (struct adar300x_dev *dev, uint8_t beam_mask, enum adar300x_beam_command cmd) |
| Applies a command to every beam set in the mask. | |
| int | adar300x_set_update_source_spi (struct adar300x_dev *dev, bool spi) |
| Chooses whether update, mute and reset come from the pins or SPI. | |
| int | adar300x_get_update_source_spi (struct adar300x_dev *dev, bool *spi) |
| Reads back the update source selection. | |
| int | adar300x_soft_reset (struct adar300x_dev *dev) |
| Issues the soft reset sequence. | |
| int | adar300x_hard_reset (struct adar300x_dev *dev) |
| Pulses the RSTB pin. | |
| int | adar300x_set_ram_beamstate (struct adar300x_dev *dev, uint8_t beam, uint8_t state, const uint8_t *values) |
| Writes one beamstate into a beam's RAM page. | |
| int | adar300x_get_ram_beamstate (struct adar300x_dev *dev, uint8_t beam, uint8_t state, uint8_t *values) |
| Reads one beamstate back from a beam's RAM page. | |
| int | adar300x_set_seq_range (struct adar300x_dev *dev, uint8_t beam, uint8_t start, uint8_t stop) |
| Sets the range of pointers a beam's RAM sequencer steps through. | |
| int | adar300x_get_seq_range (struct adar300x_dev *dev, uint8_t beam, uint8_t *start, uint8_t *stop) |
| Reads the range of pointers a beam's RAM sequencer steps through. | |
| int | adar300x_load_fifo_beamstate (struct adar300x_dev *dev, uint8_t beam, const uint8_t *values) |
| Queues one beamstate onto a beam's FIFO. | |
| int | adar300x_get_fifo_pointers (struct adar300x_dev *dev, uint8_t beam, uint8_t *write_ptr, uint8_t *read_ptr) |
| Reads a beam's FIFO write and read pointers. | |
| int | adar300x_get_temp (struct adar300x_dev *dev, uint8_t *code) |
| Reads the temperature sensor through the on-chip ADC. | |
| int | adar300x_init (struct adar300x_dev **dev, struct adar300x_init_param *init_param) |
| Initializes the ADAR300X. | |
| int | adar300x_remove (struct adar300x_dev *dev) |
| Frees the resources allocated by adar300x_init(). | |
Header file of ADAR3000/ADAR3001 Driver.
Copyright 2026(c) Analog Devices, Inc.
SPDX-License-Identifier: BSD-3-Clause
| #define ADAR300X_ADC_CLK_EN_MSK NO_OS_BIT(5) |
| #define ADAR300X_ADC_EN_MSK NO_OS_BIT(4) |
| #define ADAR300X_ADC_END_CONV_MSK NO_OS_BIT(4) |
| #define ADAR300X_ADC_MUX_SEL_MSK NO_OS_GENMASK(2, 0) |
| #define ADAR300X_ADC_MUX_TEMPERATURE 2 |
| #define ADAR300X_ADC_NUM_CLOCKS 7 |
| #define ADAR300X_ADC_RESET_MSK NO_OS_BIT(7) |
| #define ADAR300X_ADC_START_MSK NO_OS_BIT(0) |
| #define ADAR300X_ADDRESS_PAGE_MSK NO_OS_GENMASK(3, 0) |
| #define ADAR300X_AMP_BIAS_MAX 0x7 |
| #define ADAR300X_AMP_BIAS_MSK NO_OS_GENMASK(2, 0) |
| #define ADAR300X_AMP_EN_MSK NO_OS_BIT(3) |
| #define ADAR300X_BEAM_MODE_MSK | ( | beam | ) |
| #define ADAR300X_BEAM_MUTE_MSK | ( | beam | ) |
| #define ADAR300X_BEAM_RESET_MSK | ( | beam | ) |
| #define ADAR300X_BEAM_UPDATE_MSK | ( | beam | ) |
| #define ADAR300X_BUFF_SIZE_BYTES 3 |
| #define ADAR300X_CHIP_RESET_MSK NO_OS_GENMASK(2, 1) |
| #define ADAR300X_CHIP_RESET_VAL 0x1 |
| #define ADAR300X_CHIPTYPE_VAL 0x01 |
| #define ADAR300X_DEV_ADDR | ( | x | ) |
| #define ADAR300X_DEV_ADDR_MSK NO_OS_GENMASK(13, 10) |
| #define ADAR300X_ELEMENTS_PER_BEAM 4 |
| #define ADAR300X_FIFO_PTR_MSK NO_OS_GENMASK(5, 0) |
| #define ADAR300X_FIFO_STATES_PER_BEAM 16 |
| #define ADAR300X_PACKED_BEAMSTATE_LEN 6 |
| #define ADAR300X_PAGE_BEAM | ( | beam | ) |
| #define ADAR300X_PAGE_CONFIG 0x0 |
| #define ADAR300X_PAGE_FIFO 0x5 |
| #define ADAR300X_PAGE_INVALID 0xFF |
| #define ADAR300X_RAM_STATES_PER_BEAM 64 |
| #define ADAR300X_RAW_MAX 0x3F |
| #define ADAR300X_RAW_MSK NO_OS_GENMASK(5, 0) |
| #define ADAR300X_REG_ADC_CONTROL 0x020 |
| #define ADAR300X_REG_ADC_CONTROL2 0x021 |
| #define ADAR300X_REG_ADC_DATA_OUT 0x022 |
| #define ADAR300X_REG_ADDR_MSK NO_OS_GENMASK(9, 0) |
| #define ADAR300X_REG_ADDRESS_PAGE 0x008 |
| #define ADAR300X_REG_BEAM_AMP | ( | state, | |
| beam ) |
| #define ADAR300X_REG_BEAMSTATE_MODE 0x015 |
| #define ADAR300X_REG_BEAMWISE_UPDATE 0x033 |
| #define ADAR300X_REG_BEAMWISE_UPDATE_CODE 0x032 |
| #define ADAR300X_REG_CHIP_RESET 0x001 |
| #define ADAR300X_REG_CHIPTYPE 0x003 |
| #define ADAR300X_REG_DIRECT_CTRL | ( | x | ) |
| #define ADAR300X_REG_ELEMENT_AMP | ( | state, | |
| el ) |
| #define ADAR300X_REG_FIFO_LOAD | ( | beam | ) |
| #define ADAR300X_REG_FIFO_READ_PTR | ( | beam | ) |
| #define ADAR300X_REG_FIFO_WRITE_PTR | ( | beam | ) |
| #define ADAR300X_REG_MUTE_BEAMSTATE | ( | x | ) |
| #define ADAR300X_REG_PIN_OR_SPI_CTL 0x030 |
| #define ADAR300X_REG_PRODUCT_ID_H 0x005 |
| #define ADAR300X_REG_PRODUCT_ID_L 0x004 |
| #define ADAR300X_REG_RAM_BEAMSTATE | ( | state | ) |
| #define ADAR300X_REG_RESET_BEAMSTATE | ( | x | ) |
| #define ADAR300X_REG_SCRATCHPAD 0x00A |
| #define ADAR300X_REG_SEQ_START | ( | beam | ) |
| #define ADAR300X_REG_SEQ_STOP | ( | beam | ) |
| #define ADAR300X_REG_SPI_CONFIG 0x000 |
| #define ADAR300X_REG_SPI_REV 0x00B |
| #define ADAR300X_SCRATCHPAD_PATTERN_1 0xAD |
| #define ADAR300X_SCRATCHPAD_PATTERN_2 0xEA |
| #define ADAR300X_SEQ_PTR_MSK NO_OS_GENMASK(5, 0) |
| #define ADAR300X_SOFT_RESET_CMD 0xBD |
| #define ADAR300X_SOFT_RESET_COUNT 3 |
| #define ADAR300X_SPI_CONFIG_BIG_ENDIAN NO_OS_BIT(2) |
| #define ADAR300X_SPI_CONFIG_BIG_ENDIAN_ NO_OS_BIT(5) |
| #define ADAR300X_SPI_CONFIG_DEFAULT 0x3C |
| #define ADAR300X_SPI_CONFIG_RESET NO_OS_BIT(0) |
| #define ADAR300X_SPI_CONFIG_RESET_ NO_OS_BIT(7) |
| #define ADAR300X_SPI_CONFIG_SDOACTIVE NO_OS_BIT(3) |
| #define ADAR300X_SPI_CONFIG_SDOACTIVE_ NO_OS_BIT(4) |
| #define ADAR300X_SPI_DUMMY_DATA 0x00 |
| #define ADAR300X_SPI_READ_CMD NO_OS_BIT(15) |
| #define ADAR300X_TEMP_NOMINAL_CODE 127 |
| #define ADAR300X_TEMP_NOMINAL_MDEGC 25000 |
| #define ADAR300X_TEMP_SLOPE_DEN 109 |
| #define ADAR300X_TEMP_SLOPE_NUM 100000 |
| #define ADAR300X_UNPACKED_BEAMSTATE_LEN 8 |
| #define ADAR300X_UPDATE_SPI_CTL NO_OS_BIT(0) |
| #define ADAR300X_VALUES_PER_BEAM 8 |
Command applied to a beam when its update is strobed.
A beam in instantaneous direct mode ignores all three: updates have no effect because writes already apply immediately, and the data sheet states such a beam cannot enter its reset or mute beamstate.
| enum adar300x_beam_mode |
Source a beam takes its next beamstate from on an update.
| enum adar300x_beamstate |
Element amplifier states, in register order from 0x0D0. The element bank has no reset state and orders the rest differently to the beam bank, so the two enumerations are deliberately not interchangeable.
The register map also lists MUTE_EL0 to MUTE_EL3 at 0x0D8 to 0x0DB, but they are not implemented: on an ADAR3000 they power up as 0x00 rather than the documented 0x0B and discard writes. Hence no mute state here.
| Enumerator | |
|---|---|
| ADAR300X_ELEMENT_AMP_OPERATIONAL | |
| ADAR300X_ELEMENT_AMP_SLEEP | |
| enum adar300x_type |
| int adar300x_beam_command | ( | struct adar300x_dev * | dev, |
| uint8_t | beam_mask, | ||
| enum adar300x_beam_command | cmd ) |
Applies a command to every beam set in the mask.
Apply a command to every beam set in the mask.
Reset and mute are qualifiers rather than commands of their own: they are staged per beam and then take effect on the update strobe, mirroring how the RESET and MUTE pins qualify the UPDATE pin. Beams outside the mask have their qualifiers cleared so the staged state is always known.
Only has an effect when the update source is SPI rather than the pins, see adar300x_set_update_source_spi().
| dev | - The device structure. |
| beam_mask | - Bit per beam, bit 0 is beam 0. |
| cmd | - Command to apply to the masked beams. |
| int adar300x_get_beam_amp | ( | struct adar300x_dev * | dev, |
| enum adar300x_beam_amp_state | state, | ||
| uint8_t | beam, | ||
| uint8_t * | bias, | ||
| bool * | enable ) |
Reads back the bias and enable of one beam amplifier.
Read back the bias and enable of one beam amplifier.
| dev | - The device structure. |
| state | - Which beam amplifier state to read. |
| beam | - Beam index. |
| bias | - Bias setting read from the device, may be NULL. |
| enable | - Enable state read from the device, may be NULL. |
| int adar300x_get_beam_mode | ( | struct adar300x_dev * | dev, |
| uint8_t | beam, | ||
| enum adar300x_beam_mode * | mode ) |
Reads back the mode of a beam.
Read back the mode of a beam.
| dev | - The device structure. |
| beam | - Beam index. |
| mode | - Beamstate source read from the device. |
| int adar300x_get_element | ( | struct adar300x_dev * | dev, |
| enum adar300x_beamstate | beamstate, | ||
| uint8_t | beam, | ||
| uint8_t | element, | ||
| enum adar300x_element_param | param, | ||
| uint8_t * | val ) |
Reads one element value back from one of the beamstate banks.
Read one element value back from one of the beamstate banks.
| dev | - The device structure. |
| beamstate | - Which beamstate bank to read. |
| beam | - Beam index. |
| element | - Element index within the beam. |
| param | - Delay or attenuation. |
| val | - Value read from the device. |
| int adar300x_get_element_amp | ( | struct adar300x_dev * | dev, |
| enum adar300x_element_amp_state | state, | ||
| uint8_t | element, | ||
| uint8_t * | bias, | ||
| bool * | enable ) |
Reads back the bias and enable of one element amplifier.
Read back the bias and enable of one element amplifier.
| dev | - The device structure. |
| state | - Which element amplifier state to read. |
| element | - Element index. |
| bias | - Bias setting read from the device, may be NULL. |
| enable | - Enable state read from the device, may be NULL. |
| int adar300x_get_fifo_pointers | ( | struct adar300x_dev * | dev, |
| uint8_t | beam, | ||
| uint8_t * | write_ptr, | ||
| uint8_t * | read_ptr ) |
Reads a beam's FIFO write and read pointers.
Read a beam's FIFO write and read pointers.
| dev | - The device structure. |
| beam | - Beam index. |
| write_ptr | - Write pointer, may be NULL. |
| read_ptr | - Read pointer, may be NULL. |
| int adar300x_get_ram_beamstate | ( | struct adar300x_dev * | dev, |
| uint8_t | beam, | ||
| uint8_t | state, | ||
| uint8_t * | values ) |
Reads one beamstate back from a beam's RAM page.
Read one beamstate back from a beam's RAM page.
The data sheet gives the RAM its own readback protocol: a first read acts as a fetch that latches the whole 48-bit beamstate and returns invalid data, after which the six locations read back singly from that latched copy. One fetch covers the whole beamstate, so fetching per location is not needed.
| dev | - The device structure. |
| beam | - Beam index, selects the address page. |
| state | - Beamstate index within the beam. |
| values | - Eight 6-bit values, delay then attenuation per element. |
| int adar300x_get_seq_range | ( | struct adar300x_dev * | dev, |
| uint8_t | beam, | ||
| uint8_t * | start, | ||
| uint8_t * | stop ) |
Reads the range of pointers a beam's RAM sequencer steps through.
Read the range of pointers a beam's RAM sequencer steps through.
| dev | - The device structure. |
| beam | - Beam index. |
| start | - Start pointer, may be NULL. |
| stop | - Stop pointer, may be NULL. |
| int adar300x_get_temp | ( | struct adar300x_dev * | dev, |
| uint8_t * | code ) |
Reads the temperature sensor through the on-chip ADC.
Read the raw temperature sensor code.
The ADC requires a manual reset pulse before each conversion, and clocking is provided by dummy SPI transactions after the start bit is set. The conversion complete flag is polled before reading the result.
| dev | - The device structure. |
| code | - Raw conversion result, see ADAR300X_TEMP_* for the scale. |
| int adar300x_get_update_source_spi | ( | struct adar300x_dev * | dev, |
| bool * | spi ) |
Reads back the update source selection.
Read back the update source selection.
| dev | - The device structure. |
| spi | - True when the commands are driven over SPI. |
| int adar300x_hard_reset | ( | struct adar300x_dev * | dev | ) |
Pulses the RSTB pin.
Pulse the RSTB pin; fails with -ENODEV when no reset GPIO is wired.
| dev | - The device structure. |
| int adar300x_init | ( | struct adar300x_dev ** | dev, |
| struct adar300x_init_param * | init_param ) |
Initializes the ADAR300X.
Initialize the device.
| dev | - The device structure. |
| init_param | - The structure containing the device initial parameters. |
| int adar300x_load_fifo_beamstate | ( | struct adar300x_dev * | dev, |
| uint8_t | beam, | ||
| const uint8_t * | values ) |
Queues one beamstate onto a beam's FIFO.
Queue one beamstate onto a beam's FIFO.
The six bytes must be written in order: the write to the last address is what commits the beamstate and advances the write pointer. A load onto a full FIFO is discarded by the device.
| dev | - The device structure. |
| beam | - Beam index, selects the load address group. |
| values | - Eight 6-bit values, delay then attenuation per element. |
| int adar300x_page_reg_read | ( | struct adar300x_dev * | dev, |
| uint8_t | page, | ||
| uint16_t | reg_addr, | ||
| uint8_t * | data ) |
Reads a register from a given address page.
Read one register from a given address page.
| dev | - The device structure. |
| page | - The address page. |
| reg_addr | - The register address. |
| data | - Data read from the device. |
| int adar300x_page_reg_write | ( | struct adar300x_dev * | dev, |
| uint8_t | page, | ||
| uint16_t | reg_addr, | ||
| uint8_t | data ) |
Writes a register on a given address page.
Write one register on a given address page.
| dev | - The device structure. |
| page | - The address page. |
| reg_addr | - The register address. |
| data | - Data value to write. |
| int adar300x_reg_read | ( | struct adar300x_dev * | dev, |
| uint16_t | reg_addr, | ||
| uint8_t * | data ) |
Reads data from ADAR300X over SPI.
Read one register.
| dev | - The device structure. |
| reg_addr | - The register address. |
| data | - Data read from the device. |
| int adar300x_reg_update | ( | struct adar300x_dev * | dev, |
| uint16_t | reg_addr, | ||
| uint8_t | mask, | ||
| uint8_t | data ) |
Updates the value of an ADAR300X register.
Read modify write one register.
| dev | - The device structure. |
| reg_addr | - The register address. |
| mask | - Bits to be updated. |
| data | - Update value for the mask. |
| int adar300x_reg_write | ( | struct adar300x_dev * | dev, |
| uint16_t | reg_addr, | ||
| uint8_t | data ) |
Writes data to ADAR300X over SPI.
Write one register.
| dev | - The device structure. |
| reg_addr | - The register address. |
| data | - Data value to write. |
| int adar300x_remove | ( | struct adar300x_dev * | dev | ) |
Frees the resources allocated by adar300x_init().
Free resources allocated by adar300x_init().
| dev | - The device structure. |
| int adar300x_set_beam_amp | ( | struct adar300x_dev * | dev, |
| enum adar300x_beam_amp_state | state, | ||
| uint8_t | beam, | ||
| uint8_t | bias, | ||
| bool | enable ) |
Sets the bias and enable of one beam amplifier in one state.
Set the bias and enable of one beam amplifier in one state.
| dev | - The device structure. |
| state | - Which beam amplifier state to write. |
| beam | - Beam index. |
| bias | - Bias setting, 0 to ADAR300X_AMP_BIAS_MAX. |
| enable | - True to enable the amplifier in this state. |
| int adar300x_set_beam_mode | ( | struct adar300x_dev * | dev, |
| uint8_t | beam, | ||
| enum adar300x_beam_mode | mode ) |
Selects where a beam takes its next beamstate from.
Select where a beam takes its next beamstate from.
| dev | - The device structure. |
| beam | - Beam index. |
| mode | - Beamstate source. |
| int adar300x_set_element | ( | struct adar300x_dev * | dev, |
| enum adar300x_beamstate | beamstate, | ||
| uint8_t | beam, | ||
| uint8_t | element, | ||
| enum adar300x_element_param | param, | ||
| uint8_t | val ) |
Writes one element value in one of the beamstate banks.
Write one element value in one of the beamstate banks.
In direct mode the written value is applied on the next update; in instant direct mode it takes effect immediately.
| dev | - The device structure. |
| beamstate | - Which beamstate bank to write. |
| beam | - Beam index. |
| element | - Element index within the beam. |
| param | - Delay or attenuation. |
| val | - Value to write, 0 to ADAR300X_RAW_MAX. |
| int adar300x_set_element_amp | ( | struct adar300x_dev * | dev, |
| enum adar300x_element_amp_state | state, | ||
| uint8_t | element, | ||
| uint8_t | bias, | ||
| bool | enable ) |
Sets the bias and enable of one element amplifier in one state.
Set the bias and enable of one element amplifier in one state.
| dev | - The device structure. |
| state | - Which element amplifier state to write. |
| element | - Element index. |
| bias | - Bias setting, 0 to ADAR300X_AMP_BIAS_MAX. |
| enable | - True to enable the amplifier in this state. |
| int adar300x_set_page | ( | struct adar300x_dev * | dev, |
| uint8_t | page ) |
Selects the address page used by the beamstate RAM windows.
Select the address page, skipping the write when already selected.
| dev | - The device structure. |
| page | - The address page. |
| int adar300x_set_ram_beamstate | ( | struct adar300x_dev * | dev, |
| uint8_t | beam, | ||
| uint8_t | state, | ||
| const uint8_t * | values ) |
Writes one beamstate into a beam's RAM page.
Write one beamstate into a beam's RAM page.
| dev | - The device structure. |
| beam | - Beam index, selects the address page. |
| state | - Beamstate index within the beam. |
| values | - Eight 6-bit values, delay then attenuation per element. |
| int adar300x_set_seq_range | ( | struct adar300x_dev * | dev, |
| uint8_t | beam, | ||
| uint8_t | start, | ||
| uint8_t | stop ) |
Sets the range of pointers a beam's RAM sequencer steps through.
Set the range of pointers a beam's RAM sequencer steps through.
A stop pointer below the start pointer is valid: the sequencer then wraps from pointer 63 to pointer 0, skipping the middle of the range.
| dev | - The device structure. |
| beam | - Beam index. |
| start | - Pointer the sequencer starts from. |
| stop | - Last pointer before the sequencer wraps to start. |
| int adar300x_set_update_source_spi | ( | struct adar300x_dev * | dev, |
| bool | spi ) |
Chooses whether update, mute and reset come from the pins or SPI.
Choose whether update, mute and reset come from the pins or from SPI.
| dev | - The device structure. |
| spi | - True to drive the commands over SPI, false to use the pins. |
| int adar300x_soft_reset | ( | struct adar300x_dev * | dev | ) |
Issues the soft reset sequence.
Issue the SPI soft reset sequence.
Chip 0 uses the bus wide reset in ADAR300X_REG_SPI_CONFIG, which the datasheet documents for power up. Chips 1 to 15 ignore that register and must use the individual reset in ADAR300X_REG_CHIP_RESET instead, so the register is chosen from dev_addr. The bus wide reset also resets every other chip sharing the bus, which matters when bringing up several devices.
The reset is issued several times back to back, as the datasheet recommends when RSTB could not be held low across the supply ramp. The SPI_CONFIG readback is logged but not enforced; the scratchpad test in adar300x_init() is the authoritative check that the bus works.
| dev | - The device structure. |