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Classes | Macros | Enumerations | Functions
adf4377.h File Reference

Header file for adf4377 Driver. More...

#include <stdint.h>
#include <stdbool.h>
#include "no_os_spi.h"
#include "no_os_gpio.h"
#include "no_os_util.h"
Include dependency graph for adf4377.h:
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Go to the source code of this file.

Classes

struct  adf4377_init_param
 ADF4377 Initialization Parameters structure. More...
 
struct  adf4377_dev
 ADF4377 Device Descriptor. More...
 

Macros

#define ADF4377_REG(x)
 
#define ADF4377_SOFT_RESET_R_MSK   NO_OS_BIT(7)
 
#define ADF4377_SOFT_RESET_R(x)
 
#define ADF4377_SOFT_RESET_MSK   NO_OS_BIT(0)
 
#define ADF4377_SOFT_RESET(x)
 
#define ADF4377_LSB_FIRST_R_MSK   NO_OS_BIT(6)
 
#define ADF4377_LSB_FIRST_R(x)
 
#define ADF4377_LSB_FIRST_MSK   NO_OS_BIT(1)
 
#define ADF4377_LSB_FIRST(x)
 
#define ADF4377_ADDRESS_ASC_R_MSK   NO_OS_BIT(5)
 
#define ADF4377_ADDRESS_ASC_R(x)
 
#define ADF4377_ADDRESS_ASC_MSK   NO_OS_BIT(2)
 
#define ADF4377_ADDRESS_ASC(x)
 
#define ADF4377_SDO_ACTIVE_R_MSK   NO_OS_BIT(4)
 
#define ADF4377_SDO_ACTIVE_R(x)
 
#define ADF4377_SDO_ACTIVE_MSK   NO_OS_BIT(3)
 
#define ADF4377_SDO_ACTIVE(x)
 
#define ADF4377_RESET_CMD   0x81
 
#define ADF4377_SDO_ACTIVE_SPI_3W   0x0
 
#define ADF4377_SDO_ACTIVE_SPI_4W   0x1
 
#define ADF4377_ADDR_ASC_AUTO_DECR   0x0
 
#define ADF4377_ADDR_ASC_AUTO_INCR   0x1
 
#define ADF4377_LSB_FIRST_MSB   0x0
 
#define ADF4377_LSB_FIRST_LSB   0x1
 
#define ADF4377_SOFT_RESET_N_OP   0x0
 
#define ADF4377_SOFT_RESET_EN   0x1
 
#define ADF4377_SINGLE_INSTR_MSK   NO_OS_BIT(7)
 
#define ADF4377_SINGLE_INSTR(x)
 
#define ADF4377_MASTER_RB_CTRL_MSK   NO_OS_BIT(5)
 
#define ADF4377_MASTER_RB_CTRL(x)
 
#define ADF4377_SPI_STREAM_EN   0x0
 
#define ADF4377_SPI_STREAM_DIS   0x1
 
#define ADF4377_RB_SLAVE_REG   0x0
 
#define ADF4377_RB_MASTER_REG   0x1
 
#define ADF4377_CHIP_TYPE   0x06
 
#define ADF4377_PRODUCT_ID_LSB   0x0005
 
#define ADF4377_PRODUCT_ID_MSB   0x0005
 
#define ADF4377_SCRATCHPAD_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_SCRATCHPAD(x)
 
#define ADF4377_SPI_REVISION   0x01
 
#define ADF4377_VENDOR_ID_LSB   0x456
 
#define ADF4377_VENDOR_ID_MSB   0x456
 
#define ADF4377_R00F_RSV1   0x14
 
#define ADF4377_N_INT_LSB_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_N_INT_LSB(x)
 
#define ADF4377_EN_AUTOCAL_MSK   NO_OS_BIT(7)
 
#define ADF4377_EN_AUTOCAL(x)
 
#define ADF4377_EN_RDBLR_MSK   NO_OS_BIT(6)
 
#define ADF4377_EN_RDBLR(x)
 
#define ADF4377_DCLK_DIV2_MSK   NO_OS_GENMASK(5,4)
 
#define ADF4377_DCLK_DIV2(x)
 
#define ADF4377_N_INT_MSB_MSK   NO_OS_GENMASK(3,0)
 
#define ADF4377_N_INT_MSB(x)
 
#define ADF4377_VCO_CALIB_DIS   0x0
 
#define ADF4377_VCO_CALIB_EN   0x1
 
#define ADF4377_REF_DBLR_DIS   0x0
 
#define ADF4377_REF_DBLR_EN   0x1
 
#define ADF4377_DCLK_DIV2_1   0x0
 
#define ADF4377_DCLK_DIV2_2   0x1
 
#define ADF4377_DCLK_DIV2_4   0x2
 
#define ADF4377_DCLK_DIV2_8   0x3
 
#define ADF4377_CLKOUT_DIV_MSK   NO_OS_GENMASK(7, 6)
 
#define ADF4377_CLKOUT_DIV(x)
 
#define ADF4377_R_DIV_MSK   NO_OS_GENMASK(5, 0)
 
#define ADF4377_R_DIV(x)
 
#define ADF4377_CLKOUT_DIV_1   0x0
 
#define ADF4377_CLKOUT_DIV_2   0x1
 
#define ADF4377_CLKOUT_DIV_4   0x2
 
#define ADF4377_CLKOUT_DIV_8   0x3
 
#define ADF4377_MIN_R_DIV   0x00
 
#define ADF4378_MAX_R_DIV   0x3F
 
#define ADF4377_M_VCO_CORE_MSK   NO_OS_GENMASK(5,4)
 
#define ADF4377_M_VCO_CORE(x)
 
#define ADF4377_M_VCO_BIAS_MSK   NO_OS_GENMASK(3,0)
 
#define ADF4377_M_VCO_BIAS(x)
 
#define ADF4377_M_VCO_0   0x0
 
#define ADF4377_M_VCO_1   0x1
 
#define ADF4377_M_VCO_2   0x2
 
#define ADF4377_M_VCO_3   0x3
 
#define M_VCO_BIAS_MIN   0xF
 
#define M_VCO_BIAS_MAX   0x0
 
#define ADF4377_M_VCO_BAND_MSK   NO_OS_GENMASK(7,0)
 
#define ADF4377_M_VCO_BAND(x)
 
#define ADF4377_VCO_BAND_MIN   0xFF
 
#define ADF4377_VCO_BAND_MAX   0x00
 
#define ADF4377_BLEED_I_LSB_MSK   NO_OS_GENMASK(7, 6)
 
#define ADF4377_BLEED_I_LSB(x)
 
#define ADF4377_BLEED_POL_MSK   NO_OS_BIT(5)
 
#define ADF4377_BLEED_POL(x)
 
#define ADF4377_EN_BLEED_MSK   NO_OS_BIT(4)
 
#define ADF4377_EN_BLEED(x)
 
#define ADF4377_CP_I_MSK   NO_OS_GENMASK(3, 0)
 
#define ADF4377_CP_I(x)
 
#define ADF4377_CURRENT_SINK   0x0
 
#define ADF4377_CURRENT_SOURCE   0x1
 
#define ADF4377_CP_0MA7   0x0
 
#define ADF4377_CP_0MA9   0x1
 
#define ADF4377_CP_1MA1   0x2
 
#define ADF4377_CP_1MA3   0x3
 
#define ADF4377_CP_1MA4   0x4
 
#define ADF4377_CP_1MA8   0x5
 
#define ADF4377_CP_2MA2   0x6
 
#define ADF4377_CP_2MA5   0x7
 
#define ADF4377_CP_2MA9   0x8
 
#define ADF4377_CP_3MA6   0x9
 
#define ADF4377_CP_4MA3   0xA
 
#define ADF4377_CP_5MA0   0xB
 
#define ADF4377_CP_5MA7   0xC
 
#define ADF4377_CP_7MA2   0xD
 
#define ADF4377_CP_8MA6   0xE
 
#define ADF4377_CP_10MA1   0xF
 
#define ADF4377_BLEED_I_MSB_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_BLEED_I_MSB(x)
 
#define ADF4377_INV_CLKOUT_MSK   NO_OS_BIT(7)
 
#define ADF4377_INV_CLKOUT(x)
 
#define ADF4377_N_DEL_MSK   NO_OS_GENMASK(6, 0)
 
#define ADF4377_N_DEL(x)
 
#define ADF4377_CMOS_OV_MSK   NO_OS_BIT(7)
 
#define ADF4377_CMOS_OV(x)
 
#define ADF4377_R_DEL_MSK   NO_OS_GENMASK(6, 0)
 
#define ADF4377_R_DEL(x)
 
#define ADF4377_1V8_LOGIC   0x0
 
#define ADF4377_3V3_LOGIC   0x1
 
#define ADF4377_R_N_DEL_MIN   0x00
 
#define ADF4377_R_N_DEL_MAX   0x7F
 
#define ADF4377_CLKOUT2_OP_MSK   NO_OS_GENMASK(7, 6)
 
#define ADF4377_CLKOUT2_OP(x)
 
#define ADF4377_CLKOUT1_OP_MSK   NO_OS_GENMASK(5, 4)
 
#define ADF4377_CLKOUT1_OP(x)
 
#define ADF4377_PD_CLK_MSK   NO_OS_BIT(3)
 
#define ADF4377_PD_CLK(x)
 
#define ADF4377_PD_RDET_MSK   NO_OS_BIT(2)
 
#define ADF4377_PD_RDET(x)
 
#define ADF4377_PD_ADC_MSK   NO_OS_BIT(1)
 
#define ADF4377_PD_ADC(x)
 
#define ADF4377_PD_CALADC_MSK   NO_OS_BIT(0)
 
#define ADF4377_PD_CALADC(x)
 
#define ADF4377_CLKOUT_320MV   0x0
 
#define ADF4377_CLKOUT_420MV   0x1
 
#define ADF4377_CLKOUT_530MV   0x2
 
#define ADF4377_CLKOUT_640MV   0x3
 
#define ADF4377_PD_CLK_N_OP   0x0
 
#define ADF4377_PD_CLK_PD   0x1
 
#define ADF4377_PD_RDET_N_OP   0x0
 
#define ADF4377_PD_RDET_PD   0x1
 
#define ADF4377_PD_ADC_N_OP   0x0
 
#define ADF4377_PD_ADC_PD   0x1
 
#define ADF4377_PD_CALADC_N_OP   0x0
 
#define ADF4377_PD_CALADC_PD   0x1
 
#define ADF4377_PD_ALL_MSK   NO_OS_BIT(7)
 
#define ADF4377_PD_ALL(x)
 
#define ADF4377_PD_RDIV_MSK   NO_OS_BIT(6)
 
#define ADF4377_PD_RDIV(x)
 
#define ADF4377_PD_NDIV_MSK   NO_OS_BIT(5)
 
#define ADF4377_PD_NDIV(x)
 
#define ADF4377_PD_VCO_MSK   NO_OS_BIT(4)
 
#define ADF4377_PD_VCO(x)
 
#define ADF4377_PD_LD_MSK   NO_OS_BIT(3)
 
#define ADF4377_PD_LD(x)
 
#define ADF4377_PD_PFDCP_MSK   NO_OS_BIT(2)
 
#define ADF4377_PD_PFDCP(x)
 
#define ADF4377_PD_CLKOUT1_MSK   NO_OS_BIT(1)
 
#define ADF4377_PD_CLKOUT1(x)
 
#define ADF4377_PD_CLKOUT2_MSK   NO_OS_BIT(0)
 
#define ADF4377_PD_CLKOUT2(x)
 
#define ADF4377_PD_ALL_N_OP   0x0
 
#define ADF4377_PD_ALL_PD   0x1
 
#define ADF4377_PD_RDIV_N_OP   0x0
 
#define ADF4377_PD_RDIV_PD   0x1
 
#define ADF4377_PD_NDIV_N_OP   0x0
 
#define ADF4377_PD_NDIV_PD   0x1
 
#define ADF4377_PD_VCO_N_OP   0x0
 
#define ADF4377_PD_VCO_PD   0x1
 
#define ADF4377_PD_LD_N_OP   0x0
 
#define ADF4377_PD_LD_PD   0x1
 
#define ADF4377_PD_PFDCP_N_OP   0x0
 
#define ADF4377_PD_PFDCP_PD   0x1
 
#define ADF4377_PD_CLKOUT1_N_OP   0x0
 
#define ADF4377_PD_CLKOUT1_PD   0x1
 
#define ADF4377_PD_CLKOUT2_N_OP   0x0
 
#define ADF4377_PD_CLKOUT2_PD   0x1
 
#define ADF4377_EN_LOL_MSK   NO_OS_BIT(7)
 
#define ADF4377_EN_LOL(x)
 
#define ADF4377_LDWIN_PW_MSK   NO_OS_BIT(6)
 
#define ADF4377_LDWIN_PW(x)
 
#define ADF4377_EN_LDWIN_MSK   NO_OS_BIT(5)
 
#define ADF4377_EN_LDWIN(x)
 
#define ADF4377_LD_COUNT_MSK   NO_OS_GENMASK(4, 0)
 
#define ADF4377_LD_COUNT(x)
 
#define ADF4377_LDWIN_PW_NARROW   0x0
 
#define ADF4377_LDWIN_PW_WIDE   0x1
 
#define ADF4377_EN_DNCLK_MSK   NO_OS_BIT(7)
 
#define ADF4377_EN_DNCLK(x)
 
#define ADF4377_EN_DRCLK_MSK   NO_OS_BIT(6)
 
#define ADF4377_EN_DRCLK(x)
 
#define ADF4377_RST_LD_MSK   NO_OS_BIT(2)
 
#define ADF4377_RST_LD(x)
 
#define ADF4377_R01C_RSV1_MSK   NO_OS_BIT(0)
 
#define ADF4377_R01C_RSV1(x)
 
#define ADF4377_EN_DNCLK_OFF   0x0
 
#define ADF4377_EN_DNCLK_ON   0x1
 
#define ADF4377_EN_DRCLK_OFF   0x0
 
#define ADF4377_EN_DRCLK_ON   0x1
 
#define ADF4377_RST_LD_INACTIVE   0x0
 
#define ADF4377_RST_LD_ACTIVE   0x1
 
#define ADF4377_MUXOUT_MSK   NO_OS_GENMASK(7, 4)
 
#define ADF4377_MUXOUT(x)
 
#define ADF4377_EN_CPTEST_MSK   NO_OS_BIT(2)
 
#define ADF4377_EN_CPTEST(x)
 
#define ADF4377_CP_DOWN_MSK   NO_OS_BIT(1)
 
#define ADF4377_CP_DOWN(x)
 
#define ADF4377_CP_UP_MSK   NO_OS_BIT(0)
 
#define ADF4377_CP_UP(x)
 
#define ADF4377_MUXOUT_HIGH_Z   0x0
 
#define ADF4377_MUXOUT_LKDET   0x1
 
#define ADF4377_MUXOUT_LOW   0x2
 
#define ADF4377_MUXOUT_DIV_RCLK_2   0x4
 
#define ADF4377_MUXOUT_DIV_NCLK_2   0x5
 
#define ADF4377_MUXOUT_HIGH   0x8
 
#define ADF4377_EN_CPTEST_OFF   0x0
 
#define ADF4377_EN_CPTEST_ON   0x1
 
#define ADF4377_CP_DOWN_OFF   0x0
 
#define ADF4377_CP_DOWN_ON   0x1
 
#define ADF4377_CP_UP_OFF   0x0
 
#define ADF4377_CP_UP_ON   0x1
 
#define ADF4377_BST_REF_MSK   NO_OS_BIT(7)
 
#define ADF4377_BST_REF(x)
 
#define ADF4377_FILT_REF_MSK   NO_OS_BIT(6)
 
#define ADF4377_FILT_REF(x)
 
#define ADF4377_REF_SEL_MSK   NO_OS_BIT(5)
 
#define ADF4377_REF_SEL(x)
 
#define ADF4377_R01F_RSV1_MSK   NO_OS_GENMASK(2, 0)
 
#define ADF4377_R01F_RSV1(x)
 
#define ADF4377_BST_LARGE_REF_IN   0x0
 
#define ADF4377_BST_SMALL_REF_IN   0x1
 
#define ADF4377_FILT_REF_OFF   0x0
 
#define ADF4377_FILT_REF_ON   0x1
 
#define ADF4377_REF_SEL_DMA   0x0
 
#define ADF4377_REF_SEL_LNA   0x1
 
#define ADF4377_RST_SYS_MSK   NO_OS_BIT(4)
 
#define ADF4377_RST_SYS(x)
 
#define ADF4377_EN_ADC_CLK_MSK   NO_OS_BIT(3)
 
#define ADF4377_EN_ADC_CLK(x)
 
#define ADF4377_R020_RSV1_MSK   NO_OS_BIT(0)
 
#define ADF4377_R020_RSV1(x)
 
#define ADF4377_RST_SYS_INACTIVE   0x0
 
#define ADF4377_RST_SYS_ACTIVE   0x1
 
#define ADF4377_R021_RSV1   0xD3
 
#define ADF4377_R022_RSV1   0x32
 
#define ADF4377_R023_RSV1   0x18
 
#define ADF4377_DCLK_MODE_MSK   NO_OS_BIT(2)
 
#define ADF4377_DCLK_MODE(x)
 
#define ADF4377_CLKODIV_DB_MSK   NO_OS_BIT(7)
 
#define ADF4377_CLKODIV_DB(x)
 
#define ADF4377_DCLK_DB_MSK   NO_OS_BIT(6)
 
#define ADF4377_DCLK_DB(x)
 
#define ADF4377_R025_RSV1_MSK   NO_OS_BIT(4) | NO_OS_BIT(2) | NO_OS_BIT(1)
 
#define ADF4377_R025_RSV1(x)
 
#define ADF4377_VCO_BAND_DIV_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_VCO_BAND_DIV(x)
 
#define ADF4377_VCO_BAND_DIV_MIN   0x00
 
#define ADF4377_VCO_BAND_DIV_MAX   0xFF
 
#define ADF4377_SYNTH_LOCK_TO_LSB_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_SYNTH_LOCK_TO_LSB(x)
 
#define ADF4377_O_VCO_DB_MSK   NO_OS_BIT(7)
 
#define ADF4377_O_VCO_DB(x)
 
#define ADF4377_SYNTH_LOCK_TO_MSB_MSK   NO_OS_GENMASK(6, 0)
 
#define ADF4377_SYNTH_LOCK_TO_MSB(x)
 
#define ADF4377_VCO_ALC_TO_LSB_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_VCO_ALC_TO_LSB(x)
 
#define ADF4377_DEL_CTRL_DB_MSK   NO_OS_BIT(7)
 
#define ADF4377_DEL_CTRL_DB(x)
 
#define ADF4377_VCO_ALC_TO_MSB_MSK   NO_OS_GENMASK(6, 0)
 
#define ADF4377_VCO_ALC_TO_MSB(x)
 
#define ADF4377_R02C_RSV1   0xC0
 
#define ADF4377_ADC_CLK_DIV_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_ADC_CLK_DIV(x)
 
#define ADF4377_EN_ADC_CNV_MSK   NO_OS_BIT(7)
 
#define ADF4377_EN_ADC_CNV(x)
 
#define ADF4377_EN_ADC_MSK   NO_OS_BIT(1)
 
#define ADF4377_EN_ADC(x)
 
#define ADF4377_ADC_A_CONV_MSK   NO_OS_BIT(0)
 
#define ADF4377_ADC_A_CONV(x)
 
#define ADF4377_ADC_A_CONV_ADC_ST_CNV   0x0
 
#define ADF4377_ADC_A_CONV_VCO_CALIB   0x1
 
#define ADF4377_DCLK_DIV1_MSK   NO_OS_GENMASK(1, 0)
 
#define ADF4377_DCLK_DIV1(x)
 
#define ADF4377_DCLK_DIV1_1   0x0
 
#define ADF4377_DCLK_DIV1_2   0x1
 
#define ADF4377_DCLK_DIV1_8   0x2
 
#define ADF4377_DCLK_DIV1_32   0x3
 
#define ADF4377_R031_RSV1   0x09
 
#define ADF4377_ADC_CLK_SEL_MSK   NO_OS_BIT(6)
 
#define ADF4377_ADC_CLK_SEL(x)
 
#define ADF4377_R032_RSV1_MSK   NO_OS_BIT(3) | NO_OS_BIT(0)
 
#define ADF4377_R032_RSV1(x)
 
#define ADF4377_ADC_CLK_SEL_N_OP   0x0
 
#define ADF4377_ADC_CLK_SEL_SPI_CLK   0x1
 
#define ADF4377_R033_RSV1   0x18
 
#define ADF4377_R034_RSV1   0x08
 
#define ADF4377_R03A_RSV1   0x5C
 
#define ADF4377_R03B_RSV1   0x2B
 
#define ADF4377_O_VCO_BAND_MSK   NO_OS_BIT(3)
 
#define ADF4377_O_VCO_BAND(x)
 
#define ADF4377_O_VCO_CORE_MSK   NO_OS_BIT(2)
 
#define ADF4377_O_VCO_CORE(x)
 
#define ADF4377_O_VCO_BIAS_MSK   NO_OS_BIT(1)
 
#define ADF4377_O_VCO_BIAS(x)
 
#define ADF4377_O_VCO_BAND_VCO_CALIB   0x0
 
#define ADF4377_O_VCO_BAND_M_VCO   0x1
 
#define ADF4377_O_VCO_CORE_VCO_CALIB   0x0
 
#define ADF4377_O_VCO_CORE_M_VCO   0x1
 
#define ADF4377_O_VCO_BIAS_VCO_CALIB   0x0
 
#define ADF4377_O_VCO_BIAS_M_VCO   0x1
 
#define ADF4377_R042_RSV5_MSK   NO_OS_BIT(7)
 
#define ADF4377_PD_SR_MON_MSK   NO_OS_BIT(6)
 
#define ADF4377_PD_SR_MON(x)
 
#define ADF4377_SR_SEL_MSK   NO_OS_BIT(5)
 
#define ADF4377_SR_SEL(x)
 
#define ADF4377_RST_SR_MON_MSK   NO_OS_BIT(4)
 
#define ADF4377_RST_SR_MON(x)
 
#define ADF4377_R042_RSV1_MSK   NO_OS_GENMASK(3, 0)
 
#define ADF4377_R042_RSV1   0x05
 
#define ADF4377_INV_SR_MSK   NO_OS_BIT(7)
 
#define ADF4377_INV_SR(x)
 
#define ADF4377_SR_DEL_MSK   NO_OS_GENMASK(6, 0)
 
#define ADF4377_SR_DEL(x)
 
#define ADF4377_ADC_ST_CNV_MSK   NO_OS_BIT(0)
 
#define ADF4377_ADC_ST_CNV(x)
 
#define ADF4377_EN_CLK2_MSK   NO_OS_BIT(7)
 
#define ADF4377_EN_CLK2(x)
 
#define ADF4377_EN_CLK1_MSK   NO_OS_BIT(6)
 
#define ADF4377_EN_CLK1(x)
 
#define ADF4377_REF_OK_MSK   NO_OS_BIT(3)
 
#define ADF4377_REF_OK(x)
 
#define ADF4377_ADC_BUSY_MSK   NO_OS_BIT(2)
 
#define ADF4377_ADC_BUSY(x)
 
#define ADF4377_FSM_BUSY_MSK   NO_OS_BIT(1)
 
#define ADF4377_FSM_BUSY(x)
 
#define ADF4377_LOCKED_MSK   NO_OS_BIT(0)
 
#define ADF4377_LOCKED(x)
 
#define ADF4377_VCO_CORE_MSK   NO_OS_GENMASK(1, 0)
 
#define ADF4377_VCO_CORE(x)
 
#define ADF4377_CHIP_TEMP_LSB_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_CHIP_TEMP_LSB(x)
 
#define ADF4377_CHIP_TEMP_MSB_MSK   NO_OS_BIT(0)
 
#define ADF4377_CHIP_TEMP_MSB(x)
 
#define ADF4377_VCO_BAND_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_VCO_BAND(x)
 
#define ADF4377_CHIP_VERSION_MSK   NO_OS_GENMASK(7, 0)
 
#define ADF4377_CHIP_VERSION(x)
 
#define ADF4377_SPI_4W_CFG(x)
 
#define ADF4377_SPI_LSB_CFG(x)
 
#define ADF4377_SPI_WRITE_CMD   0x0
 
#define ADF4377_SPI_READ_CMD   NO_OS_BIT(7)
 
#define ADF4377_BUFF_SIZE_BYTES   3
 
#define ADF4377_MAX_VCO_FREQ   12800000000ull /* Hz */
 
#define ADF4377_MIN_VCO_FREQ   6400000000ull /* Hz */
 
#define ADF4377_MAX_REFIN_FREQ   1000000000 /* Hz */
 
#define ADF4377_MIN_REFIN_FREQ   10000000 /* Hz */
 
#define ADF4377_MAX_FREQ_PFD   500000000 /* Hz */
 
#define ADF4377_MIN_FREQ_PFD   3000000 /* Hz */
 
#define ADF4377_MAX_CLKPN_FREQ   ADF4377_MAX_VCO_FREQ /* Hz */
 
#define ADF4377_MIN_CLKPN_FREQ   (ADF4377_MIN_VCO_FREQ / 8) /* Hz */
 
#define ADF4377_FREQ_PFD_80MHZ   80000000
 
#define ADF4377_FREQ_PFD_125MHZ   125000000
 
#define ADF4377_FREQ_PFD_160MHZ   160000000
 
#define ADF4377_FREQ_PFD_250MHZ   250000000
 
#define ADF4377_FREQ_PFD_320MHZ   320000000
 
#define ADF4377_CPI_VAL_MAX   15
 
#define ADF4377_RFOUT_MAX   12800000000U
 
#define ADF4377_RFOUT_MIN   800000000U
 
#define ADF4377_CLKOUT_DIV_REG_VAL_MAX   3
 
#define ADF4377_LKD_DELAY_US   5000
 
#define ADF4377_POR_DELAY_US   200
 
#define ADF4377_BLEED_WORD_MAX   1023
 
#define ADF4377_REF_DIV_MAX   63
 
#define ADF4377_OUT_PWR_MAX   ADF4377_CLKOUT_DIV_REG_VAL_MAX
 
#define ADF4377_CLKIN_REF_MIN   10000000
 
#define ADF4377_CLKIN_REF_MAX   10000000000U
 
#define ADF4377_SR_DEL_MAX   127
 
#define ADF4377_SR_MON_DELAY_US   100U
 
#define ADF4377_SPI_SCRATCHPAD_TEST_A   0xA5u
 
#define ADF4377_SPI_SCRATCHPAD_TEST_B   0x5Au
 
#define ADF4377_SPI_DUMMY_DATA   0x00
 
#define ADF4377_CHECK_RANGE(freq, range)
 

Enumerations

enum  adf4377_dev_id {
  ADF4377 = 0x05 ,
  ADF4378 = 0x06
}
 ID of Devices supported by the driver. More...
 

Functions

int adf4377_spi_write (struct adf4377_dev *dev, uint8_t reg_addr, uint8_t data)
 Writes data to ADF4377 over SPI.
 
int adf4377_spi_update_bit (struct adf4377_dev *dev, uint16_t reg_addr, uint8_t mask, uint8_t data)
 Update ADF4377 register.
 
int adf4377_spi_read (struct adf4377_dev *dev, uint8_t reg_addr, uint8_t *data)
 Reads data from ADF4377 over SPI.
 
int adf4377_set_ref_clk (struct adf4377_dev *dev, uint64_t val)
 Set the desired reference frequency and reset everything over to maximum supported value of 5GHz to the max. value and everything under the minimum supported value of 10MHz to the min. value.
 
int adf4377_get_ref_clk (struct adf4377_dev *dev, uint64_t *val)
 Gets the user proposed reference frequency.
 
int adf4377_set_en_ref_doubler (struct adf4377_dev *dev, bool en)
 Set the reference doubler to enable or disable based on the passed parameter. If the parameter is different then 0 it will set the doubler to enable.
 
int adf4377_get_en_ref_doubler (struct adf4377_dev *dev, bool *en)
 Gets the value the doubler if it is enabled or disable and stores it it the dev structure.
 
int adf4377_set_ref_div (struct adf4377_dev *dev, int32_t div)
 Set the reference divider value and reset everything over to maximum supported value of 63 to the max. value.
 
int adf4377_get_ref_div (struct adf4377_dev *dev, int32_t *div)
 Gets the value the reference divider.
 
int adf4377_set_cp_i (struct adf4377_dev *dev, int32_t reg_val)
 Set the charge pump value which will be written to the register. The value will be between 0 and 15 on 8 bits. For more information please consult the Datasheet.
 
int adf4377_get_cp_i (struct adf4377_dev *dev, int32_t *reg_val)
 Gets the charge pump value from the register. The value will be between 0 and 15 on 8 bits. For more information please consult the Datasheet.
 
int adf4377_set_bleed_word (struct adf4377_dev *dev, int32_t word)
 Set the bleed word, which represents the value of the bleed current written to the register space.
 
int adf4377_get_bleed_word (struct adf4377_dev *dev, int32_t *word)
 Gets the value of the set bleed word.
 
int adf4377_set_rfout (struct adf4377_dev *dev, uint64_t val)
 Set the desired output frequency and reset everything over to maximum supported value of 12.8GHz to the max. value and everything under the minimum supported value of 800MHz to the min. value.
 
int adf4377_get_rfout (struct adf4377_dev *dev, uint64_t *val)
 Gets the user proposed output frequency.
 
int adf4377_set_en_chan (struct adf4377_dev *dev, uint8_t ch, bool en)
 Set the output channel to enable or disable based on the passed parameter. If the parameter is different then 0 it will set the doubler to enable.
 
int adf4377_get_en_chan (struct adf4377_dev *dev, uint8_t ch, bool *en)
 Gets the value the output channel if it is enabled or disable.
 
int adf4377_set_out_power (struct adf4377_dev *dev, uint8_t ch, int8_t pwr)
 Set the output power register value of a channel and reset everything over to maximum supported value of 15 to the max. value.
 
int adf4377_get_out_power (struct adf4377_dev *dev, uint8_t ch, int8_t *pwr)
 Gets the output power register value.
 
int adf4377_set_rfout_divider (struct adf4377_dev *dev, uint8_t div)
 Set the rfout frequency divider register value and reset everything over to maximum supported value of /128 to the max. value.
 
int adf4377_get_rfout_divider (struct adf4377_dev *dev, int8_t *div)
 Gets the rfout divider register value.
 
int adf4377_check_scratchpad (struct adf4377_dev *dev)
 ADF4377 SPI Scratchpad check.
 
int adf4377_set_sr_del_adj (struct adf4377_dev *dev, int32_t val)
 Set the value of SR_DEL Adjustment Feature Translated to Pico Seconds on the output. Reset to Max value of 127.
 
int adf4377_get_sr_del_adj (struct adf4377_dev *dev, int32_t *val)
 Gets the value of the set SR_DEL Adjustment Feature Translated to Pico Seconds on the output.
 
int adf4377_set_en_sr_inv_adj (struct adf4377_dev *dev, bool en)
 Set the value of SR_INV_ADJ Adjustment to enable or disable which adds a constant value to the skew adjustment output.
 
int adf4377_get_en_sr_inv_adj (struct adf4377_dev *dev, bool *en)
 Gets the value of the set SR_INV_ADJ Adjustment to enable or disable which adds a constant value to the skew adjustment output.
 
int adf4377_set_en_sysref_monitor (struct adf4377_dev *dev, bool en)
 Set enable/disable sysref monitoring.
 
int adf4377_get_en_sysref_monitor (struct adf4377_dev *dev, bool *en)
 Gets the value of the set sysref monitoring.
 
int adf4377_set_ndel (struct adf4377_dev *dev, int32_t val)
 Set the NDEL (N divider Delay) register value.
 
int adf4377_get_ndel (struct adf4377_dev *dev, int32_t *val)
 Gets the value of the set NDEL (N divider Delay) register.
 
int adf4377_set_rdel (struct adf4377_dev *dev, int32_t val)
 Set the RDEL (R divider Delay) register value.
 
int adf4377_get_rdel (struct adf4377_dev *dev, int32_t *val)
 Gets the value of the set RDEL (R divider Delay) register.
 
int adf4377_set_freq (struct adf4377_dev *dev)
 
int adf4377_soft_reset (struct adf4377_dev *dev, bool spi_4wire)
 Software reset and loads default register values to bring the part to a known state.
 
int32_t adf4377_init (struct adf4377_dev **device, struct adf4377_init_param *init_param)
 Initializes the ADF4377.
 
int32_t adf4377_remove (struct adf4377_dev *dev)
 Free resoulces allocated for ADF4377.
 

Detailed Description

Header file for adf4377 Driver.

Author
Antoniu Miclaus (anton.nosp@m.iu.m.nosp@m.iclau.nosp@m.s@an.nosp@m.alog..nosp@m.com)
Jude Osemene (jude..nosp@m.osem.nosp@m.ene@a.nosp@m.nalo.nosp@m.g.com)
Sirac Kucukarabacioglu (sirac.nosp@m..kuc.nosp@m.ukara.nosp@m.baci.nosp@m.oglu@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Copyright 2025(c) Analog Devices, Inc.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ ADF4377_1V8_LOGIC

#define ADF4377_1V8_LOGIC   0x0

◆ ADF4377_3V3_LOGIC

#define ADF4377_3V3_LOGIC   0x1

◆ ADF4377_ADC_A_CONV

#define ADF4377_ADC_A_CONV ( x)
Value:
no_os_field_prep(ADF4377_ADC_A_CONV_MSK, x)
ADF4377_ADC_A_CONV_MSK
#define ADF4377_ADC_A_CONV_MSK
Definition adf4377.h:466
no_os_field_prep
uint32_t no_os_field_prep(uint32_t mask, uint32_t val)

◆ ADF4377_ADC_A_CONV_ADC_ST_CNV

#define ADF4377_ADC_A_CONV_ADC_ST_CNV   0x0

◆ ADF4377_ADC_A_CONV_MSK

#define ADF4377_ADC_A_CONV_MSK   NO_OS_BIT(0)

◆ ADF4377_ADC_A_CONV_VCO_CALIB

#define ADF4377_ADC_A_CONV_VCO_CALIB   0x1

◆ ADF4377_ADC_BUSY

#define ADF4377_ADC_BUSY ( x)
Value:
no_os_field_prep(ADF4377_ADC_BUSY_MSK, x)
ADF4377_ADC_BUSY_MSK
#define ADF4377_ADC_BUSY_MSK
Definition adf4377.h:556

◆ ADF4377_ADC_BUSY_MSK

#define ADF4377_ADC_BUSY_MSK   NO_OS_BIT(2)

◆ ADF4377_ADC_CLK_DIV

#define ADF4377_ADC_CLK_DIV ( x)
Value:
no_os_field_prep(ADF4377_ADC_CLK_DIV_MSK, x)
ADF4377_ADC_CLK_DIV_MSK
#define ADF4377_ADC_CLK_DIV_MSK
Definition adf4377.h:458

◆ ADF4377_ADC_CLK_DIV_MSK

#define ADF4377_ADC_CLK_DIV_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_ADC_CLK_SEL

#define ADF4377_ADC_CLK_SEL ( x)
Value:
no_os_field_prep(ADF4377_ADC_CLK_SEL_MSK, x)
ADF4377_ADC_CLK_SEL_MSK
#define ADF4377_ADC_CLK_SEL_MSK
Definition adf4377.h:487

◆ ADF4377_ADC_CLK_SEL_MSK

#define ADF4377_ADC_CLK_SEL_MSK   NO_OS_BIT(6)

◆ ADF4377_ADC_CLK_SEL_N_OP

#define ADF4377_ADC_CLK_SEL_N_OP   0x0

◆ ADF4377_ADC_CLK_SEL_SPI_CLK

#define ADF4377_ADC_CLK_SEL_SPI_CLK   0x1

◆ ADF4377_ADC_ST_CNV

#define ADF4377_ADC_ST_CNV ( x)
Value:
no_os_field_prep(ADF4377_ADC_ST_CNV_MSK, x)
ADF4377_ADC_ST_CNV_MSK
#define ADF4377_ADC_ST_CNV_MSK
Definition adf4377.h:546

◆ ADF4377_ADC_ST_CNV_MSK

#define ADF4377_ADC_ST_CNV_MSK   NO_OS_BIT(0)

◆ ADF4377_ADDR_ASC_AUTO_DECR

#define ADF4377_ADDR_ASC_AUTO_DECR   0x0

◆ ADF4377_ADDR_ASC_AUTO_INCR

#define ADF4377_ADDR_ASC_AUTO_INCR   0x1

◆ ADF4377_ADDRESS_ASC

#define ADF4377_ADDRESS_ASC ( x)
Value:
no_os_field_prep(ADF4377_ADDRESS_ASC_MSK, x)
ADF4377_ADDRESS_ASC_MSK
#define ADF4377_ADDRESS_ASC_MSK
Definition adf4377.h:59

◆ ADF4377_ADDRESS_ASC_MSK

#define ADF4377_ADDRESS_ASC_MSK   NO_OS_BIT(2)

◆ ADF4377_ADDRESS_ASC_R

#define ADF4377_ADDRESS_ASC_R ( x)
Value:
no_os_field_prep(ADF4377_ADDRESS_ASC_R_MSK, x)
ADF4377_ADDRESS_ASC_R_MSK
#define ADF4377_ADDRESS_ASC_R_MSK
Definition adf4377.h:57

◆ ADF4377_ADDRESS_ASC_R_MSK

#define ADF4377_ADDRESS_ASC_R_MSK   NO_OS_BIT(5)

◆ ADF4377_BLEED_I_LSB

#define ADF4377_BLEED_I_LSB ( x)
Value:
no_os_field_prep(ADF4377_BLEED_I_LSB_MSK, x)
ADF4377_BLEED_I_LSB_MSK
#define ADF4377_BLEED_I_LSB_MSK
Definition adf4377.h:183

◆ ADF4377_BLEED_I_LSB_MSK

#define ADF4377_BLEED_I_LSB_MSK   NO_OS_GENMASK(7, 6)

◆ ADF4377_BLEED_I_MSB

#define ADF4377_BLEED_I_MSB ( x)
Value:
no_os_field_prep(ADF4377_BLEED_I_MSB_MSK, x)
ADF4377_BLEED_I_MSB_MSK
#define ADF4377_BLEED_I_MSB_MSK
Definition adf4377.h:214

◆ ADF4377_BLEED_I_MSB_MSK

#define ADF4377_BLEED_I_MSB_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_BLEED_POL

#define ADF4377_BLEED_POL ( x)
Value:
no_os_field_prep(ADF4377_BLEED_POL_MSK, x)
ADF4377_BLEED_POL_MSK
#define ADF4377_BLEED_POL_MSK
Definition adf4377.h:185

◆ ADF4377_BLEED_POL_MSK

#define ADF4377_BLEED_POL_MSK   NO_OS_BIT(5)

◆ ADF4377_BLEED_WORD_MAX

#define ADF4377_BLEED_WORD_MAX   1023

◆ ADF4377_BST_LARGE_REF_IN

#define ADF4377_BST_LARGE_REF_IN   0x0

◆ ADF4377_BST_REF

#define ADF4377_BST_REF ( x)
Value:
no_os_field_prep(ADF4377_BST_REF_MSK, x)
ADF4377_BST_REF_MSK
#define ADF4377_BST_REF_MSK
Definition adf4377.h:374

◆ ADF4377_BST_REF_MSK

#define ADF4377_BST_REF_MSK   NO_OS_BIT(7)

◆ ADF4377_BST_SMALL_REF_IN

#define ADF4377_BST_SMALL_REF_IN   0x1

◆ ADF4377_BUFF_SIZE_BYTES

#define ADF4377_BUFF_SIZE_BYTES   3

◆ ADF4377_CHECK_RANGE

#define ADF4377_CHECK_RANGE ( freq,
range )
Value:
((freq > ADF4377_MAX_ ## range) || (freq < ADF4377_MIN_ ## range))

◆ ADF4377_CHIP_TEMP_LSB

#define ADF4377_CHIP_TEMP_LSB ( x)
Value:
no_os_field_prep(ADF4377_CHIP_TEMP_LSB_MSK, x)
ADF4377_CHIP_TEMP_LSB_MSK
#define ADF4377_CHIP_TEMP_LSB_MSK
Definition adf4377.h:568

◆ ADF4377_CHIP_TEMP_LSB_MSK

#define ADF4377_CHIP_TEMP_LSB_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_CHIP_TEMP_MSB

#define ADF4377_CHIP_TEMP_MSB ( x)
Value:
no_os_field_prep(ADF4377_CHIP_TEMP_MSB_MSK, x)
ADF4377_CHIP_TEMP_MSB_MSK
#define ADF4377_CHIP_TEMP_MSB_MSK
Definition adf4377.h:572

◆ ADF4377_CHIP_TEMP_MSB_MSK

#define ADF4377_CHIP_TEMP_MSB_MSK   NO_OS_BIT(0)

◆ ADF4377_CHIP_TYPE

#define ADF4377_CHIP_TYPE   0x06

◆ ADF4377_CHIP_VERSION

#define ADF4377_CHIP_VERSION ( x)
Value:
no_os_field_prep(ADF4377_CHIP_VERSION_MSK, x)
ADF4377_CHIP_VERSION_MSK
#define ADF4377_CHIP_VERSION_MSK
Definition adf4377.h:580

◆ ADF4377_CHIP_VERSION_MSK

#define ADF4377_CHIP_VERSION_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_CLKIN_REF_MAX

#define ADF4377_CLKIN_REF_MAX   10000000000U

◆ ADF4377_CLKIN_REF_MIN

#define ADF4377_CLKIN_REF_MIN   10000000

◆ ADF4377_CLKODIV_DB

#define ADF4377_CLKODIV_DB ( x)
Value:
no_os_field_prep(ADF4377_CLKODIV_DB_MSK, x)
ADF4377_CLKODIV_DB_MSK
#define ADF4377_CLKODIV_DB_MSK
Definition adf4377.h:419

◆ ADF4377_CLKODIV_DB_MSK

#define ADF4377_CLKODIV_DB_MSK   NO_OS_BIT(7)

◆ ADF4377_CLKOUT1_OP

#define ADF4377_CLKOUT1_OP ( x)
Value:
no_os_field_prep(ADF4377_CLKOUT1_OP_MSK, x)
ADF4377_CLKOUT1_OP_MSK
#define ADF4377_CLKOUT1_OP_MSK
Definition adf4377.h:239

◆ ADF4377_CLKOUT1_OP_MSK

#define ADF4377_CLKOUT1_OP_MSK   NO_OS_GENMASK(5, 4)

◆ ADF4377_CLKOUT2_OP

#define ADF4377_CLKOUT2_OP ( x)
Value:
no_os_field_prep(ADF4377_CLKOUT2_OP_MSK, x)
ADF4377_CLKOUT2_OP_MSK
#define ADF4377_CLKOUT2_OP_MSK
Definition adf4377.h:237

◆ ADF4377_CLKOUT2_OP_MSK

#define ADF4377_CLKOUT2_OP_MSK   NO_OS_GENMASK(7, 6)

◆ ADF4377_CLKOUT_320MV

#define ADF4377_CLKOUT_320MV   0x0

◆ ADF4377_CLKOUT_420MV

#define ADF4377_CLKOUT_420MV   0x1

◆ ADF4377_CLKOUT_530MV

#define ADF4377_CLKOUT_530MV   0x2

◆ ADF4377_CLKOUT_640MV

#define ADF4377_CLKOUT_640MV   0x3

◆ ADF4377_CLKOUT_DIV

#define ADF4377_CLKOUT_DIV ( x)
Value:
no_os_field_prep(ADF4377_CLKOUT_DIV_MSK, x)
ADF4377_CLKOUT_DIV_MSK
#define ADF4377_CLKOUT_DIV_MSK
Definition adf4377.h:145

◆ ADF4377_CLKOUT_DIV_1

#define ADF4377_CLKOUT_DIV_1   0x0

◆ ADF4377_CLKOUT_DIV_2

#define ADF4377_CLKOUT_DIV_2   0x1

◆ ADF4377_CLKOUT_DIV_4

#define ADF4377_CLKOUT_DIV_4   0x2

◆ ADF4377_CLKOUT_DIV_8

#define ADF4377_CLKOUT_DIV_8   0x3

◆ ADF4377_CLKOUT_DIV_MSK

#define ADF4377_CLKOUT_DIV_MSK   NO_OS_GENMASK(7, 6)

◆ ADF4377_CLKOUT_DIV_REG_VAL_MAX

#define ADF4377_CLKOUT_DIV_REG_VAL_MAX   3

◆ ADF4377_CMOS_OV

#define ADF4377_CMOS_OV ( x)
Value:
no_os_field_prep(ADF4377_CMOS_OV_MSK, x)
ADF4377_CMOS_OV_MSK
#define ADF4377_CMOS_OV_MSK
Definition adf4377.h:224

◆ ADF4377_CMOS_OV_MSK

#define ADF4377_CMOS_OV_MSK   NO_OS_BIT(7)

◆ ADF4377_CP_0MA7

#define ADF4377_CP_0MA7   0x0

◆ ADF4377_CP_0MA9

#define ADF4377_CP_0MA9   0x1

◆ ADF4377_CP_10MA1

#define ADF4377_CP_10MA1   0xF

◆ ADF4377_CP_1MA1

#define ADF4377_CP_1MA1   0x2

◆ ADF4377_CP_1MA3

#define ADF4377_CP_1MA3   0x3

◆ ADF4377_CP_1MA4

#define ADF4377_CP_1MA4   0x4

◆ ADF4377_CP_1MA8

#define ADF4377_CP_1MA8   0x5

◆ ADF4377_CP_2MA2

#define ADF4377_CP_2MA2   0x6

◆ ADF4377_CP_2MA5

#define ADF4377_CP_2MA5   0x7

◆ ADF4377_CP_2MA9

#define ADF4377_CP_2MA9   0x8

◆ ADF4377_CP_3MA6

#define ADF4377_CP_3MA6   0x9

◆ ADF4377_CP_4MA3

#define ADF4377_CP_4MA3   0xA

◆ ADF4377_CP_5MA0

#define ADF4377_CP_5MA0   0xB

◆ ADF4377_CP_5MA7

#define ADF4377_CP_5MA7   0xC

◆ ADF4377_CP_7MA2

#define ADF4377_CP_7MA2   0xD

◆ ADF4377_CP_8MA6

#define ADF4377_CP_8MA6   0xE

◆ ADF4377_CP_DOWN

#define ADF4377_CP_DOWN ( x)
Value:
no_os_field_prep(ADF4377_CP_DOWN_MSK, x)
ADF4377_CP_DOWN_MSK
#define ADF4377_CP_DOWN_MSK
Definition adf4377.h:351

◆ ADF4377_CP_DOWN_MSK

#define ADF4377_CP_DOWN_MSK   NO_OS_BIT(1)

◆ ADF4377_CP_DOWN_OFF

#define ADF4377_CP_DOWN_OFF   0x0

◆ ADF4377_CP_DOWN_ON

#define ADF4377_CP_DOWN_ON   0x1

◆ ADF4377_CP_I

#define ADF4377_CP_I ( x)
Value:
no_os_field_prep(ADF4377_CP_I_MSK, x)
ADF4377_CP_I_MSK
#define ADF4377_CP_I_MSK
Definition adf4377.h:189

◆ ADF4377_CP_I_MSK

#define ADF4377_CP_I_MSK   NO_OS_GENMASK(3, 0)

◆ ADF4377_CP_UP

#define ADF4377_CP_UP ( x)
Value:
no_os_field_prep(ADF4377_CP_UP_MSK, x)
ADF4377_CP_UP_MSK
#define ADF4377_CP_UP_MSK
Definition adf4377.h:353

◆ ADF4377_CP_UP_MSK

#define ADF4377_CP_UP_MSK   NO_OS_BIT(0)

◆ ADF4377_CP_UP_OFF

#define ADF4377_CP_UP_OFF   0x0

◆ ADF4377_CP_UP_ON

#define ADF4377_CP_UP_ON   0x1

◆ ADF4377_CPI_VAL_MAX

#define ADF4377_CPI_VAL_MAX   15

◆ ADF4377_CURRENT_SINK

#define ADF4377_CURRENT_SINK   0x0

◆ ADF4377_CURRENT_SOURCE

#define ADF4377_CURRENT_SOURCE   0x1

◆ ADF4377_DCLK_DB

#define ADF4377_DCLK_DB ( x)
Value:
no_os_field_prep(ADF4377_DCLK_DB_MSK, x)
ADF4377_DCLK_DB_MSK
#define ADF4377_DCLK_DB_MSK
Definition adf4377.h:421

◆ ADF4377_DCLK_DB_MSK

#define ADF4377_DCLK_DB_MSK   NO_OS_BIT(6)

◆ ADF4377_DCLK_DIV1

#define ADF4377_DCLK_DIV1 ( x)
Value:
no_os_field_prep(ADF4377_DCLK_DIV1_MSK, x)
ADF4377_DCLK_DIV1_MSK
#define ADF4377_DCLK_DIV1_MSK
Definition adf4377.h:474

◆ ADF4377_DCLK_DIV1_1

#define ADF4377_DCLK_DIV1_1   0x0

◆ ADF4377_DCLK_DIV1_2

#define ADF4377_DCLK_DIV1_2   0x1

◆ ADF4377_DCLK_DIV1_32

#define ADF4377_DCLK_DIV1_32   0x3

◆ ADF4377_DCLK_DIV1_8

#define ADF4377_DCLK_DIV1_8   0x2

◆ ADF4377_DCLK_DIV1_MSK

#define ADF4377_DCLK_DIV1_MSK   NO_OS_GENMASK(1, 0)

◆ ADF4377_DCLK_DIV2

#define ADF4377_DCLK_DIV2 ( x)
Value:
no_os_field_prep(ADF4377_DCLK_DIV2_MSK, x)
ADF4377_DCLK_DIV2_MSK
#define ADF4377_DCLK_DIV2_MSK
Definition adf4377.h:127

◆ ADF4377_DCLK_DIV2_1

#define ADF4377_DCLK_DIV2_1   0x0

◆ ADF4377_DCLK_DIV2_2

#define ADF4377_DCLK_DIV2_2   0x1

◆ ADF4377_DCLK_DIV2_4

#define ADF4377_DCLK_DIV2_4   0x2

◆ ADF4377_DCLK_DIV2_8

#define ADF4377_DCLK_DIV2_8   0x3

◆ ADF4377_DCLK_DIV2_MSK

#define ADF4377_DCLK_DIV2_MSK   NO_OS_GENMASK(5,4)

◆ ADF4377_DCLK_MODE

#define ADF4377_DCLK_MODE ( x)
Value:
no_os_field_prep(ADF4377_DCLK_MODE_MSK, x)
ADF4377_DCLK_MODE_MSK
#define ADF4377_DCLK_MODE_MSK
Definition adf4377.h:415

◆ ADF4377_DCLK_MODE_MSK

#define ADF4377_DCLK_MODE_MSK   NO_OS_BIT(2)

◆ ADF4377_DEL_CTRL_DB

#define ADF4377_DEL_CTRL_DB ( x)
Value:
no_os_field_prep(ADF4377_DEL_CTRL_DB_MSK, x)
ADF4377_DEL_CTRL_DB_MSK
#define ADF4377_DEL_CTRL_DB_MSK
Definition adf4377.h:449

◆ ADF4377_DEL_CTRL_DB_MSK

#define ADF4377_DEL_CTRL_DB_MSK   NO_OS_BIT(7)

◆ ADF4377_EN_ADC

#define ADF4377_EN_ADC ( x)
Value:
no_os_field_prep(ADF4377_EN_ADC_MSK, x)
ADF4377_EN_ADC_MSK
#define ADF4377_EN_ADC_MSK
Definition adf4377.h:464

◆ ADF4377_EN_ADC_CLK

#define ADF4377_EN_ADC_CLK ( x)
Value:
no_os_field_prep(ADF4377_EN_ADC_CLK_MSK, x)
ADF4377_EN_ADC_CLK_MSK
#define ADF4377_EN_ADC_CLK_MSK
Definition adf4377.h:396

◆ ADF4377_EN_ADC_CLK_MSK

#define ADF4377_EN_ADC_CLK_MSK   NO_OS_BIT(3)

◆ ADF4377_EN_ADC_CNV

#define ADF4377_EN_ADC_CNV ( x)
Value:
no_os_field_prep(ADF4377_EN_ADC_CNV_MSK, x)
ADF4377_EN_ADC_CNV_MSK
#define ADF4377_EN_ADC_CNV_MSK
Definition adf4377.h:462

◆ ADF4377_EN_ADC_CNV_MSK

#define ADF4377_EN_ADC_CNV_MSK   NO_OS_BIT(7)

◆ ADF4377_EN_ADC_MSK

#define ADF4377_EN_ADC_MSK   NO_OS_BIT(1)

◆ ADF4377_EN_AUTOCAL

#define ADF4377_EN_AUTOCAL ( x)
Value:
no_os_field_prep(ADF4377_EN_AUTOCAL_MSK, x)
ADF4377_EN_AUTOCAL_MSK
#define ADF4377_EN_AUTOCAL_MSK
Definition adf4377.h:123

◆ ADF4377_EN_AUTOCAL_MSK

#define ADF4377_EN_AUTOCAL_MSK   NO_OS_BIT(7)

◆ ADF4377_EN_BLEED

#define ADF4377_EN_BLEED ( x)
Value:
no_os_field_prep(ADF4377_EN_BLEED_MSK, x)
ADF4377_EN_BLEED_MSK
#define ADF4377_EN_BLEED_MSK
Definition adf4377.h:187

◆ ADF4377_EN_BLEED_MSK

#define ADF4377_EN_BLEED_MSK   NO_OS_BIT(4)

◆ ADF4377_EN_CLK1

#define ADF4377_EN_CLK1 ( x)
Value:
no_os_field_prep(ADF4377_EN_CLK1_MSK, x)
ADF4377_EN_CLK1_MSK
#define ADF4377_EN_CLK1_MSK
Definition adf4377.h:552

◆ ADF4377_EN_CLK1_MSK

#define ADF4377_EN_CLK1_MSK   NO_OS_BIT(6)

◆ ADF4377_EN_CLK2

#define ADF4377_EN_CLK2 ( x)
Value:
no_os_field_prep(ADF4377_EN_CLK2_MSK, x)
ADF4377_EN_CLK2_MSK
#define ADF4377_EN_CLK2_MSK
Definition adf4377.h:550

◆ ADF4377_EN_CLK2_MSK

#define ADF4377_EN_CLK2_MSK   NO_OS_BIT(7)

◆ ADF4377_EN_CPTEST

#define ADF4377_EN_CPTEST ( x)
Value:
no_os_field_prep(ADF4377_EN_CPTEST_MSK, x)
ADF4377_EN_CPTEST_MSK
#define ADF4377_EN_CPTEST_MSK
Definition adf4377.h:349

◆ ADF4377_EN_CPTEST_MSK

#define ADF4377_EN_CPTEST_MSK   NO_OS_BIT(2)

◆ ADF4377_EN_CPTEST_OFF

#define ADF4377_EN_CPTEST_OFF   0x0

◆ ADF4377_EN_CPTEST_ON

#define ADF4377_EN_CPTEST_ON   0x1

◆ ADF4377_EN_DNCLK

#define ADF4377_EN_DNCLK ( x)
Value:
no_os_field_prep(ADF4377_EN_DNCLK_MSK, x)
ADF4377_EN_DNCLK_MSK
#define ADF4377_EN_DNCLK_MSK
Definition adf4377.h:327

◆ ADF4377_EN_DNCLK_MSK

#define ADF4377_EN_DNCLK_MSK   NO_OS_BIT(7)

◆ ADF4377_EN_DNCLK_OFF

#define ADF4377_EN_DNCLK_OFF   0x0

◆ ADF4377_EN_DNCLK_ON

#define ADF4377_EN_DNCLK_ON   0x1

◆ ADF4377_EN_DRCLK

#define ADF4377_EN_DRCLK ( x)
Value:
no_os_field_prep(ADF4377_EN_DRCLK_MSK, x)
ADF4377_EN_DRCLK_MSK
#define ADF4377_EN_DRCLK_MSK
Definition adf4377.h:329

◆ ADF4377_EN_DRCLK_MSK

#define ADF4377_EN_DRCLK_MSK   NO_OS_BIT(6)

◆ ADF4377_EN_DRCLK_OFF

#define ADF4377_EN_DRCLK_OFF   0x0

◆ ADF4377_EN_DRCLK_ON

#define ADF4377_EN_DRCLK_ON   0x1

◆ ADF4377_EN_LDWIN

#define ADF4377_EN_LDWIN ( x)
Value:
no_os_field_prep(ADF4377_EN_LDWIN_MSK, x)
ADF4377_EN_LDWIN_MSK
#define ADF4377_EN_LDWIN_MSK
Definition adf4377.h:316

◆ ADF4377_EN_LDWIN_MSK

#define ADF4377_EN_LDWIN_MSK   NO_OS_BIT(5)

◆ ADF4377_EN_LOL

#define ADF4377_EN_LOL ( x)
Value:
no_os_field_prep(ADF4377_EN_LOL_MSK, x)
ADF4377_EN_LOL_MSK
#define ADF4377_EN_LOL_MSK
Definition adf4377.h:312

◆ ADF4377_EN_LOL_MSK

#define ADF4377_EN_LOL_MSK   NO_OS_BIT(7)

◆ ADF4377_EN_RDBLR

#define ADF4377_EN_RDBLR ( x)
Value:
no_os_field_prep(ADF4377_EN_RDBLR_MSK, x)
ADF4377_EN_RDBLR_MSK
#define ADF4377_EN_RDBLR_MSK
Definition adf4377.h:125

◆ ADF4377_EN_RDBLR_MSK

#define ADF4377_EN_RDBLR_MSK   NO_OS_BIT(6)

◆ ADF4377_FILT_REF

#define ADF4377_FILT_REF ( x)
Value:
no_os_field_prep(ADF4377_FILT_REF_MSK, x)
ADF4377_FILT_REF_MSK
#define ADF4377_FILT_REF_MSK
Definition adf4377.h:376

◆ ADF4377_FILT_REF_MSK

#define ADF4377_FILT_REF_MSK   NO_OS_BIT(6)

◆ ADF4377_FILT_REF_OFF

#define ADF4377_FILT_REF_OFF   0x0

◆ ADF4377_FILT_REF_ON

#define ADF4377_FILT_REF_ON   0x1

◆ ADF4377_FREQ_PFD_125MHZ

#define ADF4377_FREQ_PFD_125MHZ   125000000

◆ ADF4377_FREQ_PFD_160MHZ

#define ADF4377_FREQ_PFD_160MHZ   160000000

◆ ADF4377_FREQ_PFD_250MHZ

#define ADF4377_FREQ_PFD_250MHZ   250000000

◆ ADF4377_FREQ_PFD_320MHZ

#define ADF4377_FREQ_PFD_320MHZ   320000000

◆ ADF4377_FREQ_PFD_80MHZ

#define ADF4377_FREQ_PFD_80MHZ   80000000

◆ ADF4377_FSM_BUSY

#define ADF4377_FSM_BUSY ( x)
Value:
no_os_field_prep(ADF4377_FSM_BUSY_MSK, x)
ADF4377_FSM_BUSY_MSK
#define ADF4377_FSM_BUSY_MSK
Definition adf4377.h:558

◆ ADF4377_FSM_BUSY_MSK

#define ADF4377_FSM_BUSY_MSK   NO_OS_BIT(1)

◆ ADF4377_INV_CLKOUT

#define ADF4377_INV_CLKOUT ( x)
Value:
no_os_field_prep(ADF4377_INV_CLKOUT_MSK, x)
ADF4377_INV_CLKOUT_MSK
#define ADF4377_INV_CLKOUT_MSK
Definition adf4377.h:218

◆ ADF4377_INV_CLKOUT_MSK

#define ADF4377_INV_CLKOUT_MSK   NO_OS_BIT(7)

◆ ADF4377_INV_SR

#define ADF4377_INV_SR ( x)
Value:
no_os_field_prep(ADF4377_INV_SR_MSK, x)
ADF4377_INV_SR_MSK
#define ADF4377_INV_SR_MSK
Definition adf4377.h:540

◆ ADF4377_INV_SR_MSK

#define ADF4377_INV_SR_MSK   NO_OS_BIT(7)

◆ ADF4377_LD_COUNT

#define ADF4377_LD_COUNT ( x)
Value:
no_os_field_prep(ADF4377_LD_COUNT_MSK, x)
ADF4377_LD_COUNT_MSK
#define ADF4377_LD_COUNT_MSK
Definition adf4377.h:318

◆ ADF4377_LD_COUNT_MSK

#define ADF4377_LD_COUNT_MSK   NO_OS_GENMASK(4, 0)

◆ ADF4377_LDWIN_PW

#define ADF4377_LDWIN_PW ( x)
Value:
no_os_field_prep(ADF4377_LDWIN_PW_MSK, x)
ADF4377_LDWIN_PW_MSK
#define ADF4377_LDWIN_PW_MSK
Definition adf4377.h:314

◆ ADF4377_LDWIN_PW_MSK

#define ADF4377_LDWIN_PW_MSK   NO_OS_BIT(6)

◆ ADF4377_LDWIN_PW_NARROW

#define ADF4377_LDWIN_PW_NARROW   0x0

◆ ADF4377_LDWIN_PW_WIDE

#define ADF4377_LDWIN_PW_WIDE   0x1

◆ ADF4377_LKD_DELAY_US

#define ADF4377_LKD_DELAY_US   5000

◆ ADF4377_LOCKED

#define ADF4377_LOCKED ( x)
Value:
no_os_field_prep(ADF4377_LOCKED_MSK, x)
ADF4377_LOCKED_MSK
#define ADF4377_LOCKED_MSK
Definition adf4377.h:560

◆ ADF4377_LOCKED_MSK

#define ADF4377_LOCKED_MSK   NO_OS_BIT(0)

◆ ADF4377_LSB_FIRST

#define ADF4377_LSB_FIRST ( x)
Value:
no_os_field_prep(ADF4377_LSB_FIRST_MSK, x)
ADF4377_LSB_FIRST_MSK
#define ADF4377_LSB_FIRST_MSK
Definition adf4377.h:55

◆ ADF4377_LSB_FIRST_LSB

#define ADF4377_LSB_FIRST_LSB   0x1

◆ ADF4377_LSB_FIRST_MSB

#define ADF4377_LSB_FIRST_MSB   0x0

◆ ADF4377_LSB_FIRST_MSK

#define ADF4377_LSB_FIRST_MSK   NO_OS_BIT(1)

◆ ADF4377_LSB_FIRST_R

#define ADF4377_LSB_FIRST_R ( x)
Value:
no_os_field_prep(ADF4377_LSB_FIRST_R_MSK, x)
ADF4377_LSB_FIRST_R_MSK
#define ADF4377_LSB_FIRST_R_MSK
Definition adf4377.h:53

◆ ADF4377_LSB_FIRST_R_MSK

#define ADF4377_LSB_FIRST_R_MSK   NO_OS_BIT(6)

◆ ADF4377_M_VCO_0

#define ADF4377_M_VCO_0   0x0

◆ ADF4377_M_VCO_1

#define ADF4377_M_VCO_1   0x1

◆ ADF4377_M_VCO_2

#define ADF4377_M_VCO_2   0x2

◆ ADF4377_M_VCO_3

#define ADF4377_M_VCO_3   0x3

◆ ADF4377_M_VCO_BAND

#define ADF4377_M_VCO_BAND ( x)
Value:
no_os_field_prep(ADF4377_M_VCO_BAND_MSK, x)
ADF4377_M_VCO_BAND_MSK
#define ADF4377_M_VCO_BAND_MSK
Definition adf4377.h:175

◆ ADF4377_M_VCO_BAND_MSK

#define ADF4377_M_VCO_BAND_MSK   NO_OS_GENMASK(7,0)

◆ ADF4377_M_VCO_BIAS

#define ADF4377_M_VCO_BIAS ( x)
Value:
no_os_field_prep(ADF4377_M_VCO_BIAS_MSK, x)
ADF4377_M_VCO_BIAS_MSK
#define ADF4377_M_VCO_BIAS_MSK
Definition adf4377.h:162

◆ ADF4377_M_VCO_BIAS_MSK

#define ADF4377_M_VCO_BIAS_MSK   NO_OS_GENMASK(3,0)

◆ ADF4377_M_VCO_CORE

#define ADF4377_M_VCO_CORE ( x)
Value:
no_os_field_prep(ADF4377_M_VCO_CORE_MSK, x)
ADF4377_M_VCO_CORE_MSK
#define ADF4377_M_VCO_CORE_MSK
Definition adf4377.h:160

◆ ADF4377_M_VCO_CORE_MSK

#define ADF4377_M_VCO_CORE_MSK   NO_OS_GENMASK(5,4)

◆ ADF4377_MASTER_RB_CTRL

#define ADF4377_MASTER_RB_CTRL ( x)
Value:
no_os_field_prep(ADF4377_MASTER_RB_CTRL_MSK, x)
ADF4377_MASTER_RB_CTRL_MSK
#define ADF4377_MASTER_RB_CTRL_MSK
Definition adf4377.h:83

◆ ADF4377_MASTER_RB_CTRL_MSK

#define ADF4377_MASTER_RB_CTRL_MSK   NO_OS_BIT(5)

◆ ADF4377_MAX_CLKPN_FREQ

#define ADF4377_MAX_CLKPN_FREQ   ADF4377_MAX_VCO_FREQ /* Hz */

◆ ADF4377_MAX_FREQ_PFD

#define ADF4377_MAX_FREQ_PFD   500000000 /* Hz */

◆ ADF4377_MAX_REFIN_FREQ

#define ADF4377_MAX_REFIN_FREQ   1000000000 /* Hz */

◆ ADF4377_MAX_VCO_FREQ

#define ADF4377_MAX_VCO_FREQ   12800000000ull /* Hz */

◆ ADF4377_MIN_CLKPN_FREQ

#define ADF4377_MIN_CLKPN_FREQ   (ADF4377_MIN_VCO_FREQ / 8) /* Hz */

◆ ADF4377_MIN_FREQ_PFD

#define ADF4377_MIN_FREQ_PFD   3000000 /* Hz */

◆ ADF4377_MIN_R_DIV

#define ADF4377_MIN_R_DIV   0x00

◆ ADF4377_MIN_REFIN_FREQ

#define ADF4377_MIN_REFIN_FREQ   10000000 /* Hz */

◆ ADF4377_MIN_VCO_FREQ

#define ADF4377_MIN_VCO_FREQ   6400000000ull /* Hz */

◆ ADF4377_MUXOUT

#define ADF4377_MUXOUT ( x)
Value:
no_os_field_prep(ADF4377_MUXOUT_MSK, x)
ADF4377_MUXOUT_MSK
#define ADF4377_MUXOUT_MSK
Definition adf4377.h:347

◆ ADF4377_MUXOUT_DIV_NCLK_2

#define ADF4377_MUXOUT_DIV_NCLK_2   0x5

◆ ADF4377_MUXOUT_DIV_RCLK_2

#define ADF4377_MUXOUT_DIV_RCLK_2   0x4

◆ ADF4377_MUXOUT_HIGH

#define ADF4377_MUXOUT_HIGH   0x8

◆ ADF4377_MUXOUT_HIGH_Z

#define ADF4377_MUXOUT_HIGH_Z   0x0

◆ ADF4377_MUXOUT_LKDET

#define ADF4377_MUXOUT_LKDET   0x1

◆ ADF4377_MUXOUT_LOW

#define ADF4377_MUXOUT_LOW   0x2

◆ ADF4377_MUXOUT_MSK

#define ADF4377_MUXOUT_MSK   NO_OS_GENMASK(7, 4)

◆ ADF4377_N_DEL

#define ADF4377_N_DEL ( x)
Value:
no_os_field_prep(ADF4377_N_DEL_MSK, x)
ADF4377_N_DEL_MSK
#define ADF4377_N_DEL_MSK
Definition adf4377.h:220

◆ ADF4377_N_DEL_MSK

#define ADF4377_N_DEL_MSK   NO_OS_GENMASK(6, 0)

◆ ADF4377_N_INT_LSB

#define ADF4377_N_INT_LSB ( x)
Value:
no_os_field_prep(ADF4377_N_INT_LSB_MSK, x)
ADF4377_N_INT_LSB_MSK
#define ADF4377_N_INT_LSB_MSK
Definition adf4377.h:119

◆ ADF4377_N_INT_LSB_MSK

#define ADF4377_N_INT_LSB_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_N_INT_MSB

#define ADF4377_N_INT_MSB ( x)
Value:
no_os_field_prep(ADF4377_N_INT_MSB_MSK, x)
ADF4377_N_INT_MSB_MSK
#define ADF4377_N_INT_MSB_MSK
Definition adf4377.h:129

◆ ADF4377_N_INT_MSB_MSK

#define ADF4377_N_INT_MSB_MSK   NO_OS_GENMASK(3,0)

◆ ADF4377_O_VCO_BAND

#define ADF4377_O_VCO_BAND ( x)
Value:
no_os_field_prep(ADF4377_O_VCO_BAND_MSK, x)
ADF4377_O_VCO_BAND_MSK
#define ADF4377_O_VCO_BAND_MSK
Definition adf4377.h:509

◆ ADF4377_O_VCO_BAND_M_VCO

#define ADF4377_O_VCO_BAND_M_VCO   0x1

◆ ADF4377_O_VCO_BAND_MSK

#define ADF4377_O_VCO_BAND_MSK   NO_OS_BIT(3)

◆ ADF4377_O_VCO_BAND_VCO_CALIB

#define ADF4377_O_VCO_BAND_VCO_CALIB   0x0

◆ ADF4377_O_VCO_BIAS

#define ADF4377_O_VCO_BIAS ( x)
Value:
no_os_field_prep(ADF4377_O_VCO_BIAS_MSK, x)
ADF4377_O_VCO_BIAS_MSK
#define ADF4377_O_VCO_BIAS_MSK
Definition adf4377.h:513

◆ ADF4377_O_VCO_BIAS_M_VCO

#define ADF4377_O_VCO_BIAS_M_VCO   0x1

◆ ADF4377_O_VCO_BIAS_MSK

#define ADF4377_O_VCO_BIAS_MSK   NO_OS_BIT(1)

◆ ADF4377_O_VCO_BIAS_VCO_CALIB

#define ADF4377_O_VCO_BIAS_VCO_CALIB   0x0

◆ ADF4377_O_VCO_CORE

#define ADF4377_O_VCO_CORE ( x)
Value:
no_os_field_prep(ADF4377_O_VCO_CORE_MSK, x)
ADF4377_O_VCO_CORE_MSK
#define ADF4377_O_VCO_CORE_MSK
Definition adf4377.h:511

◆ ADF4377_O_VCO_CORE_M_VCO

#define ADF4377_O_VCO_CORE_M_VCO   0x1

◆ ADF4377_O_VCO_CORE_MSK

#define ADF4377_O_VCO_CORE_MSK   NO_OS_BIT(2)

◆ ADF4377_O_VCO_CORE_VCO_CALIB

#define ADF4377_O_VCO_CORE_VCO_CALIB   0x0

◆ ADF4377_O_VCO_DB

#define ADF4377_O_VCO_DB ( x)
Value:
no_os_field_prep(ADF4377_O_VCO_DB_MSK, x)
ADF4377_O_VCO_DB_MSK
#define ADF4377_O_VCO_DB_MSK
Definition adf4377.h:439

◆ ADF4377_O_VCO_DB_MSK

#define ADF4377_O_VCO_DB_MSK   NO_OS_BIT(7)

◆ ADF4377_OUT_PWR_MAX

#define ADF4377_OUT_PWR_MAX   ADF4377_CLKOUT_DIV_REG_VAL_MAX

◆ ADF4377_PD_ADC

#define ADF4377_PD_ADC ( x)
Value:
no_os_field_prep(ADF4377_PD_ADC_MSK, x)
ADF4377_PD_ADC_MSK
#define ADF4377_PD_ADC_MSK
Definition adf4377.h:245

◆ ADF4377_PD_ADC_MSK

#define ADF4377_PD_ADC_MSK   NO_OS_BIT(1)

◆ ADF4377_PD_ADC_N_OP

#define ADF4377_PD_ADC_N_OP   0x0

◆ ADF4377_PD_ADC_PD

#define ADF4377_PD_ADC_PD   0x1

◆ ADF4377_PD_ALL

#define ADF4377_PD_ALL ( x)
Value:
no_os_field_prep(ADF4377_PD_ALL_MSK, x)
ADF4377_PD_ALL_MSK
#define ADF4377_PD_ALL_MSK
Definition adf4377.h:269

◆ ADF4377_PD_ALL_MSK

#define ADF4377_PD_ALL_MSK   NO_OS_BIT(7)

◆ ADF4377_PD_ALL_N_OP

#define ADF4377_PD_ALL_N_OP   0x0

◆ ADF4377_PD_ALL_PD

#define ADF4377_PD_ALL_PD   0x1

◆ ADF4377_PD_CALADC

#define ADF4377_PD_CALADC ( x)
Value:
no_os_field_prep(ADF4377_PD_CALADC_MSK, x)
ADF4377_PD_CALADC_MSK
#define ADF4377_PD_CALADC_MSK
Definition adf4377.h:247

◆ ADF4377_PD_CALADC_MSK

#define ADF4377_PD_CALADC_MSK   NO_OS_BIT(0)

◆ ADF4377_PD_CALADC_N_OP

#define ADF4377_PD_CALADC_N_OP   0x0

◆ ADF4377_PD_CALADC_PD

#define ADF4377_PD_CALADC_PD   0x1

◆ ADF4377_PD_CLK

#define ADF4377_PD_CLK ( x)
Value:
no_os_field_prep(ADF4377_PD_CLK_MSK, x)
ADF4377_PD_CLK_MSK
#define ADF4377_PD_CLK_MSK
Definition adf4377.h:241

◆ ADF4377_PD_CLK_MSK

#define ADF4377_PD_CLK_MSK   NO_OS_BIT(3)

◆ ADF4377_PD_CLK_N_OP

#define ADF4377_PD_CLK_N_OP   0x0

◆ ADF4377_PD_CLK_PD

#define ADF4377_PD_CLK_PD   0x1

◆ ADF4377_PD_CLKOUT1

#define ADF4377_PD_CLKOUT1 ( x)
Value:
no_os_field_prep(ADF4377_PD_CLKOUT1_MSK, x)
ADF4377_PD_CLKOUT1_MSK
#define ADF4377_PD_CLKOUT1_MSK
Definition adf4377.h:281

◆ ADF4377_PD_CLKOUT1_MSK

#define ADF4377_PD_CLKOUT1_MSK   NO_OS_BIT(1)

◆ ADF4377_PD_CLKOUT1_N_OP

#define ADF4377_PD_CLKOUT1_N_OP   0x0

◆ ADF4377_PD_CLKOUT1_PD

#define ADF4377_PD_CLKOUT1_PD   0x1

◆ ADF4377_PD_CLKOUT2

#define ADF4377_PD_CLKOUT2 ( x)
Value:
no_os_field_prep(ADF4377_PD_CLKOUT2_MSK, x)
ADF4377_PD_CLKOUT2_MSK
#define ADF4377_PD_CLKOUT2_MSK
Definition adf4377.h:283

◆ ADF4377_PD_CLKOUT2_MSK

#define ADF4377_PD_CLKOUT2_MSK   NO_OS_BIT(0)

◆ ADF4377_PD_CLKOUT2_N_OP

#define ADF4377_PD_CLKOUT2_N_OP   0x0

◆ ADF4377_PD_CLKOUT2_PD

#define ADF4377_PD_CLKOUT2_PD   0x1

◆ ADF4377_PD_LD

#define ADF4377_PD_LD ( x)
Value:
no_os_field_prep(ADF4377_PD_LD_MSK, x)
ADF4377_PD_LD_MSK
#define ADF4377_PD_LD_MSK
Definition adf4377.h:277

◆ ADF4377_PD_LD_MSK

#define ADF4377_PD_LD_MSK   NO_OS_BIT(3)

◆ ADF4377_PD_LD_N_OP

#define ADF4377_PD_LD_N_OP   0x0

◆ ADF4377_PD_LD_PD

#define ADF4377_PD_LD_PD   0x1

◆ ADF4377_PD_NDIV

#define ADF4377_PD_NDIV ( x)
Value:
no_os_field_prep(ADF4377_PD_NDIV_MSK, x)
ADF4377_PD_NDIV_MSK
#define ADF4377_PD_NDIV_MSK
Definition adf4377.h:273

◆ ADF4377_PD_NDIV_MSK

#define ADF4377_PD_NDIV_MSK   NO_OS_BIT(5)

◆ ADF4377_PD_NDIV_N_OP

#define ADF4377_PD_NDIV_N_OP   0x0

◆ ADF4377_PD_NDIV_PD

#define ADF4377_PD_NDIV_PD   0x1

◆ ADF4377_PD_PFDCP

#define ADF4377_PD_PFDCP ( x)
Value:
no_os_field_prep(ADF4377_PD_PFDCP_MSK, x)
ADF4377_PD_PFDCP_MSK
#define ADF4377_PD_PFDCP_MSK
Definition adf4377.h:279

◆ ADF4377_PD_PFDCP_MSK

#define ADF4377_PD_PFDCP_MSK   NO_OS_BIT(2)

◆ ADF4377_PD_PFDCP_N_OP

#define ADF4377_PD_PFDCP_N_OP   0x0

◆ ADF4377_PD_PFDCP_PD

#define ADF4377_PD_PFDCP_PD   0x1

◆ ADF4377_PD_RDET

#define ADF4377_PD_RDET ( x)
Value:
no_os_field_prep(ADF4377_PD_RDET_MSK, x)
ADF4377_PD_RDET_MSK
#define ADF4377_PD_RDET_MSK
Definition adf4377.h:243

◆ ADF4377_PD_RDET_MSK

#define ADF4377_PD_RDET_MSK   NO_OS_BIT(2)

◆ ADF4377_PD_RDET_N_OP

#define ADF4377_PD_RDET_N_OP   0x0

◆ ADF4377_PD_RDET_PD

#define ADF4377_PD_RDET_PD   0x1

◆ ADF4377_PD_RDIV

#define ADF4377_PD_RDIV ( x)
Value:
no_os_field_prep(ADF4377_PD_RDIV_MSK, x)
ADF4377_PD_RDIV_MSK
#define ADF4377_PD_RDIV_MSK
Definition adf4377.h:271

◆ ADF4377_PD_RDIV_MSK

#define ADF4377_PD_RDIV_MSK   NO_OS_BIT(6)

◆ ADF4377_PD_RDIV_N_OP

#define ADF4377_PD_RDIV_N_OP   0x0

◆ ADF4377_PD_RDIV_PD

#define ADF4377_PD_RDIV_PD   0x1

◆ ADF4377_PD_SR_MON

#define ADF4377_PD_SR_MON ( x)
Value:
no_os_field_prep(ADF4377_PD_SR_MON_MSK, x)
ADF4377_PD_SR_MON_MSK
#define ADF4377_PD_SR_MON_MSK
Definition adf4377.h:528

◆ ADF4377_PD_SR_MON_MSK

#define ADF4377_PD_SR_MON_MSK   NO_OS_BIT(6)

◆ ADF4377_PD_VCO

#define ADF4377_PD_VCO ( x)
Value:
no_os_field_prep(ADF4377_PD_VCO_MSK, x)
ADF4377_PD_VCO_MSK
#define ADF4377_PD_VCO_MSK
Definition adf4377.h:275

◆ ADF4377_PD_VCO_MSK

#define ADF4377_PD_VCO_MSK   NO_OS_BIT(4)

◆ ADF4377_PD_VCO_N_OP

#define ADF4377_PD_VCO_N_OP   0x0

◆ ADF4377_PD_VCO_PD

#define ADF4377_PD_VCO_PD   0x1

◆ ADF4377_POR_DELAY_US

#define ADF4377_POR_DELAY_US   200

◆ ADF4377_PRODUCT_ID_LSB

#define ADF4377_PRODUCT_ID_LSB   0x0005

◆ ADF4377_PRODUCT_ID_MSB

#define ADF4377_PRODUCT_ID_MSB   0x0005

◆ ADF4377_R00F_RSV1

#define ADF4377_R00F_RSV1   0x14

◆ ADF4377_R01C_RSV1

#define ADF4377_R01C_RSV1 ( x)
Value:
no_os_field_prep(ADF4377_R01C_RSV1_MSK, x)
ADF4377_R01C_RSV1_MSK
#define ADF4377_R01C_RSV1_MSK
Definition adf4377.h:333

◆ ADF4377_R01C_RSV1_MSK

#define ADF4377_R01C_RSV1_MSK   NO_OS_BIT(0)

◆ ADF4377_R01F_RSV1

#define ADF4377_R01F_RSV1 ( x)
Value:
no_os_field_prep(ADF4377_R01F_RSV1_MSK, x)
ADF4377_R01F_RSV1_MSK
#define ADF4377_R01F_RSV1_MSK
Definition adf4377.h:380

◆ ADF4377_R01F_RSV1_MSK

#define ADF4377_R01F_RSV1_MSK   NO_OS_GENMASK(2, 0)

◆ ADF4377_R020_RSV1

#define ADF4377_R020_RSV1 ( x)
Value:
no_os_field_prep(ADF4377_R020_RSV1_MSK, x)
ADF4377_R020_RSV1_MSK
#define ADF4377_R020_RSV1_MSK
Definition adf4377.h:398

◆ ADF4377_R020_RSV1_MSK

#define ADF4377_R020_RSV1_MSK   NO_OS_BIT(0)

◆ ADF4377_R021_RSV1

#define ADF4377_R021_RSV1   0xD3

◆ ADF4377_R022_RSV1

#define ADF4377_R022_RSV1   0x32

◆ ADF4377_R023_RSV1

#define ADF4377_R023_RSV1   0x18

◆ ADF4377_R025_RSV1

#define ADF4377_R025_RSV1 ( x)
Value:
no_os_field_prep(ADF4377_R025_RSV1_MSK, x)
ADF4377_R025_RSV1_MSK
#define ADF4377_R025_RSV1_MSK
Definition adf4377.h:423

◆ ADF4377_R025_RSV1_MSK

#define ADF4377_R025_RSV1_MSK   NO_OS_BIT(4) | NO_OS_BIT(2) | NO_OS_BIT(1)

◆ ADF4377_R02C_RSV1

#define ADF4377_R02C_RSV1   0xC0

◆ ADF4377_R031_RSV1

#define ADF4377_R031_RSV1   0x09

◆ ADF4377_R032_RSV1

#define ADF4377_R032_RSV1 ( x)
Value:
no_os_field_prep(ADF4377_R032_RSV1_MSK, x)
ADF4377_R032_RSV1_MSK
#define ADF4377_R032_RSV1_MSK
Definition adf4377.h:489

◆ ADF4377_R032_RSV1_MSK

#define ADF4377_R032_RSV1_MSK   NO_OS_BIT(3) | NO_OS_BIT(0)

◆ ADF4377_R033_RSV1

#define ADF4377_R033_RSV1   0x18

◆ ADF4377_R034_RSV1

#define ADF4377_R034_RSV1   0x08

◆ ADF4377_R03A_RSV1

#define ADF4377_R03A_RSV1   0x5C

◆ ADF4377_R03B_RSV1

#define ADF4377_R03B_RSV1   0x2B

◆ ADF4377_R042_RSV1

#define ADF4377_R042_RSV1   0x05

◆ ADF4377_R042_RSV1_MSK

#define ADF4377_R042_RSV1_MSK   NO_OS_GENMASK(3, 0)

◆ ADF4377_R042_RSV5_MSK

#define ADF4377_R042_RSV5_MSK   NO_OS_BIT(7)

◆ ADF4377_R_DEL

#define ADF4377_R_DEL ( x)
Value:
no_os_field_prep(ADF4377_R_DEL_MSK, x)
ADF4377_R_DEL_MSK
#define ADF4377_R_DEL_MSK
Definition adf4377.h:226

◆ ADF4377_R_DEL_MSK

#define ADF4377_R_DEL_MSK   NO_OS_GENMASK(6, 0)

◆ ADF4377_R_DIV

#define ADF4377_R_DIV ( x)
Value:
no_os_field_prep(ADF4377_R_DIV_MSK, x)
ADF4377_R_DIV_MSK
#define ADF4377_R_DIV_MSK
Definition adf4377.h:147

◆ ADF4377_R_DIV_MSK

#define ADF4377_R_DIV_MSK   NO_OS_GENMASK(5, 0)

◆ ADF4377_R_N_DEL_MAX

#define ADF4377_R_N_DEL_MAX   0x7F

◆ ADF4377_R_N_DEL_MIN

#define ADF4377_R_N_DEL_MIN   0x00

◆ ADF4377_RB_MASTER_REG

#define ADF4377_RB_MASTER_REG   0x1

◆ ADF4377_RB_SLAVE_REG

#define ADF4377_RB_SLAVE_REG   0x0

◆ ADF4377_REF_DBLR_DIS

#define ADF4377_REF_DBLR_DIS   0x0

◆ ADF4377_REF_DBLR_EN

#define ADF4377_REF_DBLR_EN   0x1

◆ ADF4377_REF_DIV_MAX

#define ADF4377_REF_DIV_MAX   63

◆ ADF4377_REF_OK

#define ADF4377_REF_OK ( x)
Value:
no_os_field_prep(ADF4377_REF_OK_MSK, x)
ADF4377_REF_OK_MSK
#define ADF4377_REF_OK_MSK
Definition adf4377.h:554

◆ ADF4377_REF_OK_MSK

#define ADF4377_REF_OK_MSK   NO_OS_BIT(3)

◆ ADF4377_REF_SEL

#define ADF4377_REF_SEL ( x)
Value:
no_os_field_prep(ADF4377_REF_SEL_MSK, x)
ADF4377_REF_SEL_MSK
#define ADF4377_REF_SEL_MSK
Definition adf4377.h:378

◆ ADF4377_REF_SEL_DMA

#define ADF4377_REF_SEL_DMA   0x0

◆ ADF4377_REF_SEL_LNA

#define ADF4377_REF_SEL_LNA   0x1

◆ ADF4377_REF_SEL_MSK

#define ADF4377_REF_SEL_MSK   NO_OS_BIT(5)

◆ ADF4377_REG

#define ADF4377_REG ( x)
Value:
(x)

◆ ADF4377_RESET_CMD

#define ADF4377_RESET_CMD   0x81

◆ ADF4377_RFOUT_MAX

#define ADF4377_RFOUT_MAX   12800000000U

◆ ADF4377_RFOUT_MIN

#define ADF4377_RFOUT_MIN   800000000U

◆ ADF4377_RST_LD

#define ADF4377_RST_LD ( x)
Value:
no_os_field_prep(ADF4377_RST_LD_MSK, x)
ADF4377_RST_LD_MSK
#define ADF4377_RST_LD_MSK
Definition adf4377.h:331

◆ ADF4377_RST_LD_ACTIVE

#define ADF4377_RST_LD_ACTIVE   0x1

◆ ADF4377_RST_LD_INACTIVE

#define ADF4377_RST_LD_INACTIVE   0x0

◆ ADF4377_RST_LD_MSK

#define ADF4377_RST_LD_MSK   NO_OS_BIT(2)

◆ ADF4377_RST_SR_MON

#define ADF4377_RST_SR_MON ( x)
Value:
no_os_field_prep(ADF4377_RST_SR_MON_MSK, x)
ADF4377_RST_SR_MON_MSK
#define ADF4377_RST_SR_MON_MSK
Definition adf4377.h:532

◆ ADF4377_RST_SR_MON_MSK

#define ADF4377_RST_SR_MON_MSK   NO_OS_BIT(4)

◆ ADF4377_RST_SYS

#define ADF4377_RST_SYS ( x)
Value:
no_os_field_prep(ADF4377_RST_SYS_MSK, x)
ADF4377_RST_SYS_MSK
#define ADF4377_RST_SYS_MSK
Definition adf4377.h:394

◆ ADF4377_RST_SYS_ACTIVE

#define ADF4377_RST_SYS_ACTIVE   0x1

◆ ADF4377_RST_SYS_INACTIVE

#define ADF4377_RST_SYS_INACTIVE   0x0

◆ ADF4377_RST_SYS_MSK

#define ADF4377_RST_SYS_MSK   NO_OS_BIT(4)

◆ ADF4377_SCRATCHPAD

#define ADF4377_SCRATCHPAD ( x)
Value:
no_os_field_prep(ADF4377_SCRATCHPAD_MSK, x)
ADF4377_SCRATCHPAD_MSK
#define ADF4377_SCRATCHPAD_MSK
Definition adf4377.h:103

◆ ADF4377_SCRATCHPAD_MSK

#define ADF4377_SCRATCHPAD_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_SDO_ACTIVE

#define ADF4377_SDO_ACTIVE ( x)
Value:
no_os_field_prep(ADF4377_SDO_ACTIVE_MSK, x)
ADF4377_SDO_ACTIVE_MSK
#define ADF4377_SDO_ACTIVE_MSK
Definition adf4377.h:63

◆ ADF4377_SDO_ACTIVE_MSK

#define ADF4377_SDO_ACTIVE_MSK   NO_OS_BIT(3)

◆ ADF4377_SDO_ACTIVE_R

#define ADF4377_SDO_ACTIVE_R ( x)
Value:
no_os_field_prep(ADF4377_SDO_ACTIVE_R_MSK, x)
ADF4377_SDO_ACTIVE_R_MSK
#define ADF4377_SDO_ACTIVE_R_MSK
Definition adf4377.h:61

◆ ADF4377_SDO_ACTIVE_R_MSK

#define ADF4377_SDO_ACTIVE_R_MSK   NO_OS_BIT(4)

◆ ADF4377_SDO_ACTIVE_SPI_3W

#define ADF4377_SDO_ACTIVE_SPI_3W   0x0

◆ ADF4377_SDO_ACTIVE_SPI_4W

#define ADF4377_SDO_ACTIVE_SPI_4W   0x1

◆ ADF4377_SINGLE_INSTR

#define ADF4377_SINGLE_INSTR ( x)
Value:
no_os_field_prep(ADF4377_SINGLE_INSTRUCTION_MSK, x)

◆ ADF4377_SINGLE_INSTR_MSK

#define ADF4377_SINGLE_INSTR_MSK   NO_OS_BIT(7)

◆ ADF4377_SOFT_RESET

#define ADF4377_SOFT_RESET ( x)
Value:
no_os_field_prep(ADF4377_SOFT_RESET_MSK, x)
ADF4377_SOFT_RESET_MSK
#define ADF4377_SOFT_RESET_MSK
Definition adf4377.h:51

◆ ADF4377_SOFT_RESET_EN

#define ADF4377_SOFT_RESET_EN   0x1

◆ ADF4377_SOFT_RESET_MSK

#define ADF4377_SOFT_RESET_MSK   NO_OS_BIT(0)

◆ ADF4377_SOFT_RESET_N_OP

#define ADF4377_SOFT_RESET_N_OP   0x0

◆ ADF4377_SOFT_RESET_R

#define ADF4377_SOFT_RESET_R ( x)
Value:
no_os_field_prep(ADF4377_SOFT_RESET_R_MSK, x)
ADF4377_SOFT_RESET_R_MSK
#define ADF4377_SOFT_RESET_R_MSK
Definition adf4377.h:49

◆ ADF4377_SOFT_RESET_R_MSK

#define ADF4377_SOFT_RESET_R_MSK   NO_OS_BIT(7)

◆ ADF4377_SPI_4W_CFG

#define ADF4377_SPI_4W_CFG ( x)
Value:
(no_os_field_prep(ADF4377_SDO_ACTIVE_MSK, x) | \
no_os_field_prep(ADF4377_SDO_ACTIVE_R_MSK, x))

◆ ADF4377_SPI_DUMMY_DATA

#define ADF4377_SPI_DUMMY_DATA   0x00

◆ ADF4377_SPI_LSB_CFG

#define ADF4377_SPI_LSB_CFG ( x)
Value:
(no_os_field_prep(ADF4377_LSB_FIRST_MSK, x) | \
no_os_field_prep(ADF4377_LSB_FIRST_R_MSK, x))

◆ ADF4377_SPI_READ_CMD

#define ADF4377_SPI_READ_CMD   NO_OS_BIT(7)

◆ ADF4377_SPI_REVISION

#define ADF4377_SPI_REVISION   0x01

◆ ADF4377_SPI_SCRATCHPAD_TEST_A

#define ADF4377_SPI_SCRATCHPAD_TEST_A   0xA5u

◆ ADF4377_SPI_SCRATCHPAD_TEST_B

#define ADF4377_SPI_SCRATCHPAD_TEST_B   0x5Au

◆ ADF4377_SPI_STREAM_DIS

#define ADF4377_SPI_STREAM_DIS   0x1

◆ ADF4377_SPI_STREAM_EN

#define ADF4377_SPI_STREAM_EN   0x0

◆ ADF4377_SPI_WRITE_CMD

#define ADF4377_SPI_WRITE_CMD   0x0

◆ ADF4377_SR_DEL

#define ADF4377_SR_DEL ( x)
Value:
no_os_field_prep(ADF4377_SR_DEL_MSK, x)
ADF4377_SR_DEL_MSK
#define ADF4377_SR_DEL_MSK
Definition adf4377.h:542

◆ ADF4377_SR_DEL_MAX

#define ADF4377_SR_DEL_MAX   127

◆ ADF4377_SR_DEL_MSK

#define ADF4377_SR_DEL_MSK   NO_OS_GENMASK(6, 0)

◆ ADF4377_SR_MON_DELAY_US

#define ADF4377_SR_MON_DELAY_US   100U

◆ ADF4377_SR_SEL

#define ADF4377_SR_SEL ( x)
Value:
no_os_field_prep(ADF4377_SR_SEL_MSK, x)
ADF4377_SR_SEL_MSK
#define ADF4377_SR_SEL_MSK
Definition adf4377.h:530

◆ ADF4377_SR_SEL_MSK

#define ADF4377_SR_SEL_MSK   NO_OS_BIT(5)

◆ ADF4377_SYNTH_LOCK_TO_LSB

#define ADF4377_SYNTH_LOCK_TO_LSB ( x)
Value:
no_os_field_prep(ADF4377_SYNTH_LOCK_TO_LSB_MSK, x)
ADF4377_SYNTH_LOCK_TO_LSB_MSK
#define ADF4377_SYNTH_LOCK_TO_LSB_MSK
Definition adf4377.h:435

◆ ADF4377_SYNTH_LOCK_TO_LSB_MSK

#define ADF4377_SYNTH_LOCK_TO_LSB_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_SYNTH_LOCK_TO_MSB

#define ADF4377_SYNTH_LOCK_TO_MSB ( x)
Value:
no_os_field_prep(ADF4377_SYNTH_LOCK_TO_MSB_MSK, x)
ADF4377_SYNTH_LOCK_TO_MSB_MSK
#define ADF4377_SYNTH_LOCK_TO_MSB_MSK
Definition adf4377.h:441

◆ ADF4377_SYNTH_LOCK_TO_MSB_MSK

#define ADF4377_SYNTH_LOCK_TO_MSB_MSK   NO_OS_GENMASK(6, 0)

◆ ADF4377_VCO_ALC_TO_LSB

#define ADF4377_VCO_ALC_TO_LSB ( x)
Value:
no_os_field_prep(ADF4377_VCO_ALC_TO_LSB_MSK, x)
ADF4377_VCO_ALC_TO_LSB_MSK
#define ADF4377_VCO_ALC_TO_LSB_MSK
Definition adf4377.h:445

◆ ADF4377_VCO_ALC_TO_LSB_MSK

#define ADF4377_VCO_ALC_TO_LSB_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_VCO_ALC_TO_MSB

#define ADF4377_VCO_ALC_TO_MSB ( x)
Value:
no_os_field_prep(ADF4377_VCO_ALC_TO_MSB_MSK, x)
ADF4377_VCO_ALC_TO_MSB_MSK
#define ADF4377_VCO_ALC_TO_MSB_MSK
Definition adf4377.h:451

◆ ADF4377_VCO_ALC_TO_MSB_MSK

#define ADF4377_VCO_ALC_TO_MSB_MSK   NO_OS_GENMASK(6, 0)

◆ ADF4377_VCO_BAND

#define ADF4377_VCO_BAND ( x)
Value:
no_os_field_prep(ADF4377_VCO_BAND_MSK, x)
ADF4377_VCO_BAND_MSK
#define ADF4377_VCO_BAND_MSK
Definition adf4377.h:576

◆ ADF4377_VCO_BAND_DIV

#define ADF4377_VCO_BAND_DIV ( x)
Value:
no_os_field_prep(ADF4377_VCO_BAND_DIV_MSK, x)
ADF4377_VCO_BAND_DIV_MSK
#define ADF4377_VCO_BAND_DIV_MSK
Definition adf4377.h:427

◆ ADF4377_VCO_BAND_DIV_MAX

#define ADF4377_VCO_BAND_DIV_MAX   0xFF

◆ ADF4377_VCO_BAND_DIV_MIN

#define ADF4377_VCO_BAND_DIV_MIN   0x00

◆ ADF4377_VCO_BAND_DIV_MSK

#define ADF4377_VCO_BAND_DIV_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_VCO_BAND_MAX

#define ADF4377_VCO_BAND_MAX   0x00

◆ ADF4377_VCO_BAND_MIN

#define ADF4377_VCO_BAND_MIN   0xFF

◆ ADF4377_VCO_BAND_MSK

#define ADF4377_VCO_BAND_MSK   NO_OS_GENMASK(7, 0)

◆ ADF4377_VCO_CALIB_DIS

#define ADF4377_VCO_CALIB_DIS   0x0

◆ ADF4377_VCO_CALIB_EN

#define ADF4377_VCO_CALIB_EN   0x1

◆ ADF4377_VCO_CORE

#define ADF4377_VCO_CORE ( x)
Value:
no_os_field_prep(ADF4377_VCO_CORE_MSK, x)
ADF4377_VCO_CORE_MSK
#define ADF4377_VCO_CORE_MSK
Definition adf4377.h:564

◆ ADF4377_VCO_CORE_MSK

#define ADF4377_VCO_CORE_MSK   NO_OS_GENMASK(1, 0)

◆ ADF4377_VENDOR_ID_LSB

#define ADF4377_VENDOR_ID_LSB   0x456

◆ ADF4377_VENDOR_ID_MSB

#define ADF4377_VENDOR_ID_MSB   0x456

◆ ADF4378_MAX_R_DIV

#define ADF4378_MAX_R_DIV   0x3F

◆ M_VCO_BIAS_MAX

#define M_VCO_BIAS_MAX   0x0

◆ M_VCO_BIAS_MIN

#define M_VCO_BIAS_MIN   0xF

Enumeration Type Documentation

◆ adf4377_dev_id

enum adf4377_dev_id

ID of Devices supported by the driver.

Enumerator
ADF4377 
ADF4378 

Function Documentation

◆ adf4377_check_scratchpad()

int adf4377_check_scratchpad ( struct adf4377_dev * dev)

ADF4377 SPI Scratchpad check.

Parameters
dev- The device structure.
Returns
Returns 0 in case of success or negative error code.
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◆ adf4377_get_bleed_word()

int adf4377_get_bleed_word ( struct adf4377_dev * dev,
int32_t * bleed_word )

Gets the value of the set bleed word.

adf4377 Get bleed current attribute

Parameters
dev- The device structure.
bleed_word- The read bleed current register value.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_cp_i()

int adf4377_get_cp_i ( struct adf4377_dev * dev,
int32_t * reg_val )

Gets the charge pump value from the register. The value will be between 0 and 15 on 8 bits. For more information please consult the Datasheet.

adf4377 Get charge pump current attribute

Parameters
dev- The device structure.
reg_val- The read charge pump register value.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_en_chan()

int adf4377_get_en_chan ( struct adf4377_dev * dev,
uint8_t ch,
bool * en )

Gets the value the output channel if it is enabled or disable.

ADF4377 Get channel enable attributes

Parameters
dev- The device structure.
ch- The channel to get state.
en- The status of the output channel.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_en_ref_doubler()

int adf4377_get_en_ref_doubler ( struct adf4377_dev * dev,
bool * en )

Gets the value the doubler if it is enabled or disable and stores it it the dev structure.

adf4377 Get reference doubler attribute

Parameters
dev- The device structure.
en- The read value of the reference doubler.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_en_sr_inv_adj()

int adf4377_get_en_sr_inv_adj ( struct adf4377_dev * dev,
bool * en )

Gets the value of the set SR_INV_ADJ Adjustment to enable or disable which adds a constant value to the skew adjustment output.

ADF4377 Get INV_SR Adjustment attribute

Parameters
dev- The device structure.
en- The read value of SR_INV.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_en_sysref_monitor()

int adf4377_get_en_sysref_monitor ( struct adf4377_dev * dev,
bool * en )

Gets the value of the set sysref monitoring.

ADF4377 Get sysref Monitoring attribute

Parameters
dev- The device structure.
en- The read value of the sysref monitor.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_ndel()

int adf4377_get_ndel ( struct adf4377_dev * dev,
int32_t * val )

Gets the value of the set NDEL (N divider Delay) register.

ADF4377 Get NDEL (N divider Delay) register value

Parameters
dev- The device structure.
val- The read NDEL register value.
Returns
Returns 0 in case of success or negative error code otherwise.

◆ adf4377_get_out_power()

int adf4377_get_out_power ( struct adf4377_dev * dev,
uint8_t ch,
int8_t * pwr )

Gets the output power register value.

ADF4377 Get output power attributes

Parameters
dev- The device structure.
ch- The channel to get the power off.
pwr- The output power register value.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_rdel()

int adf4377_get_rdel ( struct adf4377_dev * dev,
int32_t * val )

Gets the value of the set RDEL (R divider Delay) register.

ADF4377 Get RDEL (R divider Delay) register value

Parameters
dev- The device structure.
val- The read RDEL register value.
Returns
Returns 0 in case of success or negative error code otherwise.

◆ adf4377_get_ref_clk()

int adf4377_get_ref_clk ( struct adf4377_dev * dev,
uint64_t * val )

Gets the user proposed reference frequency.

ADF4377 Get Reference Clock attribute

Parameters
dev- The device structure.
val- The set value of the reference frequency in Hz.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_ref_div()

int adf4377_get_ref_div ( struct adf4377_dev * dev,
int32_t * div )

Gets the value the reference divider.

adf4377 Get reference divider attribute

Parameters
dev- The device structure.
div- The read reference divider value.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_rfout()

int adf4377_get_rfout ( struct adf4377_dev * dev,
uint64_t * val )

Gets the user proposed output frequency.

ADF4377 Get output frequency attribute

Parameters
dev- The device structure.
val- The set value of the output frequency in Hz.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_rfout_divider()

int adf4377_get_rfout_divider ( struct adf4377_dev * dev,
int8_t * div )

Gets the rfout divider register value.

ADF4377 Get the rfout divider attribute

Parameters
dev- The device structure.
div- The rfoutdiv divider register value.
Returns
- 0 in case of success or negative error code.

◆ adf4377_get_sr_del_adj()

int adf4377_get_sr_del_adj ( struct adf4377_dev * dev,
int32_t * val )

Gets the value of the set SR_DEL Adjustment Feature Translated to Pico Seconds on the output.

ADF4377 Get SR_DEL Adjustment attribute

Parameters
dev- The device structure.
val- The read SR_DEL register value.
Returns
- 0 in case of success or negative error code.

◆ adf4377_init()

int32_t adf4377_init ( struct adf4377_dev ** device,
struct adf4377_init_param * init_param )

Initializes the ADF4377.

ADF4377 Initialization

Parameters
device- The device structure.
init_param- The structure containing the device initial parameters.
Returns
- Returns 0 in case of success or negative error code.
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◆ adf4377_remove()

int32_t adf4377_remove ( struct adf4377_dev * dev)

Free resoulces allocated for ADF4377.

ADF4377 Resources Deallocation

Parameters
dev- The device structure.
Returns
- Returns 0 in case of success or negative error code.
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◆ adf4377_set_bleed_word()

int adf4377_set_bleed_word ( struct adf4377_dev * dev,
int32_t word )

Set the bleed word, which represents the value of the bleed current written to the register space.

adf4377 Set bleed current attribute

Parameters
dev- The device structure.
word- The bleed current register value.
Returns
- Result of the writing procedure, error code otherwise.

◆ adf4377_set_cp_i()

int adf4377_set_cp_i ( struct adf4377_dev * dev,
int32_t reg_val )

Set the charge pump value which will be written to the register. The value will be between 0 and 15 on 8 bits. For more information please consult the Datasheet.

adf4377 Set charge pump current attribute

Parameters
dev- The device structure.
reg_val- The desired charge pump register value.
Returns
- Result of the writing procedure, error code otherwise.

◆ adf4377_set_en_chan()

int adf4377_set_en_chan ( struct adf4377_dev * dev,
uint8_t ch,
bool en )

Set the output channel to enable or disable based on the passed parameter. If the parameter is different then 0 it will set the doubler to enable.

ADF4377 Set channel enable attributes

Parameters
dev- The device structure.
ch- The channel to set state.
en- The enable or disable value of the output channel.
Returns
- Result of the writing procedure, error code otherwise.

◆ adf4377_set_en_ref_doubler()

int adf4377_set_en_ref_doubler ( struct adf4377_dev * dev,
bool en )

Set the reference doubler to enable or disable based on the passed parameter. If the parameter is different then 0 it will set the doubler to enable.

ADF477 Set reference doubler attribute

Parameters
dev- The device structure.
en- The enable or disable value of the reference doubler.
Returns
- 0 in case of success or negative error code.

◆ adf4377_set_en_sr_inv_adj()

int adf4377_set_en_sr_inv_adj ( struct adf4377_dev * dev,
bool en )

Set the value of SR_INV_ADJ Adjustment to enable or disable which adds a constant value to the skew adjustment output.

ADF4377 Set INV_SR Adjustment attribute

Parameters
dev- The device structure.
en- The enable or disable value of SR_INV.
Returns
- Result of the writing procedure, error code otherwise.

◆ adf4377_set_en_sysref_monitor()

int adf4377_set_en_sysref_monitor ( struct adf4377_dev * dev,
bool en )

Set enable/disable sysref monitoring.

ADF4377 Set sysref Monitoring attribute

Parameters
dev- The device structure.
en- The enable or disable value of the sysref monitor.
Returns
- 0 in case of success or negative error code.

◆ adf4377_set_freq()

int adf4377_set_freq ( struct adf4377_dev * dev)

Set the output frequency.

Parameters
dev- The device structure.
Returns
0 in case of success, negative error code otherwise.
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◆ adf4377_set_ndel()

int adf4377_set_ndel ( struct adf4377_dev * dev,
int32_t val )

Set the NDEL (N divider Delay) register value.

ADF4377 Set NDEL (N divider Delay) register value

Parameters
dev- The device structure.
val- The desired NDEL value. The value will be clamped to the maximum supported value if it exceeds the limit.
Returns
Returns 0 in case of success or negative error code otherwise.

◆ adf4377_set_out_power()

int adf4377_set_out_power ( struct adf4377_dev * dev,
uint8_t ch,
int8_t pwr )

Set the output power register value of a channel and reset everything over to maximum supported value of 15 to the max. value.

ADF4377 Set output power attributes

Parameters
dev- The device structure.
ch- The channel to set the power off.
pwr- The output power register value.
Returns
- Result of the writing procedure, error code otherwise.

◆ adf4377_set_rdel()

int adf4377_set_rdel ( struct adf4377_dev * dev,
int32_t val )

Set the RDEL (R divider Delay) register value.

ADF4377 Set RDEL (R divider Delay) register value

Parameters
dev- The device structure.
val- The desired RDEL value. The value will be clamped to the maximum supported value if it exceeds the limit.
Returns
Returns 0 in case of success or negative error code otherwise.

◆ adf4377_set_ref_clk()

int adf4377_set_ref_clk ( struct adf4377_dev * dev,
uint64_t val )

Set the desired reference frequency and reset everything over to maximum supported value of 5GHz to the max. value and everything under the minimum supported value of 10MHz to the min. value.

ADF4377 Set Reference Clock attribute

Parameters
dev- The device structure.
val- The desired reference frequency in Hz.
Returns
- 0 in case of success or negative error code.

◆ adf4377_set_ref_div()

int adf4377_set_ref_div ( struct adf4377_dev * dev,
int32_t div )

Set the reference divider value and reset everything over to maximum supported value of 63 to the max. value.

adf4377 Set reference divider attribute

Parameters
dev- The device structure.
div- The reference divider value.
Returns
- 0 in case of success or negative error code.

◆ adf4377_set_rfout()

int adf4377_set_rfout ( struct adf4377_dev * dev,
uint64_t val )

Set the desired output frequency and reset everything over to maximum supported value of 12.8GHz to the max. value and everything under the minimum supported value of 800MHz to the min. value.

ADF4377 Set output frequency attribute

Parameters
dev- The device structure.
val- The desired output frequency in Hz.
Returns
- 0 in case of success or negative error code.
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◆ adf4377_set_rfout_divider()

int adf4377_set_rfout_divider ( struct adf4377_dev * dev,
uint8_t div )

Set the rfout frequency divider register value and reset everything over to maximum supported value of /128 to the max. value.

ADF4377 Set the rfout divider attribute

Parameters
dev- The device structure.
div- The rfoutdiv divider register value.
Returns
- Result of the writing procedure, error code otherwise.

◆ adf4377_set_sr_del_adj()

int adf4377_set_sr_del_adj ( struct adf4377_dev * dev,
int32_t val )

Set the value of SR_DEL Adjustment Feature Translated to Pico Seconds on the output. Reset to Max value of 127.

ADF4377 Set SR_DEL Adjustment attribute

Parameters
dev- The device structure.
val- The desired SR_DEL register value.
Returns
- Result of the writing procedure, error code otherwise.

◆ adf4377_soft_reset()

int adf4377_soft_reset ( struct adf4377_dev * dev,
bool spi_4wire )

Software reset and loads default register values to bring the part to a known state.

Parameters
dev- The device structure.
spi_4wire- The SPI interface mode.
Returns
- Returns 0 in case of success or negative error code.
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◆ adf4377_spi_read()

int adf4377_spi_read ( struct adf4377_dev * dev,
uint8_t reg_addr,
uint8_t * data )

Reads data from ADF4377 over SPI.

ADF4377 SPI Read

Parameters
dev- The device structure.
reg_addr- The register address.
data- Data read from the device.
Returns
Returns 0 in case of success or negative error code otherwise.
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◆ adf4377_spi_update_bit()

int adf4377_spi_update_bit ( struct adf4377_dev * dev,
uint16_t reg_addr,
uint8_t mask,
uint8_t data )

Update ADF4377 register.

Parameters
dev- The device structure.
reg_addr- The register address.
mask- Mask for specific register bits to be updated.
data- Data written to the device (requires prior bit shifting).
Returns
Returns 0 in case of success or negative error code otherwise.
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◆ adf4377_spi_write()

int adf4377_spi_write ( struct adf4377_dev * dev,
uint8_t reg_addr,
uint8_t data )

Writes data to ADF4377 over SPI.

ADF4377 SPI write

Parameters
dev- The device structure.
reg_addr- The register address.
data- Data value to write.
Returns
Returns 0 in case of success or negative error code otherwise.
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