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admv1013.h File Reference

Header file for admv1013 Driver. More...

#include <stdint.h>
#include <stdbool.h>
#include "no_os_spi.h"
#include "no_os_util.h"
Include dependency graph for admv1013.h:

Classes

struct  admv1013_init_param
 ADMV1013 Initialization Parameters structure. More...
 
struct  admv1013_dev
 ADMV1013 Device Descriptor. More...
 

Macros

#define ADMV1013_REG_SPI_CONTROL   0x00
 
#define ADMV1013_REG_ALARM   0x01
 
#define ADMV1013_REG_ALARM_MASKS   0x02
 
#define ADMV1013_REG_ENABLE   0x03
 
#define ADMV1013_REG_LO_AMP_I   0x05
 
#define ADMV1013_REG_LO_AMP_Q   0x06
 
#define ADMV1013_REG_OFFSET_ADJUST_I   0x07
 
#define ADMV1013_REG_OFFSET_ADJUST_Q   0x08
 
#define ADMV1013_REG_QUAD   0x09
 
#define ADMV1013_REG_VVA_TEMP_COMP   0x0A
 
#define ADMV1013_PARITY_EN_MSK   NO_OS_BIT(15)
 
#define ADMV1013_SPI_SOFT_RESET_MSK   NO_OS_BIT(14)
 
#define ADMV1013_CHIP_ID_MSK   NO_OS_GENMASK(11, 4)
 
#define ADMV1013_CHIP_ID   0xA
 
#define ADMV1013_REVISION_ID_MSK   NO_OS_GENMASK(3, 0)
 
#define ADMV1013_PARITY_ERROR_MSK   NO_OS_BIT(15)
 
#define ADMV1013_TOO_FEW_ERRORS_MSK   NO_OS_BIT(14)
 
#define ADMV1013_TOO_MANY_ERRORS_MSK   NO_OS_BIT(13)
 
#define ADMV1013_ADDRESS_RANGE_ERROR_MSK   NO_OS_BIT(12)
 
#define ADMV1013_VGA_PD_MSK   NO_OS_BIT(15)
 
#define ADMV1013_MIXER_PD_MSK   NO_OS_BIT(14)
 
#define ADMV1013_QUAD_PD_MSK   NO_OS_GENMASK(13, 11)
 
#define ADMV1013_BG_PD_MSK   NO_OS_BIT(10)
 
#define ADMV1013_MIXER_IF_EN_MSK   NO_OS_BIT(7)
 
#define ADMV1013_DET_EN_MSK   NO_OS_BIT(5)
 
#define ADMV1013_LOAMP_PH_ADJ_FINE_MSK   NO_OS_GENMASK(13, 7)
 
#define ADMV1013_MIXER_VGATE_MSK   NO_OS_GENMASK(6, 0)
 
#define ADMV1013_MIXER_OFF_ADJ_P_MSK   NO_OS_GENMASK(15, 9)
 
#define ADMV1013_MIXER_OFF_ADJ_N_MSK   NO_OS_GENMASK(8, 2)
 
#define ADMV1013_QUAD_SE_MODE_MSK   NO_OS_GENMASK(9, 6)
 
#define ADMV1013_QUAD_FILTERS_MSK   NO_OS_GENMASK(3, 0)
 
#define ADMV1013_VVA_TEMP_COMP_MSK   NO_OS_GENMASK(15, 0)
 
#define ADMV1013_BUFF_SIZE_BYTES   3
 
#define ADMV1013_SPI_READ_CMD   NO_OS_BIT(7)
 
#define ADMV1013_SPI_WRITE_CMD   (0 << 7)
 

Enumerations

enum  admv1013_input_mode {
  ADMV1013_IQ_MODE ,
  ADMV1013_IF_MODE
}
 Switch Intermediate Frequency or I/Q Mode. More...
 
enum  admv1013_quad_se_mode {
  ADMV1013_SE_MODE_POS = 6 ,
  ADMV1013_SE_MODE_NEG = 9 ,
  ADMV1013_SE_MODE_DIFF = 12
}
 Switch Differential/Single-Ended Modes. More...
 
enum  admv1013_quad_filters {
  ADMV1013_LO_BAND_8_62_TO_10_25_GHZ = 0 ,
  ADMV1013_LO_BAND_6_6_TO_9_2_GHZ = 5 ,
  ADMV1013_LO_BAND_5_4_TO_8_GHZ = 10 ,
  ADMV1013_LO_BAND_5_4_TO_7_GHZ = 15
}
 LO Filters BW Selection. More...
 

Functions

int admv1013_spi_write (struct admv1013_dev *dev, uint8_t reg_addr, uint16_t data)
 Writes data to ADMV1013 over SPI.
 
int admv1013_spi_update_bits (struct admv1013_dev *dev, uint8_t reg_addr, uint16_t mask, uint16_t data)
 Update ADMV1013 register.
 
int admv1013_spi_read (struct admv1013_dev *dev, uint8_t reg_addr, uint16_t *data)
 Reads data from ADMV1013 over SPI.
 
int admv1013_set_iq_phase (struct admv1013_dev *dev, uint8_t i_phase, uint8_t q_phase)
 Set I/Q Phase Accuracy.
 
int admv1013_get_iq_phase (struct admv1013_dev *dev, uint8_t *i_phase, uint8_t *q_phase)
 Get I/Q Phase Accuracy.
 
int admv1013_set_iq_offset (struct admv1013_dev *dev, uint8_t i_offset_p, uint8_t i_offset_n, uint8_t q_offset_p, uint8_t q_offset_n)
 Set I/Q Offset Accuracy.
 
int admv1013_get_iq_offset (struct admv1013_dev *dev, uint8_t *i_offset_p, uint8_t *i_offset_n, uint8_t *q_offset_p, uint8_t *q_offset_n)
 Get I/Q Offset Accuracy.
 
int admv1013_init (struct admv1013_dev **device, struct admv1013_init_param *init_param)
 Initializes the admv1013.
 
int admv1013_remove (struct admv1013_dev *dev)
 ADMV1013 Resources Deallocation.
 

Detailed Description

Header file for admv1013 Driver.

Author
Antoniu Miclaus (anton.nosp@m.iu.m.nosp@m.iclau.nosp@m.s@an.nosp@m.alog..nosp@m.com)

Copyright 2022(c) Analog Devices, Inc.

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

◆ ADMV1013_ADDRESS_RANGE_ERROR_MSK

#define ADMV1013_ADDRESS_RANGE_ERROR_MSK   NO_OS_BIT(12)

◆ ADMV1013_BG_PD_MSK

#define ADMV1013_BG_PD_MSK   NO_OS_BIT(10)

◆ ADMV1013_BUFF_SIZE_BYTES

#define ADMV1013_BUFF_SIZE_BYTES   3

◆ ADMV1013_CHIP_ID

#define ADMV1013_CHIP_ID   0xA

◆ ADMV1013_CHIP_ID_MSK

#define ADMV1013_CHIP_ID_MSK   NO_OS_GENMASK(11, 4)

◆ ADMV1013_DET_EN_MSK

#define ADMV1013_DET_EN_MSK   NO_OS_BIT(5)

◆ ADMV1013_LOAMP_PH_ADJ_FINE_MSK

#define ADMV1013_LOAMP_PH_ADJ_FINE_MSK   NO_OS_GENMASK(13, 7)

◆ ADMV1013_MIXER_IF_EN_MSK

#define ADMV1013_MIXER_IF_EN_MSK   NO_OS_BIT(7)

◆ ADMV1013_MIXER_OFF_ADJ_N_MSK

#define ADMV1013_MIXER_OFF_ADJ_N_MSK   NO_OS_GENMASK(8, 2)

◆ ADMV1013_MIXER_OFF_ADJ_P_MSK

#define ADMV1013_MIXER_OFF_ADJ_P_MSK   NO_OS_GENMASK(15, 9)

◆ ADMV1013_MIXER_PD_MSK

#define ADMV1013_MIXER_PD_MSK   NO_OS_BIT(14)

◆ ADMV1013_MIXER_VGATE_MSK

#define ADMV1013_MIXER_VGATE_MSK   NO_OS_GENMASK(6, 0)

◆ ADMV1013_PARITY_EN_MSK

#define ADMV1013_PARITY_EN_MSK   NO_OS_BIT(15)

◆ ADMV1013_PARITY_ERROR_MSK

#define ADMV1013_PARITY_ERROR_MSK   NO_OS_BIT(15)

◆ ADMV1013_QUAD_FILTERS_MSK

#define ADMV1013_QUAD_FILTERS_MSK   NO_OS_GENMASK(3, 0)

◆ ADMV1013_QUAD_PD_MSK

#define ADMV1013_QUAD_PD_MSK   NO_OS_GENMASK(13, 11)

◆ ADMV1013_QUAD_SE_MODE_MSK

#define ADMV1013_QUAD_SE_MODE_MSK   NO_OS_GENMASK(9, 6)

◆ ADMV1013_REG_ALARM

#define ADMV1013_REG_ALARM   0x01

◆ ADMV1013_REG_ALARM_MASKS

#define ADMV1013_REG_ALARM_MASKS   0x02

◆ ADMV1013_REG_ENABLE

#define ADMV1013_REG_ENABLE   0x03

◆ ADMV1013_REG_LO_AMP_I

#define ADMV1013_REG_LO_AMP_I   0x05

◆ ADMV1013_REG_LO_AMP_Q

#define ADMV1013_REG_LO_AMP_Q   0x06

◆ ADMV1013_REG_OFFSET_ADJUST_I

#define ADMV1013_REG_OFFSET_ADJUST_I   0x07

◆ ADMV1013_REG_OFFSET_ADJUST_Q

#define ADMV1013_REG_OFFSET_ADJUST_Q   0x08

◆ ADMV1013_REG_QUAD

#define ADMV1013_REG_QUAD   0x09

◆ ADMV1013_REG_SPI_CONTROL

#define ADMV1013_REG_SPI_CONTROL   0x00

◆ ADMV1013_REG_VVA_TEMP_COMP

#define ADMV1013_REG_VVA_TEMP_COMP   0x0A

◆ ADMV1013_REVISION_ID_MSK

#define ADMV1013_REVISION_ID_MSK   NO_OS_GENMASK(3, 0)

◆ ADMV1013_SPI_READ_CMD

#define ADMV1013_SPI_READ_CMD   NO_OS_BIT(7)

◆ ADMV1013_SPI_SOFT_RESET_MSK

#define ADMV1013_SPI_SOFT_RESET_MSK   NO_OS_BIT(14)

◆ ADMV1013_SPI_WRITE_CMD

#define ADMV1013_SPI_WRITE_CMD   (0 << 7)

◆ ADMV1013_TOO_FEW_ERRORS_MSK

#define ADMV1013_TOO_FEW_ERRORS_MSK   NO_OS_BIT(14)

◆ ADMV1013_TOO_MANY_ERRORS_MSK

#define ADMV1013_TOO_MANY_ERRORS_MSK   NO_OS_BIT(13)

◆ ADMV1013_VGA_PD_MSK

#define ADMV1013_VGA_PD_MSK   NO_OS_BIT(15)

◆ ADMV1013_VVA_TEMP_COMP_MSK

#define ADMV1013_VVA_TEMP_COMP_MSK   NO_OS_GENMASK(15, 0)

Enumeration Type Documentation

◆ admv1013_input_mode

Switch Intermediate Frequency or I/Q Mode.

Enumerator
ADMV1013_IQ_MODE 
ADMV1013_IF_MODE 

◆ admv1013_quad_filters

LO Filters BW Selection.

Enumerator
ADMV1013_LO_BAND_8_62_TO_10_25_GHZ 
ADMV1013_LO_BAND_6_6_TO_9_2_GHZ 
ADMV1013_LO_BAND_5_4_TO_8_GHZ 
ADMV1013_LO_BAND_5_4_TO_7_GHZ 

◆ admv1013_quad_se_mode

Switch Differential/Single-Ended Modes.

Enumerator
ADMV1013_SE_MODE_POS 
ADMV1013_SE_MODE_NEG 
ADMV1013_SE_MODE_DIFF 

Function Documentation

◆ admv1013_get_iq_offset()

int admv1013_get_iq_offset ( struct admv1013_dev * dev,
uint8_t * i_offset_p,
uint8_t * i_offset_n,
uint8_t * q_offset_p,
uint8_t * q_offset_n )

Get I/Q Offset Accuracy.

Get I/Q Offset Accuracy

Parameters
dev- The device structure.
i_offset_p- The I Data Positive.
i_offset_n- The I Data Negative.
q_offset_p- The Q Data Positive.
q_offset_n- The Q Data Negative.
Returns
Returns 0 in case of success or negative error code.

◆ admv1013_get_iq_phase()

int admv1013_get_iq_phase ( struct admv1013_dev * dev,
uint8_t * i_phase,
uint8_t * q_phase )

Get I/Q Phase Accuracy.

Get I/Q Phase Accuracy

Parameters
dev- The device structure.
i_phase- The I Data.
q_phase- The Q Data.
Returns
Returns 0 in case of success or negative error code.

◆ admv1013_init()

int admv1013_init ( struct admv1013_dev ** device,
struct admv1013_init_param * init_param )

Initializes the admv1013.

ADMV1013 Initialization

Parameters
device- The device structure.
init_param- The structure containing the device initial parameters.
Returns
Returns 0 in case of success or negative error code.

◆ admv1013_remove()

int admv1013_remove ( struct admv1013_dev * dev)

ADMV1013 Resources Deallocation.

ADMV1013 Resources Deallocation

Parameters
dev- The device structure.
Returns
Returns 0 in case of success or negative error code otherwise.

◆ admv1013_set_iq_offset()

int admv1013_set_iq_offset ( struct admv1013_dev * dev,
uint8_t i_offset_p,
uint8_t i_offset_n,
uint8_t q_offset_p,
uint8_t q_offset_n )

Set I/Q Offset Accuracy.

Set I/Q Offset Accuracy

Parameters
dev- The device structure.
i_offset_p- The I Data Positive.
i_offset_n- The I Data Negative.
q_offset_p- The Q Data Positive.
q_offset_n- The Q Data Negative.
Returns
Returns 0 in case of success or negative error code.

◆ admv1013_set_iq_phase()

int admv1013_set_iq_phase ( struct admv1013_dev * dev,
uint8_t i_phase,
uint8_t q_phase )

Set I/Q Phase Accuracy.

Set I/Q Phase Accuracy

Parameters
dev- The device structure.
i_phase- The I Data.
q_phase- The Q Data.
Returns
Returns 0 in case of success or negative error code.

◆ admv1013_spi_read()

int admv1013_spi_read ( struct admv1013_dev * dev,
uint8_t reg_addr,
uint16_t * data )

Reads data from ADMV1013 over SPI.

ADMV1013 SPI Read

Parameters
dev- The device structure.
reg_addr- The register address.
data- Data read from the device.
Returns
Returns 0 in case of success or negative error code otherwise.

◆ admv1013_spi_update_bits()

int admv1013_spi_update_bits ( struct admv1013_dev * dev,
uint8_t reg_addr,
uint16_t mask,
uint16_t data )

Update ADMV1013 register.

Parameters
dev- The device structure.
reg_addr- The register address.
mask- Mask for specific register bits to be updated.
data- Data written to the device (requires prior bit shifting).
Returns
Returns 0 in case of success or negative error code otherwise.

◆ admv1013_spi_write()

int admv1013_spi_write ( struct admv1013_dev * dev,
uint8_t reg_addr,
uint16_t data )

Writes data to ADMV1013 over SPI.

ADMV1013 SPI write

Parameters
dev- The device structure.
reg_addr- The register address.
data- Data value to write.
Returns
Returns 0 in case of success or negative error code otherwise.