no-OS
Classes | Macros | Enumerations | Functions
adpd410x.h File Reference
#include <stdbool.h>
#include "no_os_spi.h"
#include "no_os_i2c.h"
#include "no_os_gpio.h"
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Classes

union  phy_comm_dev
 Contains physical communication handler. More...
 
union  phy_comm_init_param
 Contains physical communication initialization structure. More...
 
struct  adpd410x_ts_inputs
 Structure holding time slot input configuration. More...
 
struct  _adpd410x_led_control
 Structure mapping LED output option and LED strength to one byte. More...
 
union  adpd410x_led_control
 Union of the LED mapping and value so they can be accessed both ways. More...
 
struct  adpd410x_timeslot_init
 Initialization structure for time slots. More...
 
struct  adpd410x_init_param
 Device driver initialization structure. More...
 
struct  adpd410x_dev
 Device driver handler. More...
 

Macros

#define ADPD410X_REG_FIFO_STATUS   0x0000
 
#define ADPD410X_REG_INT_STATUS_DATA   0x0001
 
#define ADPD410X_REG_INT_STATUS_LEV0   0x0002
 
#define ADPD410X_REG_INT_STATUS_LEV1   0x0003
 
#define ADPD410X_REG_FIFO_TH   0x0006
 
#define ADPD410X_REG_INT_ACLEAR   0x0007
 
#define ADPD410X_REG_CHIP_ID   0x0008
 
#define ADPD410X_REG_OSC32M   0x0009
 
#define ADPD410X_REG_OSC32M_CAL   0x000A
 
#define ADPD410X_REG_OSC1M   0x000B
 
#define ADPD410X_REG_OSC32K   0x000C
 
#define ADPD410X_REG_TS_FREQ   0x000D
 
#define ADPD410X_REG_TS_FREQH   0x000E
 
#define ADPD410X_REG_SYS_CTL   0x000F
 
#define ADPD410X_REG_OPMODE   0x0010
 
#define ADPD410X_REG_STAMP_L   0x0011
 
#define ADPD410X_REG_STAMP_H   0x0012
 
#define ADPD410X_REG_STAMPDELTA   0x0013
 
#define ADPD410X_REG_INT_ENABLE_XD   0x0014
 
#define ADPD410X_REG_INT_ENABLE_YD   0x0015
 
#define ADPD410X_REG_INT_ENABLE_XL0   0x0016
 
#define ADPD410X_REG_INT_ENABLE_XL1   0x0017
 
#define ADPD410X_REG_INT_ENABLE_YL0   0x001a
 
#define ADPD410X_REG_INT_ENABLE_YL1   0x001b
 
#define ADPD410X_REG_FIFO_STATUS_BYTES   0x001e
 
#define ADPD410X_REG_INPUT_SLEEP   0x0020
 
#define ADPD410X_REG_INPUT_CFG   0x0021
 
#define ADPD410X_REG_GPIO_CFG   0x0022
 
#define ADPD410X_REG_GPIO01   0x0023
 
#define ADPD410X_REG_GPIO23   0x0024
 
#define ADPD410X_REG_GPIO_IN   0x0025
 
#define ADPD410X_REG_GPIO_EXT   0x0026
 
#define ADPD410X_REG_DATA_HOLD_FLAG   0x002E
 
#define ADPD410X_REG_FIFO_DATA   0x002F
 
#define ADPD410X_REG_SIGNAL1_L(ts)   (0x0030 + (ts) * 0x08)
 
#define ADPD410X_REG_SIGNAL1_H(ts)   (0x0031 + (ts) * 0x08)
 
#define ADPD410X_REG_SIGNAL2_L(ts)   (0x0032 + (ts) * 0x08)
 
#define ADPD410X_REG_SIGNAL2_H(ts)   (0x0033 + (ts) * 0x08)
 
#define ADPD410X_REG_DARK1_L(ts)   (0x0034 + (ts) * 0x08)
 
#define ADPD410X_REG_DARK1_H(ts)   (0x0035 + (ts) * 0x08)
 
#define ADPD410X_REG_DARK2_L(ts)   (0x0036 + (ts) * 0x08)
 
#define ADPD410X_REG_DARK2_H(ts)   (0x0037 + (ts) * 0x08)
 
#define ADPD410X_REG_IO_ADJUST   0x00B4
 
#define ADPD410X_REG_I2C_KEY   0x00B6
 
#define ADPD410X_REG_I2C_ADDR   0x00B7
 
#define ADPD410X_REG_TS_CTRL(ts)   (0x0100 + (ts) * 0x20)
 
#define ADPD410X_REG_TS_PATH(ts)   (0x0101 + (ts) * 0x20)
 
#define ADPD410X_REG_INPUTS(ts)   (0x0102 + (ts) * 0x20)
 
#define ADPD410X_REG_CATHODE(ts)   (0x0103 + (ts) * 0x20)
 
#define ADPD410X_REG_AFE_TRIM(ts)   (0x0104 + (ts) * 0x20)
 
#define ADPD410X_REG_LED_POW12(ts)   (0x0105 + (ts) * 0x20)
 
#define ADPD410X_REG_LED_POW34(ts)   (0x0106 + (ts) * 0x20)
 
#define ADPD410X_REG_COUNTS(ts)   (0x0107 + (ts) * 0x20)
 
#define ADPD410X_REG_PERIOD(ts)   (0x0108 + (ts) * 0x20)
 
#define ADPD410X_REG_LED_PULSE(ts)   (0x0109 + (ts) * 0x20)
 
#define ADPD410X_REG_INTEG_WIDTH(ts)   (0x010A + (ts) * 0x20)
 
#define ADPD410X_REG_INTEG_OFFSET(ts)   (0x010B + (ts) * 0x20)
 
#define ADPD410X_REG_MOD_PULSE(ts)   (0x010C + (ts) * 0x20)
 
#define ADPD410X_REG_PATTERN(ts)   (0x010D + (ts) * 0x20)
 
#define ADPD410X_REG_ADC_OFF1(ts)   (0x010E + (ts) * 0x20)
 
#define ADPD410X_REG_ADC_OFF2(ts)   (0x010F + (ts) * 0x20)
 
#define ADPD410X_REG_DATA1(ts)   (0x0110 + (ts) * 0x20)
 
#define ADPD410X_REG_DATA2(ts)   (0x0111 + (ts) * 0x20)
 
#define ADPD410X_REG_DECIMATE(ts)   (0x0112 + (ts) * 0x20)
 
#define ADPD410X_REG_DIGINT_LIT(ts)   (0x0113 + (ts) * 0x20)
 
#define ADPD410X_REG_DIGINT_DARK(ts)   (0x0114 + (ts) * 0x20)
 
#define ADPD410X_REG_THRESH_CFG(ts)   (0x0115 + (ts) * 0x20)
 
#define ADPD410X_REG_THRESH0(ts)   (0x0116 + (ts) * 0x20)
 
#define ADPD410X_REG_THRESH1(ts)   (0x0117 + (ts) * 0x20)
 
#define BITP_INT_STATUS_FIFO_FIFO_BYTE_COUNT   0
 
#define BITP_INT_STATUS_FIFO_INT_FIFO_OFLOW   13
 
#define BITP_INT_STATUS_FIFO_INT_FIFO_UFLOW   14
 
#define BITP_INT_STATUS_FIFO_CLEAR_FIFO   15
 
#define BITM_INT_STATUS_FIFO_FIFO_BYTE_COUNT   0x07ff
 
#define BITM_INT_STATUS_FIFO_INT_FIFO_OFLOW   0x2000
 
#define BITM_INT_STATUS_FIFO_INT_FIFO_UFLOW   0x4000
 
#define BITM_INT_STATUS_FIFO_CLEAR_FIFO   0x8000
 
#define BITP_INT_STATUS_DATA_INT_DATA_A   0
 
#define BITP_INT_STATUS_DATA_INT_DATA_B   1
 
#define BITP_INT_STATUS_DATA_INT_DATA_C   2
 
#define BITP_INT_STATUS_DATA_INT_DATA_D   3
 
#define BITP_INT_STATUS_DATA_INT_DATA_E   4
 
#define BITP_INT_STATUS_DATA_INT_DATA_F   5
 
#define BITP_INT_STATUS_DATA_INT_DATA_G   6
 
#define BITP_INT_STATUS_DATA_INT_DATA_H   7
 
#define BITP_INT_STATUS_DATA_INT_DATA_I   8
 
#define BITP_INT_STATUS_DATA_INT_DATA_J   9
 
#define BITP_INT_STATUS_DATA_INT_DATA_K   10
 
#define BITP_INT_STATUS_DATA_INT_DATA_L   11
 
#define BITP_INT_STATUS_DATA_INT_FIFO_TH   15
 
#define BITM_INT_STATUS_DATA_INT_DATA_A   0x0001
 
#define BITM_INT_STATUS_DATA_INT_DATA_B   0x0002
 
#define BITM_INT_STATUS_DATA_INT_DATA_C   0x0004
 
#define BITM_INT_STATUS_DATA_INT_DATA_D   0x0008
 
#define BITM_INT_STATUS_DATA_INT_DATA_E   0x0010
 
#define BITM_INT_STATUS_DATA_INT_DATA_F   0x0020
 
#define BITM_INT_STATUS_DATA_INT_DATA_G   0x0040
 
#define BITM_INT_STATUS_DATA_INT_DATA_H   0x0080
 
#define BITM_INT_STATUS_DATA_INT_DATA_I   0x0100
 
#define BITM_INT_STATUS_DATA_INT_DATA_J   0x0200
 
#define BITM_INT_STATUS_DATA_INT_DATA_K   0x0400
 
#define BITM_INT_STATUS_DATA_INT_DATA_L   0x0800
 
#define BITM_INT_STATUS_DATA_INT_FIFO_TH   0x8000
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_A   0
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_B   1
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_C   2
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_D   3
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_E   4
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_F   5
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_G   6
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_H   7
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_I   8
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_J   9
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_K   10
 
#define BITP_INT_STATUS_LEV0_INT_LEV0_L   11
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_A   0x0001
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_B   0x0002
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_C   0x0004
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_D   0x0008
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_E   0x0010
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_F   0x0020
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_G   0x0040
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_H   0x0080
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_I   0x0100
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_J   0x0200
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_K   0x0400
 
#define BITM_INT_STATUS_LEV0_INT_LEV0_L   0x0800
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_A   0
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_B   1
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_C   2
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_D   3
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_E   4
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_F   5
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_G   6
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_H   7
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_I   8
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_J   9
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_K   10
 
#define BITP_INT_STATUS_LEV1_INT_LEV1_L   11
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_A   0x0001
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_B   0x0002
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_C   0x0004
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_D   0x0008
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_E   0x0010
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_F   0x0020
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_G   0x0040
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_H   0x0080
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_I   0x0100
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_J   0x0200
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_K   0x0400
 
#define BITM_INT_STATUS_LEV1_INT_LEV1_L   0x0800
 
#define BITP_FIFO_CTL_FIFO_TH   0
 
#define BITM_FIFO_CTL_FIFO_TH   0x03ff
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_A   0
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_B   1
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_C   2
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_D   3
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_E   4
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_F   5
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_G   6
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_H   7
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_I   8
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_J   9
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_K   10
 
#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_L   11
 
#define BITP_INT_ACLEAR_INT_ACLEAR_FIFO   15
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_A   0x0001
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_B   0x0002
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_C   0x0004
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_D   0x0008
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_E   0x0010
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_F   0x0020
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_G   0x0040
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_H   0x0080
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_I   0x0100
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_J   0x0200
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_K   0x0400
 
#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_L   0x0800
 
#define BITM_INT_ACLEAR_INT_ACLEAR_FIFO   0x8000
 
#define BITP_CHIP_ID   0
 
#define BITP_CHIP_VERSION   8
 
#define BITM_CHIP_ID   0x00ff
 
#define BITM_CHIP_VERSION   0xff00
 
#define ADPD410X_CHIP_ID   0xC2
 
#define BITP_OSC32M_OSC_32M_FREQ_ADJ   0
 
#define BITM_OSC32M_OSC_32M_FREQ_ADJ   0x00ff
 
#define BITP_OSC32M_CAL_OSC_32M_CAL_COUNT   0
 
#define BITP_OSC32M_CAL_OSC_32M_CAL_START   15
 
#define BITM_OSC32M_CAL_OSC_32M_CAL_COUNT   0x7fff
 
#define BITM_OSC32M_CAL_OSC_32M_CAL_START   0x8000
 
#define BITP_OSC1M_OSC_1M_FREQ_ADJ   0
 
#define BITP_OSC1M_OSC_CLK_CAL_ENA   10
 
#define BITM_OSC1M_OSC_1M_FREQ_ADJ   0x03ff
 
#define BITM_OSC1M_OSC_CLK_CAL_ENA   0x0400
 
#define BITP_OSC32K_OSC_32K_ADJUST   0
 
#define BITP_OSC32K_CAPTURE_TIMESTAMP   15
 
#define BITM_OSC32K_OSC_32K_ADJUST   0x003f
 
#define BITM_OSC32K_CAPTURE_TIMESTAMP   0x8000
 
#define BITP_TS_FREQ_TIMESLOT_PERIOD_L   0
 
#define BITM_TS_FREQ_TIMESLOT_PERIOD_L   0xffff
 
#define BITP_TS_FREQH_TIMESLOT_PERIOD_H   0
 
#define BITM_TS_FREQH_TIMESLOT_PERIOD_H   0x007f
 
#define BITP_SYS_CTL_OSC_32K_EN   0
 
#define BITP_SYS_CTL_OSC_1M_EN   1
 
#define BITP_SYS_CTL_LFOSC_SEL   2
 
#define BITP_SYS_CTL_RANDOM_SLEEP   3
 
#define BITP_SYS_CTL_GO_SLEEP   4
 
#define BITP_SYS_CTL_ALT_CLK_GPIO   6
 
#define BITP_SYS_CTL_ALT_CLOCKS   8
 
#define BITP_SYS_CTL_SW_RESET   15
 
#define BITM_SYS_CTL_OSC_32K_EN   0x0001
 
#define BITM_SYS_CTL_OSC_1M_EN   0x0002
 
#define BITM_SYS_CTL_LFOSC_SEL   0x0004
 
#define BITM_SYS_CTL_RANDOM_SLEEP   0x0008
 
#define BITM_SYS_CTL_GO_SLEEP   0x0010
 
#define BITM_SYS_CTL_ALT_CLK_GPIO   0x00c0
 
#define BITM_SYS_CTL_ALT_CLOCKS   0x0300
 
#define BITM_SYS_CTL_SW_RESET   0x8000
 
#define BITP_OPMODE_OP_MODE   0
 
#define BITP_OPMODE_TIMESLOT_EN   8
 
#define BITM_OPMODE_OP_MODE   0x0001
 
#define BITM_OPMODE_TIMESLOT_EN   0x0f00
 
#define BITP_STAMP_L_TIMESTAMP_COUNT_L   0
 
#define BITM_STAMP_L_TIMESTAMP_COUNT_L   0xffff
 
#define BITP_STAMP_H_TIMESTAMP_COUNT_H   0
 
#define BITM_STAMP_H_TIMESTAMP_COUNT_H   0xffff
 
#define BITP_STAMPDELTA_TIMESTAMP_SLOT_DELTA   0
 
#define BITM_STAMPDELTA_TIMESTAMP_SLOT_DELTA   0xffff
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_A   0
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_B   1
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_C   2
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_D   3
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_E   4
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_F   5
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_G   6
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_H   7
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_I   8
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_J   9
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_K   10
 
#define BITP_INT_ENABLE_XD_INTX_EN_DATA_L   11
 
#define BITP_INT_ENABLE_XD_INTX_EN_FIFO_OFLOW   13
 
#define BITP_INT_ENABLE_XD_INTX_EN_FIFO_UFLOW   14
 
#define BITP_INT_ENABLE_XD_INTX_EN_FIFO_TH   15
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_A   0x0001
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_B   0x0002
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_C   0x0004
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_D   0x0008
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_E   0x0010
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_F   0x0020
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_G   0x0040
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_H   0x0080
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_I   0x0100
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_J   0x0200
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_K   0x0400
 
#define BITM_INT_ENABLE_XD_INTX_EN_DATA_L   0x0800
 
#define BITM_INT_ENABLE_XD_INTX_EN_FIFO_OFLOW   0x2000
 
#define BITM_INT_ENABLE_XD_INTX_EN_FIFO_UFLOW   0x4000
 
#define BITM_INT_ENABLE_XD_INTX_EN_FIFO_TH   0x8000
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_A   0
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_B   1
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_C   2
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_D   3
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_E   4
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_F   5
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_G   6
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_H   7
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_I   8
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_J   9
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_K   10
 
#define BITP_INT_ENABLE_YD_INTY_EN_DATA_L   11
 
#define BITP_INT_ENABLE_YD_INTY_EN_FIFO_OFLOW   13
 
#define BITP_INT_ENABLE_YD_INTY_EN_FIFO_UFLOW   14
 
#define BITP_INT_ENABLE_YD_INTY_EN_FIFO_TH   15
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_A   0x0001
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_B   0x0002
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_C   0x0004
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_D   0x0008
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_E   0x0010
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_F   0x0020
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_G   0x0040
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_H   0x0080
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_I   0x0100
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_J   0x0200
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_K   0x0400
 
#define BITM_INT_ENABLE_YD_INTY_EN_DATA_L   0x0800
 
#define BITM_INT_ENABLE_YD_INTY_EN_FIFO_OFLOW   0x2000
 
#define BITM_INT_ENABLE_YD_INTY_EN_FIFO_UFLOW   0x4000
 
#define BITM_INT_ENABLE_YD_INTY_EN_FIFO_TH   0x8000
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_A   0
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_B   1
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_C   2
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_D   3
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_E   4
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_F   5
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_G   6
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_H   7
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_I   8
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_J   9
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_K   10
 
#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_L   11
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_A   0x0001
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_B   0x0002
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_C   0x0004
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_D   0x0008
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_E   0x0010
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_F   0x0020
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_G   0x0040
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_H   0x0080
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_I   0x0100
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_J   0x0200
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_K   0x0400
 
#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_L   0x0800
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_A   0
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_B   1
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_C   2
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_D   3
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_E   4
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_F   5
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_G   6
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_H   7
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_I   8
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_J   9
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_K   10
 
#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_L   11
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_A   0x0001
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_B   0x0002
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_C   0x0004
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_D   0x0008
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_E   0x0010
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_F   0x0020
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_G   0x0040
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_H   0x0080
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_I   0x0100
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_J   0x0200
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_K   0x0400
 
#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_L   0x0800
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_A   0
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_B   1
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_C   2
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_D   3
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_E   4
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_F   5
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_G   6
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_H   7
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_I   8
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_J   9
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_K   10
 
#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_L   11
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_A   0x0001
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_B   0x0002
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_C   0x0004
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_D   0x0008
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_E   0x0010
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_F   0x0020
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_G   0x0040
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_H   0x0080
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_I   0x0100
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_J   0x0200
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_K   0x0400
 
#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_L   0x0800
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_A   0
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_B   1
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_C   2
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_D   3
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_E   4
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_F   5
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_G   6
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_H   7
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_I   8
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_J   9
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_K   10
 
#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_L   11
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_A   0x0001
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_B   0x0002
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_C   0x0004
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_D   0x0008
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_E   0x0010
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_F   0x0020
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_G   0x0040
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_H   0x0080
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_I   0x0100
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_J   0x0200
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_K   0x0400
 
#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_L   0x0800
 
#define BITP_FIFO_STATUS_BYTES_ENA_STAT_SUM   0
 
#define BITP_FIFO_STATUS_BYTES_ENA_STAT_D1   1
 
#define BITP_FIFO_STATUS_BYTES_ENA_STAT_D2   2
 
#define BITP_FIFO_STATUS_BYTES_ENA_STAT_L0   3
 
#define BITP_FIFO_STATUS_BYTES_ENA_STAT_L1   4
 
#define BITP_FIFO_STATUS_BYTES_ENA_STAT_LX   5
 
#define BITP_FIFO_STATUS_BYTES_ENA_STAT_TS1   6
 
#define BITP_FIFO_STATUS_BYTES_ENA_STAT_TS2   7
 
#define BITP_FIFO_STATUS_BYTES_ENA_STAT_TSX   8
 
#define BITM_FIFO_STATUS_BYTES_ENA_STAT_SUM   0x0001
 
#define BITM_FIFO_STATUS_BYTES_ENA_STAT_D1   0x0002
 
#define BITM_FIFO_STATUS_BYTES_ENA_STAT_D2   0x0004
 
#define BITM_FIFO_STATUS_BYTES_ENA_STAT_L0   0x0008
 
#define BITM_FIFO_STATUS_BYTES_ENA_STAT_L1   0x0010
 
#define BITM_FIFO_STATUS_BYTES_ENA_STAT_LX   0x0020
 
#define BITM_FIFO_STATUS_BYTES_ENA_STAT_TS1   0x0040
 
#define BITM_FIFO_STATUS_BYTES_ENA_STAT_TS2   0x0080
 
#define BITM_FIFO_STATUS_BYTES_ENA_STAT_TSX   0x0100
 
#define BITP_INPUT_SLEEP_INP_SLEEP_12   0
 
#define BITP_INPUT_SLEEP_INP_SLEEP_34   4
 
#define BITP_INPUT_SLEEP_INP_SLEEP_56   8
 
#define BITP_INPUT_SLEEP_INP_SLEEP_78   12
 
#define BITM_INPUT_SLEEP_INP_SLEEP_12   0x000f
 
#define BITM_INPUT_SLEEP_INP_SLEEP_34   0x00f0
 
#define BITM_INPUT_SLEEP_INP_SLEEP_56   0x0f00
 
#define BITM_INPUT_SLEEP_INP_SLEEP_78   0xf000
 
#define BITP_INPUT_CFG_PAIR12   0
 
#define BITP_INPUT_CFG_PAIR34   1
 
#define BITP_INPUT_CFG_PAIR56   2
 
#define BITP_INPUT_CFG_PAIR78   3
 
#define BITP_INPUT_CFG_VC1_SLEEP   4
 
#define BITP_INPUT_CFG_VC2_SLEEP   6
 
#define BITM_INPUT_CFG_PAIR12   0
 
#define BITM_INPUT_CFG_PAIR34   0x0002
 
#define BITM_INPUT_CFG_PAIR56   0x0004
 
#define BITM_INPUT_CFG_PAIR78   0x0008
 
#define BITM_INPUT_CFG_VC1_SLEEP   0x0030
 
#define BITM_INPUT_CFG_VC2_SLEEP   0x00c0
 
#define BITP_GPIO_CFG_GPIO_PIN_CFG0   0
 
#define BITP_GPIO_CFG_GPIO_PIN_CFG1   3
 
#define BITP_GPIO_CFG_GPIO_PIN_CFG2   6
 
#define BITP_GPIO_CFG_GPIO_PIN_CFG3   9
 
#define BITP_GPIO_CFG_GPIO_DRV   12
 
#define BITP_GPIO_CFG_GPIO_SLEW   14
 
#define BITM_GPIO_CFG_GPIO_PIN_CFG0   0x0007
 
#define BITM_GPIO_CFG_GPIO_PIN_CFG1   0x0038
 
#define BITM_GPIO_CFG_GPIO_PIN_CFG2   0x01c0
 
#define BITM_GPIO_CFG_GPIO_PIN_CFG3   0x0e00
 
#define BITM_GPIO_CFG_GPIO_DRV   0x3000
 
#define BITM_GPIO_CFG_GPIO_SLEW   0xc000
 
#define BITP_GPIO01_GPIOOUT0   0
 
#define BITP_GPIO01_GPIOOUT1   8
 
#define BITP_GPIO01_TIMESTAMP_INV   14
 
#define BITP_GPIO01_TIMESTAMP_ALWAYS_EN   15
 
#define BITM_GPIO01_GPIOOUT0   0x001f
 
#define BITM_GPIO01_GPIOOUT1   0x1f00
 
#define BITM_GPIO01_TIMESTAMP_INV   0x4000
 
#define BITM_GPIO01_TIMESTAMP_ALWAYS_EN   0x8000
 
#define BITP_GPIO23_GPIOOUT2   0
 
#define BITP_GPIO23_GPIOOUT3   8
 
#define BITP_GPIO23_EXT_SYNC_EN   14
 
#define BITM_GPIO23_GPIOOUT2   0x001f
 
#define BITM_GPIO23_GPIOOUT3   0x1f00
 
#define BITM_GPIO23_EXT_SYNC_EN   0x4000
 
#define BITP_GPIO_IN_GPIO_INPUT   0
 
#define BITM_GPIO_IN_GPIO_INPUT   0x000f
 
#define BITP_GPIO_EXT_EXT_SYNC_GPIO   0
 
#define BITP_GPIO_EXT_EXT_SYNC_EN   2
 
#define BITP_GPIO_EXT_TIMESTAMP_GPIO   4
 
#define BITP_GPIO_EXT_TIMESTAMP_ALWAYS_EN   6
 
#define BITP_GPIO_EXT_TIMESTAMP_INV   7
 
#define BITP_GPIO_EXT_TS_GPIO_SLEEP   8
 
#define BITM_GPIO_EXT_EXT_SYNC_GPIO   0x0003
 
#define BITM_GPIO_EXT_EXT_SYNC_EN   0x0004
 
#define BITM_GPIO_EXT_TIMESTAMP_GPIO   0x0030
 
#define BITM_GPIO_EXT_TIMESTAMP_ALWAYS_EN   0x0040
 
#define BITM_GPIO_EXT_TIMESTAMP_INV   0x0080
 
#define BITM_GPIO_EXT_TS_GPIO_SLEEP   0x0100
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_A   0
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_B   1
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_C   2
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_D   3
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_E   4
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_F   5
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_G   6
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_H   7
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_I   8
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_J   9
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_K   10
 
#define BITP_DATA_HOLD_FLAG_HOLD_REGS_L   11
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_A   0x0001
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_B   0x0002
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_C   0x0004
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_D   0x0008
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_E   0x0010
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_F   0x0020
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_G   0x0040
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_H   0x0080
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_I   0x0100
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_J   0x0200
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_K   0x0400
 
#define BITM_DATA_HOLD_FLAG_HOLD_REGS_L   0x0800
 
#define BITP_FIFO_DATA_FIFO_DATA   0
 
#define BITM_FIFO_DATA_FIFO_DATA   0xffff
 
#define BITP_SIGNAL1_L_A_SIGNAL1_L   0
 
#define BITM_SIGNAL1_L_A_SIGNAL1_L   0xffff
 
#define BITP_SIGNAL1_H_A_SIGNAL1_H   0
 
#define BITM_SIGNAL1_H_A_SIGNAL1_H   0xffff
 
#define BITP_SIGNAL2_L_A_SIGNAL2_L   0
 
#define BITM_SIGNAL2_L_A_SIGNAL2_L   0xffff
 
#define BITP_SIGNAL2_H_A_SIGNAL2_H   0
 
#define BITM_SIGNAL2_H_A_SIGNAL2_H   0xffff
 
#define BITP_DARK1_L_A_DARK1_L   0
 
#define BITM_DARK1_L_A_DARK1_L   0xffff
 
#define BITP_DARK1_H_A_DARK1_H   0
 
#define BITM_DARK1_H_A_DARK1_H   0xffff
 
#define BITP_DARK2_L_A_DARK2_L   0
 
#define BITM_DARK2_L_A_DARK2_L   0xffff
 
#define BITP_DARK2_H_A_DARK2_H   0
 
#define BITM_DARK2_H_A_DARK2_H   0xffff
 
#define BITP_IO_ADJUST_SPI_DRV   0
 
#define BITP_IO_ADJUST_SPI_SLEW   2
 
#define BITM_IO_ADJUST_SPI_DRV   0x0003
 
#define BITM_IO_ADJUST_SPI_SLEW   0x000c
 
#define BITP_I2C_KEY_I2C_KEY   0
 
#define BITP_I2C_KEY_I2C_KEY_MATCH   12
 
#define BITM_I2C_KEY_I2C_KEY   0x0fff
 
#define BITM_I2C_KEY_I2C_KEY_MATCH   0xf000
 
#define BITP_I2C_ADDR_I2C_SLAVE_ADDR   1
 
#define BITP_I2C_ADDR_I2C_SLAVE_KEY2   8
 
#define BITM_I2C_ADDR_I2C_SLAVE_ADDR   0x00fe
 
#define BITM_I2C_ADDR_I2C_SLAVE_KEY2   0xff00
 
#define BITP_TS_CTRL_A_TIMESLOT_OFFSET   0
 
#define BITP_TS_CTRL_A_INPUT_R_SELECT   10
 
#define BITP_TS_CTRL_A_SAMPLE_TYPE   12
 
#define BITP_TS_CTRL_A_CH2_EN   14
 
#define BITP_TS_CTRL_A_SUBSAMPLE   15
 
#define BITM_TS_CTRL_A_TIMESLOT_OFFSET   0x03ff
 
#define BITM_TS_CTRL_A_INPUT_R_SELECT   0x0c00
 
#define BITM_TS_CTRL_A_SAMPLE_TYPE   0x3000
 
#define BITM_TS_CTRL_A_CH2_EN   0x4000
 
#define BITM_TS_CTRL_A_SUBSAMPLE   0x8000
 
#define BITP_TS_PATH_A_AFE_PATH_CFG   0
 
#define BITP_TS_PATH_A_PRE_WIDTH   12
 
#define BITM_TS_PATH_A_AFE_PATH_CFG   0x01ff
 
#define BITM_TS_PATH_A_PRE_WIDTH   0xf000
 
#define BITP_INPUTS_A_INP12   0
 
#define BITP_INPUTS_A_INP34   4
 
#define BITP_INPUTS_A_INP56   8
 
#define BITP_INPUTS_A_INP78   12
 
#define BITM_INPUTS_A_INP12   0x000f
 
#define BITM_INPUTS_A_INP34   0x00f0
 
#define BITM_INPUTS_A_INP56   0x0f00
 
#define BITM_INPUTS_A_INP78   0xf000
 
#define BITP_CATHODE_A_VC1_SEL   0
 
#define BITP_CATHODE_A_VC1_ALT   2
 
#define BITP_CATHODE_A_VC1_PULSE   4
 
#define BITP_CATHODE_A_VC2_SEL   6
 
#define BITP_CATHODE_A_VC2_ALT   8
 
#define BITP_CATHODE_A_VC2_PULSE   10
 
#define BITP_CATHODE_A_PRECON   12
 
#define BITM_CATHODE_A_VC1_SEL   0x0003
 
#define BITM_CATHODE_A_VC1_ALT   0x000c
 
#define BITM_CATHODE_A_VC1_PULSE   0x0030
 
#define BITM_CATHODE_A_VC2_SEL   0x00c0
 
#define BITM_CATHODE_A_VC2_ALT   0x0300
 
#define BITM_CATHODE_A_VC2_PULSE   0x0c00
 
#define BITM_CATHODE_A_PRECON   0x7000
 
#define BITP_AFE_TRIM_A_TIA_GAIN_CH1   0
 
#define BITP_AFE_TRIM_A_TIA_GAIN_CH2   3
 
#define BITP_AFE_TRIM_A_VREF_PULSE_VAL   6
 
#define BITP_AFE_TRIM_A_AFE_TRIM_VREF   8
 
#define BITP_AFE_TRIM_A_VREF_PULSE   10
 
#define BITP_AFE_TRIM_A_CH1_TRIM_INT   11
 
#define BITP_AFE_TRIM_A_CH2_TRIM_INT   13
 
#define BITP_AFE_TRIM_A_TIA_CEIL_DETECT_EN   15
 
#define BITM_AFE_TRIM_A_TIA_GAIN_CH1   0x0007
 
#define BITM_AFE_TRIM_A_TIA_GAIN_CH2   0x0038
 
#define BITM_AFE_TRIM_A_VREF_PULSE_VAL   0x00c0
 
#define BITM_AFE_TRIM_A_AFE_TRIM_VREF   0x0300
 
#define BITM_AFE_TRIM_A_VREF_PULSE   0x0400
 
#define BITM_AFE_TRIM_A_CH1_TRIM_INT   0x1800
 
#define BITM_AFE_TRIM_A_CH2_TRIM_INT   0x6000
 
#define BITM_AFE_TRIM_A_TIA_CEIL_DETECT_EN   0x8000
 
#define BITP_LED_POW12_A_LED_CURRENT1   0
 
#define BITP_LED_POW12_A_LED_DRIVESIDE1   7
 
#define BITP_LED_POW12_A_LED_CURRENT2   8
 
#define BITP_LED_POW12_A_LED_DRIVESIDE2   15
 
#define BITM_LED_POW12_A_LED_CURRENT1   0x007f
 
#define BITM_LED_POW12_A_LED_DRIVESIDE1   0x0080
 
#define BITM_LED_POW12_A_LED_CURRENT2   0x7f00
 
#define BITM_LED_POW12_A_LED_DRIVESIDE2   0x8000
 
#define BITP_LED_POW34_A_LED_CURRENT3   0
 
#define BITP_LED_POW34_A_LED_DRIVESIDE3   7
 
#define BITP_LED_POW34_A_LED_CURRENT4   8
 
#define BITP_LED_POW34_A_LED_DRIVESIDE4   15
 
#define BITM_LED_POW34_A_LED_CURRENT3   0x007f
 
#define BITM_LED_POW34_A_LED_DRIVESIDE3   0x0080
 
#define BITM_LED_POW34_A_LED_CURRENT4   0x7f00
 
#define BITM_LED_POW34_A_LED_DRIVESIDE4   0x8000
 
#define BITP_COUNTS_A_NUM_REPEAT   0
 
#define BITP_COUNTS_A_NUM_INT   8
 
#define BITM_COUNTS_A_NUM_REPEAT   0x00ff
 
#define BITM_COUNTS_A_NUM_INT   0xff00
 
#define BITP_PERIOD_A_MIN_PERIOD   0
 
#define BITP_PERIOD_A_MOD_TYPE   12
 
#define BITM_PERIOD_A_MIN_PERIOD   0x03ff
 
#define BITM_PERIOD_A_MOD_TYPE   0x3000
 
#define BITP_LED_PULSE_A_LED_OFFSET   0
 
#define BITP_LED_PULSE_A_LED_WIDTH   8
 
#define BITM_LED_PULSE_A_LED_OFFSET   0x00ff
 
#define BITM_LED_PULSE_A_LED_WIDTH   0xff00
 
#define BITP_INTEG_WIDTH_A_INTEG_WIDTH   0
 
#define BITP_INTEG_WIDTH_A_ADC_COUNT   6
 
#define BITP_INTEG_WIDTH_A_CH1_AMP_DISABLE   8
 
#define BITP_INTEG_WIDTH_A_AFE_INT_C_BUF   11
 
#define BITP_INTEG_WIDTH_A_CH2_AMP_DISABLE   12
 
#define BITP_INTEG_WIDTH_A_SINGLE_INTEG   15
 
#define BITM_INTEG_WIDTH_A_INTEG_WIDTH   0x001f
 
#define BITM_INTEG_WIDTH_A_ADC_COUNT   0x00c0
 
#define BITM_INTEG_WIDTH_A_CH1_AMP_DISABLE   0x0700
 
#define BITM_INTEG_WIDTH_A_AFE_INT_C_BUF   0x0800
 
#define BITM_INTEG_WIDTH_A_CH2_AMP_DISABLE   0x7000
 
#define BITM_INTEG_WIDTH_A_SINGLE_INTEG   0x8000
 
#define BITP_INTEG_OFFSET_A_INTEG_OFFSET   0
 
#define BITM_INTEG_OFFSET_A_INTEG_OFFSET   0x1fff
 
#define BITP_INTEG_OFFSET_A_INTEG_OFFSET_UPPER   5
 
#define BITM_INTEG_OFFSET_A_INTEG_OFFSET_UPPER   0xff
 
#define BITP_MOD_PULSE_A_MOD_OFFSET   0
 
#define BITP_MOD_PULSE_A_MOD_WIDTH   8
 
#define BITM_MOD_PULSE_A_MOD_OFFSET   0x00ff
 
#define BITM_MOD_PULSE_A_MOD_WIDTH   0xff00
 
#define BITP_PATTERN_A_REVERSE_INTEG   0
 
#define BITP_PATTERN_A_SUBTRACT   4
 
#define BITP_PATTERN_A_MOD_DISABLE   8
 
#define BITP_PATTERN_A_LED_DISABLE   12
 
#define BITM_PATTERN_A_REVERSE_INTEG   0x000f
 
#define BITM_PATTERN_A_SUBTRACT   0x00f0
 
#define BITM_PATTERN_A_MOD_DISABLE   0x0f00
 
#define BITM_PATTERN_A_LED_DISABLE   0xf000
 
#define BITP_ADC_OFF1_A_CH1_ADC_ADJUST   0
 
#define BITM_ADC_OFF1_A_CH1_ADC_ADJUST   0x3fff
 
#define BITP_ADC_OFF2_A_CH2_ADC_ADJUST   0
 
#define BITP_ADC_OFF2_A_ZERO_ADJUST   15
 
#define BITM_ADC_OFF2_A_CH2_ADC_ADJUST   0x3fff
 
#define BITM_ADC_OFF2_A_ZERO_ADJUST   0x8000
 
#define BITP_DATA1_A_SIGNAL_SIZE   0
 
#define BITP_DATA1_A_SIGNAL_SHIFT   3
 
#define BITP_DATA1_A_DARK_SIZE   8
 
#define BITP_DATA1_A_DARK_SHIFT   11
 
#define BITM_DATA1_A_SIGNAL_SIZE   0x0007
 
#define BITM_DATA1_A_SIGNAL_SHIFT   0x00f8
 
#define BITM_DATA1_A_DARK_SIZE   0x0700
 
#define BITM_DATA1_A_DARK_SHIFT   0xf800
 
#define BITP_DATA2_A_LIT_SIZE   0
 
#define BITP_DATA2_A_LIT_SHIFT   3
 
#define BITM_DATA2_A_LIT_SIZE   0x0007
 
#define BITM_DATA2_A_LIT_SHIFT   0x00f8
 
#define BITP_DECIMATE_A_DECIMATE_TYPE   0
 
#define BITP_DECIMATE_A_DECIMATE_FACTOR   4
 
#define BITM_DECIMATE_A_DECIMATE_TYPE   0x000f
 
#define BITM_DECIMATE_A_DECIMATE_FACTOR   0x07f0
 
#define BITP_DIGINT_LIT_A_LIT_OFFSET   0
 
#define BITM_DIGINT_LIT_A_LIT_OFFSET   0x01ff
 
#define BITP_DIGINT_DARK_A_DARK1_OFFSET   0
 
#define BITP_DIGINT_DARK_A_DARK2_OFFSET   7
 
#define BITM_DIGINT_DARK_A_DARK1_OFFSET   0x007f
 
#define BITM_DIGINT_DARK_A_DARK2_OFFSET   0xff80
 
#define BITP_THRESH_CFG_A_THRESH0_TYPE   0
 
#define BITP_THRESH_CFG_A_THRESH0_DIR   2
 
#define BITP_THRESH_CFG_A_THRESH0_CHAN   3
 
#define BITP_THRESH_CFG_A_THRESH1_TYPE   4
 
#define BITP_THRESH_CFG_A_THRESH1_DIR   6
 
#define BITP_THRESH_CFG_A_THRESH1_CHAN   7
 
#define BITM_THRESH_CFG_A_THRESH0_TYPE   0x0003
 
#define BITM_THRESH_CFG_A_THRESH0_DIR   0x0004
 
#define BITM_THRESH_CFG_A_THRESH0_CHAN   0x0008
 
#define BITM_THRESH_CFG_A_THRESH1_TYPE   0x0030
 
#define BITM_THRESH_CFG_A_THRESH1_DIR   0x0040
 
#define BITM_THRESH_CFG_A_THRESH1_CHAN   0x0080
 
#define BITP_THRESH0_A_THRESH0_VALUE   0
 
#define BITP_THRESH0_A_THRESH0_SHIFT   8
 
#define BITM_THRESH0_A_THRESH0_VALUE   0x00ff
 
#define BITM_THRESH0_A_THRESH0_SHIFT   0x1f00
 
#define BITP_THRESH1_A_THRESH1_VALUE   0
 
#define BITP_THRESH1_A_THRESH1_SHIFT   8
 
#define BITM_THRESH1_A_THRESH1_VALUE   0x00ff
 
#define BITM_THRESH1_A_THRESH1_SHIFT   0x1f00
 
#define ADPD410X_LOW_FREQ_OSCILLATOR_FREQ1   1000000
 
#define ADPD410X_LOW_FREQ_OSCILLATOR_FREQ2   32768
 
#define ADPD410X_HIGH_FREQ_OSCILLATOR_FREQ   32000000
 
#define ADPD410X_MAX_SLOT_NUMBER   12
 
#define ADPD410X_LED_CURR_LSB   1.333
 
#define ADPD410X_MAX_NUM_INT   255
 
#define ADPD410X_MAX_PULSE_LENGTH   255
 
#define ADPD410X_MAX_INTEG_OS   255
 
#define ADPD410X_FIFO_DEPTH   512
 
#define ADPD410X_MAX_SAMPLING_FREQ   9000
 
#define ADPD410X_UPPDER_BYTE_SPI_MASK   0x7f80
 
#define ADPD410X_LOWER_BYTE_SPI_MASK   0xfe
 
#define ADPD410X_UPPDER_BYTE_I2C_MASK   0x7f00
 
#define ADPD410X_LOWER_BYTE_I2C_MASK   0xff
 

Enumerations

enum  adpd410x_supported_dev {
  ADPD4100,
  ADPD4101
}
 Devices supported by the driver. More...
 
enum  adpd410x_opmode {
  ADPD410X_STANDBY,
  ADPD410X_GOMODE
}
 Operation modes of the device. More...
 
enum  adpd410x_ts_input_pair {
  ADPD410X_INP12,
  ADPD410X_INP34,
  ADPD410X_INP56,
  ADPD410X_INP78
}
 List of input pairs options for time slots. More...
 
enum  adpd410x_ts_input_opt {
  ADPD410X_INaDIS_INbDIS,
  ADPD410X_INaCH1_INbDIS,
  ADPD410X_INaCH2_INbDIS,
  ADPD410X_INaDIS_INbCH1,
  ADPD410X_INaDIS_INbCH2,
  ADPD410X_INaCH1_INbCH2,
  ADPD410X_INaCH2_INbCH1,
  ADPD410X_INaCH1_INbCH1,
  ADPD410X_INaCH2_INbCH2
}
 List of input configurations for time slot. More...
 
enum  adpd410x_precon_opt {
  ADPD410X_FLOAT_INS,
  ADPD410X_VC1,
  ADPD410X_VC2,
  ADPD410X_VICM,
  ADPD410X_TIA_IN,
  ADPD410X_TIA_VREF,
  ADPD410X_SHORT_INS
}
 Time slot input precondition options. More...
 
enum  adpd410x_tia_vref_volt {
  ADPD410X_TIA_VREF_1V1385,
  ADPD410X_TIA_VREF_1V012,
  ADPD410X_TIA_VREF_0V8855,
  ADPD410X_TIA_VREF_1V256
}
 TIA reference voltage options. More...
 
enum  adpd410x_tia_vref_ref {
  ADPD410X_TIA_VREF_200K,
  ADPD410X_TIA_VREF_100K,
  ADPD410X_TIA_VREF_50K,
  ADPD410X_TIA_VREF_25K,
  ADPD410X_TIA_VREF_12K5
}
 TIA resistor gain setting. More...
 
enum  adpd410x_led_output_opt {
  ADPD410X_OUTPUT_A,
  ADPD410X_OUTPUT_B
}
 LED output option. More...
 
enum  adpd410x_timeslots {
  ADPD410X_TS_A,
  ADPD410X_TS_B,
  ADPD410X_TS_C,
  ADPD410X_TS_D,
  ADPD410X_TS_E,
  ADPD410X_TS_F,
  ADPD410X_TS_G,
  ADPD410X_TS_H,
  ADPD410X_TS_I,
  ADPD410X_TS_J,
  ADPD410X_TS_K,
  ADPD410X_TS_L
}
 Available Time slots. More...
 
enum  adpd410x_clk_opt {
  ADPD410X_INTLFO_INTHFO,
  ADPD410X_EXTLFO_INTHFO,
  ADPD410X_INTLFO_EXTHFO,
  ADPD410X_GENLFO_EXTHFO
}
 External clock options. More...
 

Functions

int32_t adpd410x_reg_read (struct adpd410x_dev *dev, uint16_t address, uint16_t *data)
 Read device register. More...
 
int32_t adpd410x_reg_read_bytes (struct adpd410x_dev *dev, uint16_t address, uint8_t *data, uint16_t num_bytes)
 Read a specified number of bytes from device register. More...
 
int32_t adpd410x_reg_write (struct adpd410x_dev *dev, uint16_t address, uint16_t data)
 Write device register. More...
 
int32_t adpd410x_reg_write_mask (struct adpd410x_dev *dev, uint16_t address, uint16_t data, uint16_t mask)
 Do a read and write of a register to update only part of a register. More...
 
int32_t adpd410x_reset (struct adpd410x_dev *dev)
 Do a software reset. More...
 
int32_t adpd410x_set_opmode (struct adpd410x_dev *dev, enum adpd410x_opmode mode)
 Set operation mode. More...
 
int32_t adpd410x_get_opmode (struct adpd410x_dev *dev, enum adpd410x_opmode *mode)
 Get operation mode. More...
 
int32_t adpd410x_set_last_timeslot (struct adpd410x_dev *dev, uint8_t timeslot_no)
 
int32_t adpd410x_get_last_timeslot (struct adpd410x_dev *dev, enum adpd410x_timeslots *timeslot_no)
 Get number of active time slots. More...
 
int32_t adpd410x_set_sampling_freq (struct adpd410x_dev *dev, uint32_t sampling_freq)
 Set device sampling frequency. More...
 
int32_t adpd410x_get_sampling_freq (struct adpd410x_dev *dev, uint32_t *sampling_freq)
 Get device sampling frequency. More...
 
int32_t adpd410x_timeslot_setup (struct adpd410x_dev *dev, enum adpd410x_timeslots timeslot_no, struct adpd410x_timeslot_init *init)
 Setup an active time slot. More...
 
int32_t adpd410x_get_fifo_bytecount (struct adpd410x_dev *dev, uint16_t *bytes)
 Get number of bytes in the device FIFO. More...
 
int32_t adpd410x_read_fifo (struct adpd410x_dev *dev, uint32_t *data, uint16_t num_samples, uint8_t datawidth)
 Reads a certain number of bytes from the fifo and stores in data Used to read a large amount of data from the fifo efficiently (using as few register reads as possible.) More...
 
int32_t adpd410x_get_data (struct adpd410x_dev *dev, uint32_t *data)
 Get a full data packet from the device containing data from all active time slots. More...
 
int32_t adpd410x_setup (struct adpd410x_dev **device, struct adpd410x_init_param *init_param)
 Setup the device and the driver. More...
 
int32_t adpd410x_remove (struct adpd410x_dev *dev)
 Free memory allocated by adpd410x_setup(). More...
 

Detailed Description

Author
Andrei Drimbarean (andre.nosp@m.i.dr.nosp@m.imbar.nosp@m.ean@.nosp@m.analo.nosp@m.g.co.nosp@m.m)

Copyright 2020(c) Analog Devices, Inc.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ ADPD410X_CHIP_ID

#define ADPD410X_CHIP_ID   0xC2

◆ ADPD410X_FIFO_DEPTH

#define ADPD410X_FIFO_DEPTH   512

◆ ADPD410X_HIGH_FREQ_OSCILLATOR_FREQ

#define ADPD410X_HIGH_FREQ_OSCILLATOR_FREQ   32000000

◆ ADPD410X_LED_CURR_LSB

#define ADPD410X_LED_CURR_LSB   1.333

◆ ADPD410X_LOW_FREQ_OSCILLATOR_FREQ1

#define ADPD410X_LOW_FREQ_OSCILLATOR_FREQ1   1000000

◆ ADPD410X_LOW_FREQ_OSCILLATOR_FREQ2

#define ADPD410X_LOW_FREQ_OSCILLATOR_FREQ2   32768

◆ ADPD410X_LOWER_BYTE_I2C_MASK

#define ADPD410X_LOWER_BYTE_I2C_MASK   0xff

◆ ADPD410X_LOWER_BYTE_SPI_MASK

#define ADPD410X_LOWER_BYTE_SPI_MASK   0xfe

◆ ADPD410X_MAX_INTEG_OS

#define ADPD410X_MAX_INTEG_OS   255

◆ ADPD410X_MAX_NUM_INT

#define ADPD410X_MAX_NUM_INT   255

◆ ADPD410X_MAX_PULSE_LENGTH

#define ADPD410X_MAX_PULSE_LENGTH   255

◆ ADPD410X_MAX_SAMPLING_FREQ

#define ADPD410X_MAX_SAMPLING_FREQ   9000

◆ ADPD410X_MAX_SLOT_NUMBER

#define ADPD410X_MAX_SLOT_NUMBER   12

◆ ADPD410X_REG_ADC_OFF1

#define ADPD410X_REG_ADC_OFF1 (   ts)    (0x010E + (ts) * 0x20)

◆ ADPD410X_REG_ADC_OFF2

#define ADPD410X_REG_ADC_OFF2 (   ts)    (0x010F + (ts) * 0x20)

◆ ADPD410X_REG_AFE_TRIM

#define ADPD410X_REG_AFE_TRIM (   ts)    (0x0104 + (ts) * 0x20)

◆ ADPD410X_REG_CATHODE

#define ADPD410X_REG_CATHODE (   ts)    (0x0103 + (ts) * 0x20)

◆ ADPD410X_REG_CHIP_ID

#define ADPD410X_REG_CHIP_ID   0x0008

◆ ADPD410X_REG_COUNTS

#define ADPD410X_REG_COUNTS (   ts)    (0x0107 + (ts) * 0x20)

◆ ADPD410X_REG_DARK1_H

#define ADPD410X_REG_DARK1_H (   ts)    (0x0035 + (ts) * 0x08)

◆ ADPD410X_REG_DARK1_L

#define ADPD410X_REG_DARK1_L (   ts)    (0x0034 + (ts) * 0x08)

◆ ADPD410X_REG_DARK2_H

#define ADPD410X_REG_DARK2_H (   ts)    (0x0037 + (ts) * 0x08)

◆ ADPD410X_REG_DARK2_L

#define ADPD410X_REG_DARK2_L (   ts)    (0x0036 + (ts) * 0x08)

◆ ADPD410X_REG_DATA1

#define ADPD410X_REG_DATA1 (   ts)    (0x0110 + (ts) * 0x20)

◆ ADPD410X_REG_DATA2

#define ADPD410X_REG_DATA2 (   ts)    (0x0111 + (ts) * 0x20)

◆ ADPD410X_REG_DATA_HOLD_FLAG

#define ADPD410X_REG_DATA_HOLD_FLAG   0x002E

◆ ADPD410X_REG_DECIMATE

#define ADPD410X_REG_DECIMATE (   ts)    (0x0112 + (ts) * 0x20)

◆ ADPD410X_REG_DIGINT_DARK

#define ADPD410X_REG_DIGINT_DARK (   ts)    (0x0114 + (ts) * 0x20)

◆ ADPD410X_REG_DIGINT_LIT

#define ADPD410X_REG_DIGINT_LIT (   ts)    (0x0113 + (ts) * 0x20)

◆ ADPD410X_REG_FIFO_DATA

#define ADPD410X_REG_FIFO_DATA   0x002F

◆ ADPD410X_REG_FIFO_STATUS

#define ADPD410X_REG_FIFO_STATUS   0x0000

◆ ADPD410X_REG_FIFO_STATUS_BYTES

#define ADPD410X_REG_FIFO_STATUS_BYTES   0x001e

◆ ADPD410X_REG_FIFO_TH

#define ADPD410X_REG_FIFO_TH   0x0006

◆ ADPD410X_REG_GPIO01

#define ADPD410X_REG_GPIO01   0x0023

◆ ADPD410X_REG_GPIO23

#define ADPD410X_REG_GPIO23   0x0024

◆ ADPD410X_REG_GPIO_CFG

#define ADPD410X_REG_GPIO_CFG   0x0022

◆ ADPD410X_REG_GPIO_EXT

#define ADPD410X_REG_GPIO_EXT   0x0026

◆ ADPD410X_REG_GPIO_IN

#define ADPD410X_REG_GPIO_IN   0x0025

◆ ADPD410X_REG_I2C_ADDR

#define ADPD410X_REG_I2C_ADDR   0x00B7

◆ ADPD410X_REG_I2C_KEY

#define ADPD410X_REG_I2C_KEY   0x00B6

◆ ADPD410X_REG_INPUT_CFG

#define ADPD410X_REG_INPUT_CFG   0x0021

◆ ADPD410X_REG_INPUT_SLEEP

#define ADPD410X_REG_INPUT_SLEEP   0x0020

◆ ADPD410X_REG_INPUTS

#define ADPD410X_REG_INPUTS (   ts)    (0x0102 + (ts) * 0x20)

◆ ADPD410X_REG_INT_ACLEAR

#define ADPD410X_REG_INT_ACLEAR   0x0007

◆ ADPD410X_REG_INT_ENABLE_XD

#define ADPD410X_REG_INT_ENABLE_XD   0x0014

◆ ADPD410X_REG_INT_ENABLE_XL0

#define ADPD410X_REG_INT_ENABLE_XL0   0x0016

◆ ADPD410X_REG_INT_ENABLE_XL1

#define ADPD410X_REG_INT_ENABLE_XL1   0x0017

◆ ADPD410X_REG_INT_ENABLE_YD

#define ADPD410X_REG_INT_ENABLE_YD   0x0015

◆ ADPD410X_REG_INT_ENABLE_YL0

#define ADPD410X_REG_INT_ENABLE_YL0   0x001a

◆ ADPD410X_REG_INT_ENABLE_YL1

#define ADPD410X_REG_INT_ENABLE_YL1   0x001b

◆ ADPD410X_REG_INT_STATUS_DATA

#define ADPD410X_REG_INT_STATUS_DATA   0x0001

◆ ADPD410X_REG_INT_STATUS_LEV0

#define ADPD410X_REG_INT_STATUS_LEV0   0x0002

◆ ADPD410X_REG_INT_STATUS_LEV1

#define ADPD410X_REG_INT_STATUS_LEV1   0x0003

◆ ADPD410X_REG_INTEG_OFFSET

#define ADPD410X_REG_INTEG_OFFSET (   ts)    (0x010B + (ts) * 0x20)

◆ ADPD410X_REG_INTEG_WIDTH

#define ADPD410X_REG_INTEG_WIDTH (   ts)    (0x010A + (ts) * 0x20)

◆ ADPD410X_REG_IO_ADJUST

#define ADPD410X_REG_IO_ADJUST   0x00B4

◆ ADPD410X_REG_LED_POW12

#define ADPD410X_REG_LED_POW12 (   ts)    (0x0105 + (ts) * 0x20)

◆ ADPD410X_REG_LED_POW34

#define ADPD410X_REG_LED_POW34 (   ts)    (0x0106 + (ts) * 0x20)

◆ ADPD410X_REG_LED_PULSE

#define ADPD410X_REG_LED_PULSE (   ts)    (0x0109 + (ts) * 0x20)

◆ ADPD410X_REG_MOD_PULSE

#define ADPD410X_REG_MOD_PULSE (   ts)    (0x010C + (ts) * 0x20)

◆ ADPD410X_REG_OPMODE

#define ADPD410X_REG_OPMODE   0x0010

◆ ADPD410X_REG_OSC1M

#define ADPD410X_REG_OSC1M   0x000B

◆ ADPD410X_REG_OSC32K

#define ADPD410X_REG_OSC32K   0x000C

◆ ADPD410X_REG_OSC32M

#define ADPD410X_REG_OSC32M   0x0009

◆ ADPD410X_REG_OSC32M_CAL

#define ADPD410X_REG_OSC32M_CAL   0x000A

◆ ADPD410X_REG_PATTERN

#define ADPD410X_REG_PATTERN (   ts)    (0x010D + (ts) * 0x20)

◆ ADPD410X_REG_PERIOD

#define ADPD410X_REG_PERIOD (   ts)    (0x0108 + (ts) * 0x20)

◆ ADPD410X_REG_SIGNAL1_H

#define ADPD410X_REG_SIGNAL1_H (   ts)    (0x0031 + (ts) * 0x08)

◆ ADPD410X_REG_SIGNAL1_L

#define ADPD410X_REG_SIGNAL1_L (   ts)    (0x0030 + (ts) * 0x08)

◆ ADPD410X_REG_SIGNAL2_H

#define ADPD410X_REG_SIGNAL2_H (   ts)    (0x0033 + (ts) * 0x08)

◆ ADPD410X_REG_SIGNAL2_L

#define ADPD410X_REG_SIGNAL2_L (   ts)    (0x0032 + (ts) * 0x08)

◆ ADPD410X_REG_STAMP_H

#define ADPD410X_REG_STAMP_H   0x0012

◆ ADPD410X_REG_STAMP_L

#define ADPD410X_REG_STAMP_L   0x0011

◆ ADPD410X_REG_STAMPDELTA

#define ADPD410X_REG_STAMPDELTA   0x0013

◆ ADPD410X_REG_SYS_CTL

#define ADPD410X_REG_SYS_CTL   0x000F

◆ ADPD410X_REG_THRESH0

#define ADPD410X_REG_THRESH0 (   ts)    (0x0116 + (ts) * 0x20)

◆ ADPD410X_REG_THRESH1

#define ADPD410X_REG_THRESH1 (   ts)    (0x0117 + (ts) * 0x20)

◆ ADPD410X_REG_THRESH_CFG

#define ADPD410X_REG_THRESH_CFG (   ts)    (0x0115 + (ts) * 0x20)

◆ ADPD410X_REG_TS_CTRL

#define ADPD410X_REG_TS_CTRL (   ts)    (0x0100 + (ts) * 0x20)

◆ ADPD410X_REG_TS_FREQ

#define ADPD410X_REG_TS_FREQ   0x000D

◆ ADPD410X_REG_TS_FREQH

#define ADPD410X_REG_TS_FREQH   0x000E

◆ ADPD410X_REG_TS_PATH

#define ADPD410X_REG_TS_PATH (   ts)    (0x0101 + (ts) * 0x20)

◆ ADPD410X_UPPDER_BYTE_I2C_MASK

#define ADPD410X_UPPDER_BYTE_I2C_MASK   0x7f00

◆ ADPD410X_UPPDER_BYTE_SPI_MASK

#define ADPD410X_UPPDER_BYTE_SPI_MASK   0x7f80

◆ BITM_ADC_OFF1_A_CH1_ADC_ADJUST

#define BITM_ADC_OFF1_A_CH1_ADC_ADJUST   0x3fff

◆ BITM_ADC_OFF2_A_CH2_ADC_ADJUST

#define BITM_ADC_OFF2_A_CH2_ADC_ADJUST   0x3fff

◆ BITM_ADC_OFF2_A_ZERO_ADJUST

#define BITM_ADC_OFF2_A_ZERO_ADJUST   0x8000

◆ BITM_AFE_TRIM_A_AFE_TRIM_VREF

#define BITM_AFE_TRIM_A_AFE_TRIM_VREF   0x0300

◆ BITM_AFE_TRIM_A_CH1_TRIM_INT

#define BITM_AFE_TRIM_A_CH1_TRIM_INT   0x1800

◆ BITM_AFE_TRIM_A_CH2_TRIM_INT

#define BITM_AFE_TRIM_A_CH2_TRIM_INT   0x6000

◆ BITM_AFE_TRIM_A_TIA_CEIL_DETECT_EN

#define BITM_AFE_TRIM_A_TIA_CEIL_DETECT_EN   0x8000

◆ BITM_AFE_TRIM_A_TIA_GAIN_CH1

#define BITM_AFE_TRIM_A_TIA_GAIN_CH1   0x0007

◆ BITM_AFE_TRIM_A_TIA_GAIN_CH2

#define BITM_AFE_TRIM_A_TIA_GAIN_CH2   0x0038

◆ BITM_AFE_TRIM_A_VREF_PULSE

#define BITM_AFE_TRIM_A_VREF_PULSE   0x0400

◆ BITM_AFE_TRIM_A_VREF_PULSE_VAL

#define BITM_AFE_TRIM_A_VREF_PULSE_VAL   0x00c0

◆ BITM_CATHODE_A_PRECON

#define BITM_CATHODE_A_PRECON   0x7000

◆ BITM_CATHODE_A_VC1_ALT

#define BITM_CATHODE_A_VC1_ALT   0x000c

◆ BITM_CATHODE_A_VC1_PULSE

#define BITM_CATHODE_A_VC1_PULSE   0x0030

◆ BITM_CATHODE_A_VC1_SEL

#define BITM_CATHODE_A_VC1_SEL   0x0003

◆ BITM_CATHODE_A_VC2_ALT

#define BITM_CATHODE_A_VC2_ALT   0x0300

◆ BITM_CATHODE_A_VC2_PULSE

#define BITM_CATHODE_A_VC2_PULSE   0x0c00

◆ BITM_CATHODE_A_VC2_SEL

#define BITM_CATHODE_A_VC2_SEL   0x00c0

◆ BITM_CHIP_ID

#define BITM_CHIP_ID   0x00ff

◆ BITM_CHIP_VERSION

#define BITM_CHIP_VERSION   0xff00

◆ BITM_COUNTS_A_NUM_INT

#define BITM_COUNTS_A_NUM_INT   0xff00

◆ BITM_COUNTS_A_NUM_REPEAT

#define BITM_COUNTS_A_NUM_REPEAT   0x00ff

◆ BITM_DARK1_H_A_DARK1_H

#define BITM_DARK1_H_A_DARK1_H   0xffff

◆ BITM_DARK1_L_A_DARK1_L

#define BITM_DARK1_L_A_DARK1_L   0xffff

◆ BITM_DARK2_H_A_DARK2_H

#define BITM_DARK2_H_A_DARK2_H   0xffff

◆ BITM_DARK2_L_A_DARK2_L

#define BITM_DARK2_L_A_DARK2_L   0xffff

◆ BITM_DATA1_A_DARK_SHIFT

#define BITM_DATA1_A_DARK_SHIFT   0xf800

◆ BITM_DATA1_A_DARK_SIZE

#define BITM_DATA1_A_DARK_SIZE   0x0700

◆ BITM_DATA1_A_SIGNAL_SHIFT

#define BITM_DATA1_A_SIGNAL_SHIFT   0x00f8

◆ BITM_DATA1_A_SIGNAL_SIZE

#define BITM_DATA1_A_SIGNAL_SIZE   0x0007

◆ BITM_DATA2_A_LIT_SHIFT

#define BITM_DATA2_A_LIT_SHIFT   0x00f8

◆ BITM_DATA2_A_LIT_SIZE

#define BITM_DATA2_A_LIT_SIZE   0x0007

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_A

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_A   0x0001

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_B

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_B   0x0002

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_C

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_C   0x0004

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_D

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_D   0x0008

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_E

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_E   0x0010

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_F

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_F   0x0020

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_G

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_G   0x0040

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_H

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_H   0x0080

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_I

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_I   0x0100

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_J

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_J   0x0200

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_K

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_K   0x0400

◆ BITM_DATA_HOLD_FLAG_HOLD_REGS_L

#define BITM_DATA_HOLD_FLAG_HOLD_REGS_L   0x0800

◆ BITM_DECIMATE_A_DECIMATE_FACTOR

#define BITM_DECIMATE_A_DECIMATE_FACTOR   0x07f0

◆ BITM_DECIMATE_A_DECIMATE_TYPE

#define BITM_DECIMATE_A_DECIMATE_TYPE   0x000f

◆ BITM_DIGINT_DARK_A_DARK1_OFFSET

#define BITM_DIGINT_DARK_A_DARK1_OFFSET   0x007f

◆ BITM_DIGINT_DARK_A_DARK2_OFFSET

#define BITM_DIGINT_DARK_A_DARK2_OFFSET   0xff80

◆ BITM_DIGINT_LIT_A_LIT_OFFSET

#define BITM_DIGINT_LIT_A_LIT_OFFSET   0x01ff

◆ BITM_FIFO_CTL_FIFO_TH

#define BITM_FIFO_CTL_FIFO_TH   0x03ff

◆ BITM_FIFO_DATA_FIFO_DATA

#define BITM_FIFO_DATA_FIFO_DATA   0xffff

◆ BITM_FIFO_STATUS_BYTES_ENA_STAT_D1

#define BITM_FIFO_STATUS_BYTES_ENA_STAT_D1   0x0002

◆ BITM_FIFO_STATUS_BYTES_ENA_STAT_D2

#define BITM_FIFO_STATUS_BYTES_ENA_STAT_D2   0x0004

◆ BITM_FIFO_STATUS_BYTES_ENA_STAT_L0

#define BITM_FIFO_STATUS_BYTES_ENA_STAT_L0   0x0008

◆ BITM_FIFO_STATUS_BYTES_ENA_STAT_L1

#define BITM_FIFO_STATUS_BYTES_ENA_STAT_L1   0x0010

◆ BITM_FIFO_STATUS_BYTES_ENA_STAT_LX

#define BITM_FIFO_STATUS_BYTES_ENA_STAT_LX   0x0020

◆ BITM_FIFO_STATUS_BYTES_ENA_STAT_SUM

#define BITM_FIFO_STATUS_BYTES_ENA_STAT_SUM   0x0001

◆ BITM_FIFO_STATUS_BYTES_ENA_STAT_TS1

#define BITM_FIFO_STATUS_BYTES_ENA_STAT_TS1   0x0040

◆ BITM_FIFO_STATUS_BYTES_ENA_STAT_TS2

#define BITM_FIFO_STATUS_BYTES_ENA_STAT_TS2   0x0080

◆ BITM_FIFO_STATUS_BYTES_ENA_STAT_TSX

#define BITM_FIFO_STATUS_BYTES_ENA_STAT_TSX   0x0100

◆ BITM_GPIO01_GPIOOUT0

#define BITM_GPIO01_GPIOOUT0   0x001f

◆ BITM_GPIO01_GPIOOUT1

#define BITM_GPIO01_GPIOOUT1   0x1f00

◆ BITM_GPIO01_TIMESTAMP_ALWAYS_EN

#define BITM_GPIO01_TIMESTAMP_ALWAYS_EN   0x8000

◆ BITM_GPIO01_TIMESTAMP_INV

#define BITM_GPIO01_TIMESTAMP_INV   0x4000

◆ BITM_GPIO23_EXT_SYNC_EN

#define BITM_GPIO23_EXT_SYNC_EN   0x4000

◆ BITM_GPIO23_GPIOOUT2

#define BITM_GPIO23_GPIOOUT2   0x001f

◆ BITM_GPIO23_GPIOOUT3

#define BITM_GPIO23_GPIOOUT3   0x1f00

◆ BITM_GPIO_CFG_GPIO_DRV

#define BITM_GPIO_CFG_GPIO_DRV   0x3000

◆ BITM_GPIO_CFG_GPIO_PIN_CFG0

#define BITM_GPIO_CFG_GPIO_PIN_CFG0   0x0007

◆ BITM_GPIO_CFG_GPIO_PIN_CFG1

#define BITM_GPIO_CFG_GPIO_PIN_CFG1   0x0038

◆ BITM_GPIO_CFG_GPIO_PIN_CFG2

#define BITM_GPIO_CFG_GPIO_PIN_CFG2   0x01c0

◆ BITM_GPIO_CFG_GPIO_PIN_CFG3

#define BITM_GPIO_CFG_GPIO_PIN_CFG3   0x0e00

◆ BITM_GPIO_CFG_GPIO_SLEW

#define BITM_GPIO_CFG_GPIO_SLEW   0xc000

◆ BITM_GPIO_EXT_EXT_SYNC_EN

#define BITM_GPIO_EXT_EXT_SYNC_EN   0x0004

◆ BITM_GPIO_EXT_EXT_SYNC_GPIO

#define BITM_GPIO_EXT_EXT_SYNC_GPIO   0x0003

◆ BITM_GPIO_EXT_TIMESTAMP_ALWAYS_EN

#define BITM_GPIO_EXT_TIMESTAMP_ALWAYS_EN   0x0040

◆ BITM_GPIO_EXT_TIMESTAMP_GPIO

#define BITM_GPIO_EXT_TIMESTAMP_GPIO   0x0030

◆ BITM_GPIO_EXT_TIMESTAMP_INV

#define BITM_GPIO_EXT_TIMESTAMP_INV   0x0080

◆ BITM_GPIO_EXT_TS_GPIO_SLEEP

#define BITM_GPIO_EXT_TS_GPIO_SLEEP   0x0100

◆ BITM_GPIO_IN_GPIO_INPUT

#define BITM_GPIO_IN_GPIO_INPUT   0x000f

◆ BITM_I2C_ADDR_I2C_SLAVE_ADDR

#define BITM_I2C_ADDR_I2C_SLAVE_ADDR   0x00fe

◆ BITM_I2C_ADDR_I2C_SLAVE_KEY2

#define BITM_I2C_ADDR_I2C_SLAVE_KEY2   0xff00

◆ BITM_I2C_KEY_I2C_KEY

#define BITM_I2C_KEY_I2C_KEY   0x0fff

◆ BITM_I2C_KEY_I2C_KEY_MATCH

#define BITM_I2C_KEY_I2C_KEY_MATCH   0xf000

◆ BITM_INPUT_CFG_PAIR12

#define BITM_INPUT_CFG_PAIR12   0

◆ BITM_INPUT_CFG_PAIR34

#define BITM_INPUT_CFG_PAIR34   0x0002

◆ BITM_INPUT_CFG_PAIR56

#define BITM_INPUT_CFG_PAIR56   0x0004

◆ BITM_INPUT_CFG_PAIR78

#define BITM_INPUT_CFG_PAIR78   0x0008

◆ BITM_INPUT_CFG_VC1_SLEEP

#define BITM_INPUT_CFG_VC1_SLEEP   0x0030

◆ BITM_INPUT_CFG_VC2_SLEEP

#define BITM_INPUT_CFG_VC2_SLEEP   0x00c0

◆ BITM_INPUT_SLEEP_INP_SLEEP_12

#define BITM_INPUT_SLEEP_INP_SLEEP_12   0x000f

◆ BITM_INPUT_SLEEP_INP_SLEEP_34

#define BITM_INPUT_SLEEP_INP_SLEEP_34   0x00f0

◆ BITM_INPUT_SLEEP_INP_SLEEP_56

#define BITM_INPUT_SLEEP_INP_SLEEP_56   0x0f00

◆ BITM_INPUT_SLEEP_INP_SLEEP_78

#define BITM_INPUT_SLEEP_INP_SLEEP_78   0xf000

◆ BITM_INPUTS_A_INP12

#define BITM_INPUTS_A_INP12   0x000f

◆ BITM_INPUTS_A_INP34

#define BITM_INPUTS_A_INP34   0x00f0

◆ BITM_INPUTS_A_INP56

#define BITM_INPUTS_A_INP56   0x0f00

◆ BITM_INPUTS_A_INP78

#define BITM_INPUTS_A_INP78   0xf000

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_A

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_A   0x0001

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_B

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_B   0x0002

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_C

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_C   0x0004

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_D

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_D   0x0008

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_E

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_E   0x0010

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_F

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_F   0x0020

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_G

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_G   0x0040

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_H

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_H   0x0080

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_I

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_I   0x0100

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_J

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_J   0x0200

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_K

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_K   0x0400

◆ BITM_INT_ACLEAR_INT_ACLEAR_DATA_L

#define BITM_INT_ACLEAR_INT_ACLEAR_DATA_L   0x0800

◆ BITM_INT_ACLEAR_INT_ACLEAR_FIFO

#define BITM_INT_ACLEAR_INT_ACLEAR_FIFO   0x8000

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_A

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_A   0x0001

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_B

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_B   0x0002

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_C

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_C   0x0004

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_D

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_D   0x0008

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_E

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_E   0x0010

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_F

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_F   0x0020

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_G

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_G   0x0040

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_H

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_H   0x0080

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_I

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_I   0x0100

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_J

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_J   0x0200

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_K

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_K   0x0400

◆ BITM_INT_ENABLE_XD_INTX_EN_DATA_L

#define BITM_INT_ENABLE_XD_INTX_EN_DATA_L   0x0800

◆ BITM_INT_ENABLE_XD_INTX_EN_FIFO_OFLOW

#define BITM_INT_ENABLE_XD_INTX_EN_FIFO_OFLOW   0x2000

◆ BITM_INT_ENABLE_XD_INTX_EN_FIFO_TH

#define BITM_INT_ENABLE_XD_INTX_EN_FIFO_TH   0x8000

◆ BITM_INT_ENABLE_XD_INTX_EN_FIFO_UFLOW

#define BITM_INT_ENABLE_XD_INTX_EN_FIFO_UFLOW   0x4000

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_A

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_A   0x0001

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_B

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_B   0x0002

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_C

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_C   0x0004

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_D

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_D   0x0008

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_E

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_E   0x0010

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_F

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_F   0x0020

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_G

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_G   0x0040

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_H

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_H   0x0080

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_I

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_I   0x0100

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_J

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_J   0x0200

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_K

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_K   0x0400

◆ BITM_INT_ENABLE_XL0_INTX_EN_LEV0_L

#define BITM_INT_ENABLE_XL0_INTX_EN_LEV0_L   0x0800

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_A

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_A   0x0001

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_B

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_B   0x0002

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_C

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_C   0x0004

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_D

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_D   0x0008

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_E

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_E   0x0010

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_F

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_F   0x0020

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_G

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_G   0x0040

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_H

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_H   0x0080

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_I

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_I   0x0100

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_J

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_J   0x0200

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_K

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_K   0x0400

◆ BITM_INT_ENABLE_XL1_INTX_EN_LEV1_L

#define BITM_INT_ENABLE_XL1_INTX_EN_LEV1_L   0x0800

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_A

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_A   0x0001

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_B

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_B   0x0002

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_C

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_C   0x0004

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_D

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_D   0x0008

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_E

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_E   0x0010

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_F

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_F   0x0020

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_G

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_G   0x0040

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_H

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_H   0x0080

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_I

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_I   0x0100

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_J

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_J   0x0200

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_K

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_K   0x0400

◆ BITM_INT_ENABLE_YD_INTY_EN_DATA_L

#define BITM_INT_ENABLE_YD_INTY_EN_DATA_L   0x0800

◆ BITM_INT_ENABLE_YD_INTY_EN_FIFO_OFLOW

#define BITM_INT_ENABLE_YD_INTY_EN_FIFO_OFLOW   0x2000

◆ BITM_INT_ENABLE_YD_INTY_EN_FIFO_TH

#define BITM_INT_ENABLE_YD_INTY_EN_FIFO_TH   0x8000

◆ BITM_INT_ENABLE_YD_INTY_EN_FIFO_UFLOW

#define BITM_INT_ENABLE_YD_INTY_EN_FIFO_UFLOW   0x4000

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_A

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_A   0x0001

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_B

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_B   0x0002

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_C

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_C   0x0004

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_D

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_D   0x0008

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_E

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_E   0x0010

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_F

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_F   0x0020

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_G

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_G   0x0040

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_H

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_H   0x0080

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_I

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_I   0x0100

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_J

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_J   0x0200

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_K

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_K   0x0400

◆ BITM_INT_ENABLE_YL0_INTY_EN_LEV0_L

#define BITM_INT_ENABLE_YL0_INTY_EN_LEV0_L   0x0800

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_A

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_A   0x0001

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_B

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_B   0x0002

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_C

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_C   0x0004

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_D

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_D   0x0008

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_E

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_E   0x0010

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_F

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_F   0x0020

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_G

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_G   0x0040

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_H

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_H   0x0080

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_I

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_I   0x0100

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_J

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_J   0x0200

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_K

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_K   0x0400

◆ BITM_INT_ENABLE_YL1_INTY_EN_LEV1_L

#define BITM_INT_ENABLE_YL1_INTY_EN_LEV1_L   0x0800

◆ BITM_INT_STATUS_DATA_INT_DATA_A

#define BITM_INT_STATUS_DATA_INT_DATA_A   0x0001

◆ BITM_INT_STATUS_DATA_INT_DATA_B

#define BITM_INT_STATUS_DATA_INT_DATA_B   0x0002

◆ BITM_INT_STATUS_DATA_INT_DATA_C

#define BITM_INT_STATUS_DATA_INT_DATA_C   0x0004

◆ BITM_INT_STATUS_DATA_INT_DATA_D

#define BITM_INT_STATUS_DATA_INT_DATA_D   0x0008

◆ BITM_INT_STATUS_DATA_INT_DATA_E

#define BITM_INT_STATUS_DATA_INT_DATA_E   0x0010

◆ BITM_INT_STATUS_DATA_INT_DATA_F

#define BITM_INT_STATUS_DATA_INT_DATA_F   0x0020

◆ BITM_INT_STATUS_DATA_INT_DATA_G

#define BITM_INT_STATUS_DATA_INT_DATA_G   0x0040

◆ BITM_INT_STATUS_DATA_INT_DATA_H

#define BITM_INT_STATUS_DATA_INT_DATA_H   0x0080

◆ BITM_INT_STATUS_DATA_INT_DATA_I

#define BITM_INT_STATUS_DATA_INT_DATA_I   0x0100

◆ BITM_INT_STATUS_DATA_INT_DATA_J

#define BITM_INT_STATUS_DATA_INT_DATA_J   0x0200

◆ BITM_INT_STATUS_DATA_INT_DATA_K

#define BITM_INT_STATUS_DATA_INT_DATA_K   0x0400

◆ BITM_INT_STATUS_DATA_INT_DATA_L

#define BITM_INT_STATUS_DATA_INT_DATA_L   0x0800

◆ BITM_INT_STATUS_DATA_INT_FIFO_TH

#define BITM_INT_STATUS_DATA_INT_FIFO_TH   0x8000

◆ BITM_INT_STATUS_FIFO_CLEAR_FIFO

#define BITM_INT_STATUS_FIFO_CLEAR_FIFO   0x8000

◆ BITM_INT_STATUS_FIFO_FIFO_BYTE_COUNT

#define BITM_INT_STATUS_FIFO_FIFO_BYTE_COUNT   0x07ff

◆ BITM_INT_STATUS_FIFO_INT_FIFO_OFLOW

#define BITM_INT_STATUS_FIFO_INT_FIFO_OFLOW   0x2000

◆ BITM_INT_STATUS_FIFO_INT_FIFO_UFLOW

#define BITM_INT_STATUS_FIFO_INT_FIFO_UFLOW   0x4000

◆ BITM_INT_STATUS_LEV0_INT_LEV0_A

#define BITM_INT_STATUS_LEV0_INT_LEV0_A   0x0001

◆ BITM_INT_STATUS_LEV0_INT_LEV0_B

#define BITM_INT_STATUS_LEV0_INT_LEV0_B   0x0002

◆ BITM_INT_STATUS_LEV0_INT_LEV0_C

#define BITM_INT_STATUS_LEV0_INT_LEV0_C   0x0004

◆ BITM_INT_STATUS_LEV0_INT_LEV0_D

#define BITM_INT_STATUS_LEV0_INT_LEV0_D   0x0008

◆ BITM_INT_STATUS_LEV0_INT_LEV0_E

#define BITM_INT_STATUS_LEV0_INT_LEV0_E   0x0010

◆ BITM_INT_STATUS_LEV0_INT_LEV0_F

#define BITM_INT_STATUS_LEV0_INT_LEV0_F   0x0020

◆ BITM_INT_STATUS_LEV0_INT_LEV0_G

#define BITM_INT_STATUS_LEV0_INT_LEV0_G   0x0040

◆ BITM_INT_STATUS_LEV0_INT_LEV0_H

#define BITM_INT_STATUS_LEV0_INT_LEV0_H   0x0080

◆ BITM_INT_STATUS_LEV0_INT_LEV0_I

#define BITM_INT_STATUS_LEV0_INT_LEV0_I   0x0100

◆ BITM_INT_STATUS_LEV0_INT_LEV0_J

#define BITM_INT_STATUS_LEV0_INT_LEV0_J   0x0200

◆ BITM_INT_STATUS_LEV0_INT_LEV0_K

#define BITM_INT_STATUS_LEV0_INT_LEV0_K   0x0400

◆ BITM_INT_STATUS_LEV0_INT_LEV0_L

#define BITM_INT_STATUS_LEV0_INT_LEV0_L   0x0800

◆ BITM_INT_STATUS_LEV1_INT_LEV1_A

#define BITM_INT_STATUS_LEV1_INT_LEV1_A   0x0001

◆ BITM_INT_STATUS_LEV1_INT_LEV1_B

#define BITM_INT_STATUS_LEV1_INT_LEV1_B   0x0002

◆ BITM_INT_STATUS_LEV1_INT_LEV1_C

#define BITM_INT_STATUS_LEV1_INT_LEV1_C   0x0004

◆ BITM_INT_STATUS_LEV1_INT_LEV1_D

#define BITM_INT_STATUS_LEV1_INT_LEV1_D   0x0008

◆ BITM_INT_STATUS_LEV1_INT_LEV1_E

#define BITM_INT_STATUS_LEV1_INT_LEV1_E   0x0010

◆ BITM_INT_STATUS_LEV1_INT_LEV1_F

#define BITM_INT_STATUS_LEV1_INT_LEV1_F   0x0020

◆ BITM_INT_STATUS_LEV1_INT_LEV1_G

#define BITM_INT_STATUS_LEV1_INT_LEV1_G   0x0040

◆ BITM_INT_STATUS_LEV1_INT_LEV1_H

#define BITM_INT_STATUS_LEV1_INT_LEV1_H   0x0080

◆ BITM_INT_STATUS_LEV1_INT_LEV1_I

#define BITM_INT_STATUS_LEV1_INT_LEV1_I   0x0100

◆ BITM_INT_STATUS_LEV1_INT_LEV1_J

#define BITM_INT_STATUS_LEV1_INT_LEV1_J   0x0200

◆ BITM_INT_STATUS_LEV1_INT_LEV1_K

#define BITM_INT_STATUS_LEV1_INT_LEV1_K   0x0400

◆ BITM_INT_STATUS_LEV1_INT_LEV1_L

#define BITM_INT_STATUS_LEV1_INT_LEV1_L   0x0800

◆ BITM_INTEG_OFFSET_A_INTEG_OFFSET

#define BITM_INTEG_OFFSET_A_INTEG_OFFSET   0x1fff

◆ BITM_INTEG_OFFSET_A_INTEG_OFFSET_UPPER

#define BITM_INTEG_OFFSET_A_INTEG_OFFSET_UPPER   0xff

◆ BITM_INTEG_WIDTH_A_ADC_COUNT

#define BITM_INTEG_WIDTH_A_ADC_COUNT   0x00c0

◆ BITM_INTEG_WIDTH_A_AFE_INT_C_BUF

#define BITM_INTEG_WIDTH_A_AFE_INT_C_BUF   0x0800

◆ BITM_INTEG_WIDTH_A_CH1_AMP_DISABLE

#define BITM_INTEG_WIDTH_A_CH1_AMP_DISABLE   0x0700

◆ BITM_INTEG_WIDTH_A_CH2_AMP_DISABLE

#define BITM_INTEG_WIDTH_A_CH2_AMP_DISABLE   0x7000

◆ BITM_INTEG_WIDTH_A_INTEG_WIDTH

#define BITM_INTEG_WIDTH_A_INTEG_WIDTH   0x001f

◆ BITM_INTEG_WIDTH_A_SINGLE_INTEG

#define BITM_INTEG_WIDTH_A_SINGLE_INTEG   0x8000

◆ BITM_IO_ADJUST_SPI_DRV

#define BITM_IO_ADJUST_SPI_DRV   0x0003

◆ BITM_IO_ADJUST_SPI_SLEW

#define BITM_IO_ADJUST_SPI_SLEW   0x000c

◆ BITM_LED_POW12_A_LED_CURRENT1

#define BITM_LED_POW12_A_LED_CURRENT1   0x007f

◆ BITM_LED_POW12_A_LED_CURRENT2

#define BITM_LED_POW12_A_LED_CURRENT2   0x7f00

◆ BITM_LED_POW12_A_LED_DRIVESIDE1

#define BITM_LED_POW12_A_LED_DRIVESIDE1   0x0080

◆ BITM_LED_POW12_A_LED_DRIVESIDE2

#define BITM_LED_POW12_A_LED_DRIVESIDE2   0x8000

◆ BITM_LED_POW34_A_LED_CURRENT3

#define BITM_LED_POW34_A_LED_CURRENT3   0x007f

◆ BITM_LED_POW34_A_LED_CURRENT4

#define BITM_LED_POW34_A_LED_CURRENT4   0x7f00

◆ BITM_LED_POW34_A_LED_DRIVESIDE3

#define BITM_LED_POW34_A_LED_DRIVESIDE3   0x0080

◆ BITM_LED_POW34_A_LED_DRIVESIDE4

#define BITM_LED_POW34_A_LED_DRIVESIDE4   0x8000

◆ BITM_LED_PULSE_A_LED_OFFSET

#define BITM_LED_PULSE_A_LED_OFFSET   0x00ff

◆ BITM_LED_PULSE_A_LED_WIDTH

#define BITM_LED_PULSE_A_LED_WIDTH   0xff00

◆ BITM_MOD_PULSE_A_MOD_OFFSET

#define BITM_MOD_PULSE_A_MOD_OFFSET   0x00ff

◆ BITM_MOD_PULSE_A_MOD_WIDTH

#define BITM_MOD_PULSE_A_MOD_WIDTH   0xff00

◆ BITM_OPMODE_OP_MODE

#define BITM_OPMODE_OP_MODE   0x0001

◆ BITM_OPMODE_TIMESLOT_EN

#define BITM_OPMODE_TIMESLOT_EN   0x0f00

◆ BITM_OSC1M_OSC_1M_FREQ_ADJ

#define BITM_OSC1M_OSC_1M_FREQ_ADJ   0x03ff

◆ BITM_OSC1M_OSC_CLK_CAL_ENA

#define BITM_OSC1M_OSC_CLK_CAL_ENA   0x0400

◆ BITM_OSC32K_CAPTURE_TIMESTAMP

#define BITM_OSC32K_CAPTURE_TIMESTAMP   0x8000

◆ BITM_OSC32K_OSC_32K_ADJUST

#define BITM_OSC32K_OSC_32K_ADJUST   0x003f

◆ BITM_OSC32M_CAL_OSC_32M_CAL_COUNT

#define BITM_OSC32M_CAL_OSC_32M_CAL_COUNT   0x7fff

◆ BITM_OSC32M_CAL_OSC_32M_CAL_START

#define BITM_OSC32M_CAL_OSC_32M_CAL_START   0x8000

◆ BITM_OSC32M_OSC_32M_FREQ_ADJ

#define BITM_OSC32M_OSC_32M_FREQ_ADJ   0x00ff

◆ BITM_PATTERN_A_LED_DISABLE

#define BITM_PATTERN_A_LED_DISABLE   0xf000

◆ BITM_PATTERN_A_MOD_DISABLE

#define BITM_PATTERN_A_MOD_DISABLE   0x0f00

◆ BITM_PATTERN_A_REVERSE_INTEG

#define BITM_PATTERN_A_REVERSE_INTEG   0x000f

◆ BITM_PATTERN_A_SUBTRACT

#define BITM_PATTERN_A_SUBTRACT   0x00f0

◆ BITM_PERIOD_A_MIN_PERIOD

#define BITM_PERIOD_A_MIN_PERIOD   0x03ff

◆ BITM_PERIOD_A_MOD_TYPE

#define BITM_PERIOD_A_MOD_TYPE   0x3000

◆ BITM_SIGNAL1_H_A_SIGNAL1_H

#define BITM_SIGNAL1_H_A_SIGNAL1_H   0xffff

◆ BITM_SIGNAL1_L_A_SIGNAL1_L

#define BITM_SIGNAL1_L_A_SIGNAL1_L   0xffff

◆ BITM_SIGNAL2_H_A_SIGNAL2_H

#define BITM_SIGNAL2_H_A_SIGNAL2_H   0xffff

◆ BITM_SIGNAL2_L_A_SIGNAL2_L

#define BITM_SIGNAL2_L_A_SIGNAL2_L   0xffff

◆ BITM_STAMP_H_TIMESTAMP_COUNT_H

#define BITM_STAMP_H_TIMESTAMP_COUNT_H   0xffff

◆ BITM_STAMP_L_TIMESTAMP_COUNT_L

#define BITM_STAMP_L_TIMESTAMP_COUNT_L   0xffff

◆ BITM_STAMPDELTA_TIMESTAMP_SLOT_DELTA

#define BITM_STAMPDELTA_TIMESTAMP_SLOT_DELTA   0xffff

◆ BITM_SYS_CTL_ALT_CLK_GPIO

#define BITM_SYS_CTL_ALT_CLK_GPIO   0x00c0

◆ BITM_SYS_CTL_ALT_CLOCKS

#define BITM_SYS_CTL_ALT_CLOCKS   0x0300

◆ BITM_SYS_CTL_GO_SLEEP

#define BITM_SYS_CTL_GO_SLEEP   0x0010

◆ BITM_SYS_CTL_LFOSC_SEL

#define BITM_SYS_CTL_LFOSC_SEL   0x0004

◆ BITM_SYS_CTL_OSC_1M_EN

#define BITM_SYS_CTL_OSC_1M_EN   0x0002

◆ BITM_SYS_CTL_OSC_32K_EN

#define BITM_SYS_CTL_OSC_32K_EN   0x0001

◆ BITM_SYS_CTL_RANDOM_SLEEP

#define BITM_SYS_CTL_RANDOM_SLEEP   0x0008

◆ BITM_SYS_CTL_SW_RESET

#define BITM_SYS_CTL_SW_RESET   0x8000

◆ BITM_THRESH0_A_THRESH0_SHIFT

#define BITM_THRESH0_A_THRESH0_SHIFT   0x1f00

◆ BITM_THRESH0_A_THRESH0_VALUE

#define BITM_THRESH0_A_THRESH0_VALUE   0x00ff

◆ BITM_THRESH1_A_THRESH1_SHIFT

#define BITM_THRESH1_A_THRESH1_SHIFT   0x1f00

◆ BITM_THRESH1_A_THRESH1_VALUE

#define BITM_THRESH1_A_THRESH1_VALUE   0x00ff

◆ BITM_THRESH_CFG_A_THRESH0_CHAN

#define BITM_THRESH_CFG_A_THRESH0_CHAN   0x0008

◆ BITM_THRESH_CFG_A_THRESH0_DIR

#define BITM_THRESH_CFG_A_THRESH0_DIR   0x0004

◆ BITM_THRESH_CFG_A_THRESH0_TYPE

#define BITM_THRESH_CFG_A_THRESH0_TYPE   0x0003

◆ BITM_THRESH_CFG_A_THRESH1_CHAN

#define BITM_THRESH_CFG_A_THRESH1_CHAN   0x0080

◆ BITM_THRESH_CFG_A_THRESH1_DIR

#define BITM_THRESH_CFG_A_THRESH1_DIR   0x0040

◆ BITM_THRESH_CFG_A_THRESH1_TYPE

#define BITM_THRESH_CFG_A_THRESH1_TYPE   0x0030

◆ BITM_TS_CTRL_A_CH2_EN

#define BITM_TS_CTRL_A_CH2_EN   0x4000

◆ BITM_TS_CTRL_A_INPUT_R_SELECT

#define BITM_TS_CTRL_A_INPUT_R_SELECT   0x0c00

◆ BITM_TS_CTRL_A_SAMPLE_TYPE

#define BITM_TS_CTRL_A_SAMPLE_TYPE   0x3000

◆ BITM_TS_CTRL_A_SUBSAMPLE

#define BITM_TS_CTRL_A_SUBSAMPLE   0x8000

◆ BITM_TS_CTRL_A_TIMESLOT_OFFSET

#define BITM_TS_CTRL_A_TIMESLOT_OFFSET   0x03ff

◆ BITM_TS_FREQ_TIMESLOT_PERIOD_L

#define BITM_TS_FREQ_TIMESLOT_PERIOD_L   0xffff

◆ BITM_TS_FREQH_TIMESLOT_PERIOD_H

#define BITM_TS_FREQH_TIMESLOT_PERIOD_H   0x007f

◆ BITM_TS_PATH_A_AFE_PATH_CFG

#define BITM_TS_PATH_A_AFE_PATH_CFG   0x01ff

◆ BITM_TS_PATH_A_PRE_WIDTH

#define BITM_TS_PATH_A_PRE_WIDTH   0xf000

◆ BITP_ADC_OFF1_A_CH1_ADC_ADJUST

#define BITP_ADC_OFF1_A_CH1_ADC_ADJUST   0

◆ BITP_ADC_OFF2_A_CH2_ADC_ADJUST

#define BITP_ADC_OFF2_A_CH2_ADC_ADJUST   0

◆ BITP_ADC_OFF2_A_ZERO_ADJUST

#define BITP_ADC_OFF2_A_ZERO_ADJUST   15

◆ BITP_AFE_TRIM_A_AFE_TRIM_VREF

#define BITP_AFE_TRIM_A_AFE_TRIM_VREF   8

◆ BITP_AFE_TRIM_A_CH1_TRIM_INT

#define BITP_AFE_TRIM_A_CH1_TRIM_INT   11

◆ BITP_AFE_TRIM_A_CH2_TRIM_INT

#define BITP_AFE_TRIM_A_CH2_TRIM_INT   13

◆ BITP_AFE_TRIM_A_TIA_CEIL_DETECT_EN

#define BITP_AFE_TRIM_A_TIA_CEIL_DETECT_EN   15

◆ BITP_AFE_TRIM_A_TIA_GAIN_CH1

#define BITP_AFE_TRIM_A_TIA_GAIN_CH1   0

◆ BITP_AFE_TRIM_A_TIA_GAIN_CH2

#define BITP_AFE_TRIM_A_TIA_GAIN_CH2   3

◆ BITP_AFE_TRIM_A_VREF_PULSE

#define BITP_AFE_TRIM_A_VREF_PULSE   10

◆ BITP_AFE_TRIM_A_VREF_PULSE_VAL

#define BITP_AFE_TRIM_A_VREF_PULSE_VAL   6

◆ BITP_CATHODE_A_PRECON

#define BITP_CATHODE_A_PRECON   12

◆ BITP_CATHODE_A_VC1_ALT

#define BITP_CATHODE_A_VC1_ALT   2

◆ BITP_CATHODE_A_VC1_PULSE

#define BITP_CATHODE_A_VC1_PULSE   4

◆ BITP_CATHODE_A_VC1_SEL

#define BITP_CATHODE_A_VC1_SEL   0

◆ BITP_CATHODE_A_VC2_ALT

#define BITP_CATHODE_A_VC2_ALT   8

◆ BITP_CATHODE_A_VC2_PULSE

#define BITP_CATHODE_A_VC2_PULSE   10

◆ BITP_CATHODE_A_VC2_SEL

#define BITP_CATHODE_A_VC2_SEL   6

◆ BITP_CHIP_ID

#define BITP_CHIP_ID   0

◆ BITP_CHIP_VERSION

#define BITP_CHIP_VERSION   8

◆ BITP_COUNTS_A_NUM_INT

#define BITP_COUNTS_A_NUM_INT   8

◆ BITP_COUNTS_A_NUM_REPEAT

#define BITP_COUNTS_A_NUM_REPEAT   0

◆ BITP_DARK1_H_A_DARK1_H

#define BITP_DARK1_H_A_DARK1_H   0

◆ BITP_DARK1_L_A_DARK1_L

#define BITP_DARK1_L_A_DARK1_L   0

◆ BITP_DARK2_H_A_DARK2_H

#define BITP_DARK2_H_A_DARK2_H   0

◆ BITP_DARK2_L_A_DARK2_L

#define BITP_DARK2_L_A_DARK2_L   0

◆ BITP_DATA1_A_DARK_SHIFT

#define BITP_DATA1_A_DARK_SHIFT   11

◆ BITP_DATA1_A_DARK_SIZE

#define BITP_DATA1_A_DARK_SIZE   8

◆ BITP_DATA1_A_SIGNAL_SHIFT

#define BITP_DATA1_A_SIGNAL_SHIFT   3

◆ BITP_DATA1_A_SIGNAL_SIZE

#define BITP_DATA1_A_SIGNAL_SIZE   0

◆ BITP_DATA2_A_LIT_SHIFT

#define BITP_DATA2_A_LIT_SHIFT   3

◆ BITP_DATA2_A_LIT_SIZE

#define BITP_DATA2_A_LIT_SIZE   0

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_A

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_A   0

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_B

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_B   1

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_C

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_C   2

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_D

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_D   3

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_E

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_E   4

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_F

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_F   5

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_G

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_G   6

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_H

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_H   7

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_I

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_I   8

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_J

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_J   9

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_K

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_K   10

◆ BITP_DATA_HOLD_FLAG_HOLD_REGS_L

#define BITP_DATA_HOLD_FLAG_HOLD_REGS_L   11

◆ BITP_DECIMATE_A_DECIMATE_FACTOR

#define BITP_DECIMATE_A_DECIMATE_FACTOR   4

◆ BITP_DECIMATE_A_DECIMATE_TYPE

#define BITP_DECIMATE_A_DECIMATE_TYPE   0

◆ BITP_DIGINT_DARK_A_DARK1_OFFSET

#define BITP_DIGINT_DARK_A_DARK1_OFFSET   0

◆ BITP_DIGINT_DARK_A_DARK2_OFFSET

#define BITP_DIGINT_DARK_A_DARK2_OFFSET   7

◆ BITP_DIGINT_LIT_A_LIT_OFFSET

#define BITP_DIGINT_LIT_A_LIT_OFFSET   0

◆ BITP_FIFO_CTL_FIFO_TH

#define BITP_FIFO_CTL_FIFO_TH   0

◆ BITP_FIFO_DATA_FIFO_DATA

#define BITP_FIFO_DATA_FIFO_DATA   0

◆ BITP_FIFO_STATUS_BYTES_ENA_STAT_D1

#define BITP_FIFO_STATUS_BYTES_ENA_STAT_D1   1

◆ BITP_FIFO_STATUS_BYTES_ENA_STAT_D2

#define BITP_FIFO_STATUS_BYTES_ENA_STAT_D2   2

◆ BITP_FIFO_STATUS_BYTES_ENA_STAT_L0

#define BITP_FIFO_STATUS_BYTES_ENA_STAT_L0   3

◆ BITP_FIFO_STATUS_BYTES_ENA_STAT_L1

#define BITP_FIFO_STATUS_BYTES_ENA_STAT_L1   4

◆ BITP_FIFO_STATUS_BYTES_ENA_STAT_LX

#define BITP_FIFO_STATUS_BYTES_ENA_STAT_LX   5

◆ BITP_FIFO_STATUS_BYTES_ENA_STAT_SUM

#define BITP_FIFO_STATUS_BYTES_ENA_STAT_SUM   0

◆ BITP_FIFO_STATUS_BYTES_ENA_STAT_TS1

#define BITP_FIFO_STATUS_BYTES_ENA_STAT_TS1   6

◆ BITP_FIFO_STATUS_BYTES_ENA_STAT_TS2

#define BITP_FIFO_STATUS_BYTES_ENA_STAT_TS2   7

◆ BITP_FIFO_STATUS_BYTES_ENA_STAT_TSX

#define BITP_FIFO_STATUS_BYTES_ENA_STAT_TSX   8

◆ BITP_GPIO01_GPIOOUT0

#define BITP_GPIO01_GPIOOUT0   0

◆ BITP_GPIO01_GPIOOUT1

#define BITP_GPIO01_GPIOOUT1   8

◆ BITP_GPIO01_TIMESTAMP_ALWAYS_EN

#define BITP_GPIO01_TIMESTAMP_ALWAYS_EN   15

◆ BITP_GPIO01_TIMESTAMP_INV

#define BITP_GPIO01_TIMESTAMP_INV   14

◆ BITP_GPIO23_EXT_SYNC_EN

#define BITP_GPIO23_EXT_SYNC_EN   14

◆ BITP_GPIO23_GPIOOUT2

#define BITP_GPIO23_GPIOOUT2   0

◆ BITP_GPIO23_GPIOOUT3

#define BITP_GPIO23_GPIOOUT3   8

◆ BITP_GPIO_CFG_GPIO_DRV

#define BITP_GPIO_CFG_GPIO_DRV   12

◆ BITP_GPIO_CFG_GPIO_PIN_CFG0

#define BITP_GPIO_CFG_GPIO_PIN_CFG0   0

◆ BITP_GPIO_CFG_GPIO_PIN_CFG1

#define BITP_GPIO_CFG_GPIO_PIN_CFG1   3

◆ BITP_GPIO_CFG_GPIO_PIN_CFG2

#define BITP_GPIO_CFG_GPIO_PIN_CFG2   6

◆ BITP_GPIO_CFG_GPIO_PIN_CFG3

#define BITP_GPIO_CFG_GPIO_PIN_CFG3   9

◆ BITP_GPIO_CFG_GPIO_SLEW

#define BITP_GPIO_CFG_GPIO_SLEW   14

◆ BITP_GPIO_EXT_EXT_SYNC_EN

#define BITP_GPIO_EXT_EXT_SYNC_EN   2

◆ BITP_GPIO_EXT_EXT_SYNC_GPIO

#define BITP_GPIO_EXT_EXT_SYNC_GPIO   0

◆ BITP_GPIO_EXT_TIMESTAMP_ALWAYS_EN

#define BITP_GPIO_EXT_TIMESTAMP_ALWAYS_EN   6

◆ BITP_GPIO_EXT_TIMESTAMP_GPIO

#define BITP_GPIO_EXT_TIMESTAMP_GPIO   4

◆ BITP_GPIO_EXT_TIMESTAMP_INV

#define BITP_GPIO_EXT_TIMESTAMP_INV   7

◆ BITP_GPIO_EXT_TS_GPIO_SLEEP

#define BITP_GPIO_EXT_TS_GPIO_SLEEP   8

◆ BITP_GPIO_IN_GPIO_INPUT

#define BITP_GPIO_IN_GPIO_INPUT   0

◆ BITP_I2C_ADDR_I2C_SLAVE_ADDR

#define BITP_I2C_ADDR_I2C_SLAVE_ADDR   1

◆ BITP_I2C_ADDR_I2C_SLAVE_KEY2

#define BITP_I2C_ADDR_I2C_SLAVE_KEY2   8

◆ BITP_I2C_KEY_I2C_KEY

#define BITP_I2C_KEY_I2C_KEY   0

◆ BITP_I2C_KEY_I2C_KEY_MATCH

#define BITP_I2C_KEY_I2C_KEY_MATCH   12

◆ BITP_INPUT_CFG_PAIR12

#define BITP_INPUT_CFG_PAIR12   0

◆ BITP_INPUT_CFG_PAIR34

#define BITP_INPUT_CFG_PAIR34   1

◆ BITP_INPUT_CFG_PAIR56

#define BITP_INPUT_CFG_PAIR56   2

◆ BITP_INPUT_CFG_PAIR78

#define BITP_INPUT_CFG_PAIR78   3

◆ BITP_INPUT_CFG_VC1_SLEEP

#define BITP_INPUT_CFG_VC1_SLEEP   4

◆ BITP_INPUT_CFG_VC2_SLEEP

#define BITP_INPUT_CFG_VC2_SLEEP   6

◆ BITP_INPUT_SLEEP_INP_SLEEP_12

#define BITP_INPUT_SLEEP_INP_SLEEP_12   0

◆ BITP_INPUT_SLEEP_INP_SLEEP_34

#define BITP_INPUT_SLEEP_INP_SLEEP_34   4

◆ BITP_INPUT_SLEEP_INP_SLEEP_56

#define BITP_INPUT_SLEEP_INP_SLEEP_56   8

◆ BITP_INPUT_SLEEP_INP_SLEEP_78

#define BITP_INPUT_SLEEP_INP_SLEEP_78   12

◆ BITP_INPUTS_A_INP12

#define BITP_INPUTS_A_INP12   0

◆ BITP_INPUTS_A_INP34

#define BITP_INPUTS_A_INP34   4

◆ BITP_INPUTS_A_INP56

#define BITP_INPUTS_A_INP56   8

◆ BITP_INPUTS_A_INP78

#define BITP_INPUTS_A_INP78   12

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_A

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_A   0

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_B

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_B   1

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_C

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_C   2

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_D

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_D   3

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_E

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_E   4

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_F

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_F   5

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_G

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_G   6

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_H

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_H   7

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_I

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_I   8

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_J

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_J   9

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_K

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_K   10

◆ BITP_INT_ACLEAR_INT_ACLEAR_DATA_L

#define BITP_INT_ACLEAR_INT_ACLEAR_DATA_L   11

◆ BITP_INT_ACLEAR_INT_ACLEAR_FIFO

#define BITP_INT_ACLEAR_INT_ACLEAR_FIFO   15

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_A

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_A   0

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_B

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_B   1

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_C

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_C   2

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_D

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_D   3

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_E

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_E   4

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_F

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_F   5

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_G

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_G   6

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_H

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_H   7

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_I

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_I   8

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_J

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_J   9

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_K

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_K   10

◆ BITP_INT_ENABLE_XD_INTX_EN_DATA_L

#define BITP_INT_ENABLE_XD_INTX_EN_DATA_L   11

◆ BITP_INT_ENABLE_XD_INTX_EN_FIFO_OFLOW

#define BITP_INT_ENABLE_XD_INTX_EN_FIFO_OFLOW   13

◆ BITP_INT_ENABLE_XD_INTX_EN_FIFO_TH

#define BITP_INT_ENABLE_XD_INTX_EN_FIFO_TH   15

◆ BITP_INT_ENABLE_XD_INTX_EN_FIFO_UFLOW

#define BITP_INT_ENABLE_XD_INTX_EN_FIFO_UFLOW   14

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_A

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_A   0

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_B

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_B   1

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_C

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_C   2

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_D

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_D   3

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_E

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_E   4

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_F

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_F   5

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_G

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_G   6

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_H

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_H   7

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_I

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_I   8

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_J

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_J   9

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_K

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_K   10

◆ BITP_INT_ENABLE_XL0_INTX_EN_LEV0_L

#define BITP_INT_ENABLE_XL0_INTX_EN_LEV0_L   11

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_A

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_A   0

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_B

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_B   1

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_C

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_C   2

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_D

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_D   3

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_E

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_E   4

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_F

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_F   5

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_G

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_G   6

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_H

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_H   7

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_I

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_I   8

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_J

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_J   9

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_K

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_K   10

◆ BITP_INT_ENABLE_XL1_INTX_EN_LEV1_L

#define BITP_INT_ENABLE_XL1_INTX_EN_LEV1_L   11

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_A

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_A   0

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_B

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_B   1

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_C

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_C   2

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_D

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_D   3

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_E

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_E   4

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_F

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_F   5

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_G

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_G   6

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_H

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_H   7

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_I

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_I   8

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_J

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_J   9

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_K

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_K   10

◆ BITP_INT_ENABLE_YD_INTY_EN_DATA_L

#define BITP_INT_ENABLE_YD_INTY_EN_DATA_L   11

◆ BITP_INT_ENABLE_YD_INTY_EN_FIFO_OFLOW

#define BITP_INT_ENABLE_YD_INTY_EN_FIFO_OFLOW   13

◆ BITP_INT_ENABLE_YD_INTY_EN_FIFO_TH

#define BITP_INT_ENABLE_YD_INTY_EN_FIFO_TH   15

◆ BITP_INT_ENABLE_YD_INTY_EN_FIFO_UFLOW

#define BITP_INT_ENABLE_YD_INTY_EN_FIFO_UFLOW   14

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_A

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_A   0

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_B

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_B   1

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_C

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_C   2

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_D

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_D   3

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_E

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_E   4

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_F

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_F   5

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_G

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_G   6

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_H

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_H   7

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_I

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_I   8

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_J

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_J   9

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_K

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_K   10

◆ BITP_INT_ENABLE_YL0_INTY_EN_LEV0_L

#define BITP_INT_ENABLE_YL0_INTY_EN_LEV0_L   11

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_A

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_A   0

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_B

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_B   1

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_C

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_C   2

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_D

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_D   3

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_E

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_E   4

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_F

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_F   5

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_G

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_G   6

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_H

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_H   7

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_I

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_I   8

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_J

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_J   9

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_K

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_K   10

◆ BITP_INT_ENABLE_YL1_INTY_EN_LEV1_L

#define BITP_INT_ENABLE_YL1_INTY_EN_LEV1_L   11

◆ BITP_INT_STATUS_DATA_INT_DATA_A

#define BITP_INT_STATUS_DATA_INT_DATA_A   0

◆ BITP_INT_STATUS_DATA_INT_DATA_B

#define BITP_INT_STATUS_DATA_INT_DATA_B   1

◆ BITP_INT_STATUS_DATA_INT_DATA_C

#define BITP_INT_STATUS_DATA_INT_DATA_C   2

◆ BITP_INT_STATUS_DATA_INT_DATA_D

#define BITP_INT_STATUS_DATA_INT_DATA_D   3

◆ BITP_INT_STATUS_DATA_INT_DATA_E

#define BITP_INT_STATUS_DATA_INT_DATA_E   4

◆ BITP_INT_STATUS_DATA_INT_DATA_F

#define BITP_INT_STATUS_DATA_INT_DATA_F   5

◆ BITP_INT_STATUS_DATA_INT_DATA_G

#define BITP_INT_STATUS_DATA_INT_DATA_G   6

◆ BITP_INT_STATUS_DATA_INT_DATA_H

#define BITP_INT_STATUS_DATA_INT_DATA_H   7

◆ BITP_INT_STATUS_DATA_INT_DATA_I

#define BITP_INT_STATUS_DATA_INT_DATA_I   8

◆ BITP_INT_STATUS_DATA_INT_DATA_J

#define BITP_INT_STATUS_DATA_INT_DATA_J   9

◆ BITP_INT_STATUS_DATA_INT_DATA_K

#define BITP_INT_STATUS_DATA_INT_DATA_K   10

◆ BITP_INT_STATUS_DATA_INT_DATA_L

#define BITP_INT_STATUS_DATA_INT_DATA_L   11

◆ BITP_INT_STATUS_DATA_INT_FIFO_TH

#define BITP_INT_STATUS_DATA_INT_FIFO_TH   15

◆ BITP_INT_STATUS_FIFO_CLEAR_FIFO

#define BITP_INT_STATUS_FIFO_CLEAR_FIFO   15

◆ BITP_INT_STATUS_FIFO_FIFO_BYTE_COUNT

#define BITP_INT_STATUS_FIFO_FIFO_BYTE_COUNT   0

◆ BITP_INT_STATUS_FIFO_INT_FIFO_OFLOW

#define BITP_INT_STATUS_FIFO_INT_FIFO_OFLOW   13

◆ BITP_INT_STATUS_FIFO_INT_FIFO_UFLOW

#define BITP_INT_STATUS_FIFO_INT_FIFO_UFLOW   14

◆ BITP_INT_STATUS_LEV0_INT_LEV0_A

#define BITP_INT_STATUS_LEV0_INT_LEV0_A   0

◆ BITP_INT_STATUS_LEV0_INT_LEV0_B

#define BITP_INT_STATUS_LEV0_INT_LEV0_B   1

◆ BITP_INT_STATUS_LEV0_INT_LEV0_C

#define BITP_INT_STATUS_LEV0_INT_LEV0_C   2

◆ BITP_INT_STATUS_LEV0_INT_LEV0_D

#define BITP_INT_STATUS_LEV0_INT_LEV0_D   3

◆ BITP_INT_STATUS_LEV0_INT_LEV0_E

#define BITP_INT_STATUS_LEV0_INT_LEV0_E   4

◆ BITP_INT_STATUS_LEV0_INT_LEV0_F

#define BITP_INT_STATUS_LEV0_INT_LEV0_F   5

◆ BITP_INT_STATUS_LEV0_INT_LEV0_G

#define BITP_INT_STATUS_LEV0_INT_LEV0_G   6

◆ BITP_INT_STATUS_LEV0_INT_LEV0_H

#define BITP_INT_STATUS_LEV0_INT_LEV0_H   7

◆ BITP_INT_STATUS_LEV0_INT_LEV0_I

#define BITP_INT_STATUS_LEV0_INT_LEV0_I   8

◆ BITP_INT_STATUS_LEV0_INT_LEV0_J

#define BITP_INT_STATUS_LEV0_INT_LEV0_J   9

◆ BITP_INT_STATUS_LEV0_INT_LEV0_K

#define BITP_INT_STATUS_LEV0_INT_LEV0_K   10

◆ BITP_INT_STATUS_LEV0_INT_LEV0_L

#define BITP_INT_STATUS_LEV0_INT_LEV0_L   11

◆ BITP_INT_STATUS_LEV1_INT_LEV1_A

#define BITP_INT_STATUS_LEV1_INT_LEV1_A   0

◆ BITP_INT_STATUS_LEV1_INT_LEV1_B

#define BITP_INT_STATUS_LEV1_INT_LEV1_B   1

◆ BITP_INT_STATUS_LEV1_INT_LEV1_C

#define BITP_INT_STATUS_LEV1_INT_LEV1_C   2

◆ BITP_INT_STATUS_LEV1_INT_LEV1_D

#define BITP_INT_STATUS_LEV1_INT_LEV1_D   3

◆ BITP_INT_STATUS_LEV1_INT_LEV1_E

#define BITP_INT_STATUS_LEV1_INT_LEV1_E   4

◆ BITP_INT_STATUS_LEV1_INT_LEV1_F

#define BITP_INT_STATUS_LEV1_INT_LEV1_F   5

◆ BITP_INT_STATUS_LEV1_INT_LEV1_G

#define BITP_INT_STATUS_LEV1_INT_LEV1_G   6

◆ BITP_INT_STATUS_LEV1_INT_LEV1_H

#define BITP_INT_STATUS_LEV1_INT_LEV1_H   7

◆ BITP_INT_STATUS_LEV1_INT_LEV1_I

#define BITP_INT_STATUS_LEV1_INT_LEV1_I   8

◆ BITP_INT_STATUS_LEV1_INT_LEV1_J

#define BITP_INT_STATUS_LEV1_INT_LEV1_J   9

◆ BITP_INT_STATUS_LEV1_INT_LEV1_K

#define BITP_INT_STATUS_LEV1_INT_LEV1_K   10

◆ BITP_INT_STATUS_LEV1_INT_LEV1_L

#define BITP_INT_STATUS_LEV1_INT_LEV1_L   11

◆ BITP_INTEG_OFFSET_A_INTEG_OFFSET

#define BITP_INTEG_OFFSET_A_INTEG_OFFSET   0

◆ BITP_INTEG_OFFSET_A_INTEG_OFFSET_UPPER

#define BITP_INTEG_OFFSET_A_INTEG_OFFSET_UPPER   5

◆ BITP_INTEG_WIDTH_A_ADC_COUNT

#define BITP_INTEG_WIDTH_A_ADC_COUNT   6

◆ BITP_INTEG_WIDTH_A_AFE_INT_C_BUF

#define BITP_INTEG_WIDTH_A_AFE_INT_C_BUF   11

◆ BITP_INTEG_WIDTH_A_CH1_AMP_DISABLE

#define BITP_INTEG_WIDTH_A_CH1_AMP_DISABLE   8

◆ BITP_INTEG_WIDTH_A_CH2_AMP_DISABLE

#define BITP_INTEG_WIDTH_A_CH2_AMP_DISABLE   12

◆ BITP_INTEG_WIDTH_A_INTEG_WIDTH

#define BITP_INTEG_WIDTH_A_INTEG_WIDTH   0

◆ BITP_INTEG_WIDTH_A_SINGLE_INTEG

#define BITP_INTEG_WIDTH_A_SINGLE_INTEG   15

◆ BITP_IO_ADJUST_SPI_DRV

#define BITP_IO_ADJUST_SPI_DRV   0

◆ BITP_IO_ADJUST_SPI_SLEW

#define BITP_IO_ADJUST_SPI_SLEW   2

◆ BITP_LED_POW12_A_LED_CURRENT1

#define BITP_LED_POW12_A_LED_CURRENT1   0

◆ BITP_LED_POW12_A_LED_CURRENT2

#define BITP_LED_POW12_A_LED_CURRENT2   8

◆ BITP_LED_POW12_A_LED_DRIVESIDE1

#define BITP_LED_POW12_A_LED_DRIVESIDE1   7

◆ BITP_LED_POW12_A_LED_DRIVESIDE2

#define BITP_LED_POW12_A_LED_DRIVESIDE2   15

◆ BITP_LED_POW34_A_LED_CURRENT3

#define BITP_LED_POW34_A_LED_CURRENT3   0

◆ BITP_LED_POW34_A_LED_CURRENT4

#define BITP_LED_POW34_A_LED_CURRENT4   8

◆ BITP_LED_POW34_A_LED_DRIVESIDE3

#define BITP_LED_POW34_A_LED_DRIVESIDE3   7

◆ BITP_LED_POW34_A_LED_DRIVESIDE4

#define BITP_LED_POW34_A_LED_DRIVESIDE4   15

◆ BITP_LED_PULSE_A_LED_OFFSET

#define BITP_LED_PULSE_A_LED_OFFSET   0

◆ BITP_LED_PULSE_A_LED_WIDTH

#define BITP_LED_PULSE_A_LED_WIDTH   8

◆ BITP_MOD_PULSE_A_MOD_OFFSET

#define BITP_MOD_PULSE_A_MOD_OFFSET   0

◆ BITP_MOD_PULSE_A_MOD_WIDTH

#define BITP_MOD_PULSE_A_MOD_WIDTH   8

◆ BITP_OPMODE_OP_MODE

#define BITP_OPMODE_OP_MODE   0

◆ BITP_OPMODE_TIMESLOT_EN

#define BITP_OPMODE_TIMESLOT_EN   8

◆ BITP_OSC1M_OSC_1M_FREQ_ADJ

#define BITP_OSC1M_OSC_1M_FREQ_ADJ   0

◆ BITP_OSC1M_OSC_CLK_CAL_ENA

#define BITP_OSC1M_OSC_CLK_CAL_ENA   10

◆ BITP_OSC32K_CAPTURE_TIMESTAMP

#define BITP_OSC32K_CAPTURE_TIMESTAMP   15

◆ BITP_OSC32K_OSC_32K_ADJUST

#define BITP_OSC32K_OSC_32K_ADJUST   0

◆ BITP_OSC32M_CAL_OSC_32M_CAL_COUNT

#define BITP_OSC32M_CAL_OSC_32M_CAL_COUNT   0

◆ BITP_OSC32M_CAL_OSC_32M_CAL_START

#define BITP_OSC32M_CAL_OSC_32M_CAL_START   15

◆ BITP_OSC32M_OSC_32M_FREQ_ADJ

#define BITP_OSC32M_OSC_32M_FREQ_ADJ   0

◆ BITP_PATTERN_A_LED_DISABLE

#define BITP_PATTERN_A_LED_DISABLE   12

◆ BITP_PATTERN_A_MOD_DISABLE

#define BITP_PATTERN_A_MOD_DISABLE   8

◆ BITP_PATTERN_A_REVERSE_INTEG

#define BITP_PATTERN_A_REVERSE_INTEG   0

◆ BITP_PATTERN_A_SUBTRACT

#define BITP_PATTERN_A_SUBTRACT   4

◆ BITP_PERIOD_A_MIN_PERIOD

#define BITP_PERIOD_A_MIN_PERIOD   0

◆ BITP_PERIOD_A_MOD_TYPE

#define BITP_PERIOD_A_MOD_TYPE   12

◆ BITP_SIGNAL1_H_A_SIGNAL1_H

#define BITP_SIGNAL1_H_A_SIGNAL1_H   0

◆ BITP_SIGNAL1_L_A_SIGNAL1_L

#define BITP_SIGNAL1_L_A_SIGNAL1_L   0

◆ BITP_SIGNAL2_H_A_SIGNAL2_H

#define BITP_SIGNAL2_H_A_SIGNAL2_H   0

◆ BITP_SIGNAL2_L_A_SIGNAL2_L

#define BITP_SIGNAL2_L_A_SIGNAL2_L   0

◆ BITP_STAMP_H_TIMESTAMP_COUNT_H

#define BITP_STAMP_H_TIMESTAMP_COUNT_H   0

◆ BITP_STAMP_L_TIMESTAMP_COUNT_L

#define BITP_STAMP_L_TIMESTAMP_COUNT_L   0

◆ BITP_STAMPDELTA_TIMESTAMP_SLOT_DELTA

#define BITP_STAMPDELTA_TIMESTAMP_SLOT_DELTA   0

◆ BITP_SYS_CTL_ALT_CLK_GPIO

#define BITP_SYS_CTL_ALT_CLK_GPIO   6

◆ BITP_SYS_CTL_ALT_CLOCKS

#define BITP_SYS_CTL_ALT_CLOCKS   8

◆ BITP_SYS_CTL_GO_SLEEP

#define BITP_SYS_CTL_GO_SLEEP   4

◆ BITP_SYS_CTL_LFOSC_SEL

#define BITP_SYS_CTL_LFOSC_SEL   2

◆ BITP_SYS_CTL_OSC_1M_EN

#define BITP_SYS_CTL_OSC_1M_EN   1

◆ BITP_SYS_CTL_OSC_32K_EN

#define BITP_SYS_CTL_OSC_32K_EN   0

◆ BITP_SYS_CTL_RANDOM_SLEEP

#define BITP_SYS_CTL_RANDOM_SLEEP   3

◆ BITP_SYS_CTL_SW_RESET

#define BITP_SYS_CTL_SW_RESET   15

◆ BITP_THRESH0_A_THRESH0_SHIFT

#define BITP_THRESH0_A_THRESH0_SHIFT   8

◆ BITP_THRESH0_A_THRESH0_VALUE

#define BITP_THRESH0_A_THRESH0_VALUE   0

◆ BITP_THRESH1_A_THRESH1_SHIFT

#define BITP_THRESH1_A_THRESH1_SHIFT   8

◆ BITP_THRESH1_A_THRESH1_VALUE

#define BITP_THRESH1_A_THRESH1_VALUE   0

◆ BITP_THRESH_CFG_A_THRESH0_CHAN

#define BITP_THRESH_CFG_A_THRESH0_CHAN   3

◆ BITP_THRESH_CFG_A_THRESH0_DIR

#define BITP_THRESH_CFG_A_THRESH0_DIR   2

◆ BITP_THRESH_CFG_A_THRESH0_TYPE

#define BITP_THRESH_CFG_A_THRESH0_TYPE   0

◆ BITP_THRESH_CFG_A_THRESH1_CHAN

#define BITP_THRESH_CFG_A_THRESH1_CHAN   7

◆ BITP_THRESH_CFG_A_THRESH1_DIR

#define BITP_THRESH_CFG_A_THRESH1_DIR   6

◆ BITP_THRESH_CFG_A_THRESH1_TYPE

#define BITP_THRESH_CFG_A_THRESH1_TYPE   4

◆ BITP_TS_CTRL_A_CH2_EN

#define BITP_TS_CTRL_A_CH2_EN   14

◆ BITP_TS_CTRL_A_INPUT_R_SELECT

#define BITP_TS_CTRL_A_INPUT_R_SELECT   10

◆ BITP_TS_CTRL_A_SAMPLE_TYPE

#define BITP_TS_CTRL_A_SAMPLE_TYPE   12

◆ BITP_TS_CTRL_A_SUBSAMPLE

#define BITP_TS_CTRL_A_SUBSAMPLE   15

◆ BITP_TS_CTRL_A_TIMESLOT_OFFSET

#define BITP_TS_CTRL_A_TIMESLOT_OFFSET   0

◆ BITP_TS_FREQ_TIMESLOT_PERIOD_L

#define BITP_TS_FREQ_TIMESLOT_PERIOD_L   0

◆ BITP_TS_FREQH_TIMESLOT_PERIOD_H

#define BITP_TS_FREQH_TIMESLOT_PERIOD_H   0

◆ BITP_TS_PATH_A_AFE_PATH_CFG

#define BITP_TS_PATH_A_AFE_PATH_CFG   0

◆ BITP_TS_PATH_A_PRE_WIDTH

#define BITP_TS_PATH_A_PRE_WIDTH   12

Enumeration Type Documentation

◆ adpd410x_clk_opt

enum adpd410x_clk_opt

External clock options.

Enumerator
ADPD410X_INTLFO_INTHFO 

Use internal low frequency and high frequency oscillators

ADPD410X_EXTLFO_INTHFO 

Use external low frequency and internal high frequency oscillator

ADPD410X_INTLFO_EXTHFO 

Use internal low frequency and external high frequency oscillator

ADPD410X_GENLFO_EXTHFO 

Use external high frequency oscillator and generate low frequency using it

◆ adpd410x_led_output_opt

enum adpd410x_led_output_opt

LED output option.

Enumerator
ADPD410X_OUTPUT_A 

Option A

ADPD410X_OUTPUT_B 

Option B

◆ adpd410x_opmode

enum adpd410x_opmode

Operation modes of the device.

Enumerator
ADPD410X_STANDBY 

Standby mode, used for programming

ADPD410X_GOMODE 

Active mode, used for sampling data

◆ adpd410x_precon_opt

enum adpd410x_precon_opt

Time slot input precondition options.

Enumerator
ADPD410X_FLOAT_INS 

Float inputs

ADPD410X_VC1 

Precondition inputs to VC1

ADPD410X_VC2 

Precondition inputs to VC2

ADPD410X_VICM 

Precondition inputs to VICM

ADPD410X_TIA_IN 

Precondition inputs to TIA input

ADPD410X_TIA_VREF 

Precondition inputs to TIA reference voltage

ADPD410X_SHORT_INS 

Precondition inputs by shorting the differential pair

◆ adpd410x_supported_dev

enum adpd410x_supported_dev

Devices supported by the driver.

Enumerator
ADPD4100 
ADPD4101 

◆ adpd410x_tia_vref_ref

enum adpd410x_tia_vref_ref

TIA resistor gain setting.

Enumerator
ADPD410X_TIA_VREF_200K 

200 kOhm

ADPD410X_TIA_VREF_100K 

100 kOhm

ADPD410X_TIA_VREF_50K 

50 kOhm

ADPD410X_TIA_VREF_25K 

25 kOhm

ADPD410X_TIA_VREF_12K5 

12,5 kOhm

◆ adpd410x_tia_vref_volt

enum adpd410x_tia_vref_volt

TIA reference voltage options.

Enumerator
ADPD410X_TIA_VREF_1V1385 

1,1385 V

ADPD410X_TIA_VREF_1V012 

1,012 V

ADPD410X_TIA_VREF_0V8855 

0,8855 V

ADPD410X_TIA_VREF_1V256 

1,256 V

◆ adpd410x_timeslots

enum adpd410x_timeslots

Available Time slots.

Enumerator
ADPD410X_TS_A 

Time slot A

ADPD410X_TS_B 

Time slot B

ADPD410X_TS_C 

Time slot C

ADPD410X_TS_D 

Time slot D

ADPD410X_TS_E 

Time slot E

ADPD410X_TS_F 

Time slot F

ADPD410X_TS_G 

Time slot G

ADPD410X_TS_H 

Time slot H

ADPD410X_TS_I 

Time slot I

ADPD410X_TS_J 

Time slot J

ADPD410X_TS_K 

Time slot K

ADPD410X_TS_L 

Time slot L

◆ adpd410x_ts_input_opt

enum adpd410x_ts_input_opt

List of input configurations for time slot.

Enumerator
ADPD410X_INaDIS_INbDIS 

Both inputs disconnected

ADPD410X_INaCH1_INbDIS 

First input connected to channel 1

ADPD410X_INaCH2_INbDIS 

First input connected to channel 2

ADPD410X_INaDIS_INbCH1 

Second input connected to channel 1

ADPD410X_INaDIS_INbCH2 

Second input connected to channel 2

ADPD410X_INaCH1_INbCH2 

First input -> channel 1, second input -> channel 2

ADPD410X_INaCH2_INbCH1 

First input -> channel 2, second input -> channel 1

ADPD410X_INaCH1_INbCH1 

First input + Second input -> channel 1

ADPD410X_INaCH2_INbCH2 

First input + Second input -> channel 2

◆ adpd410x_ts_input_pair

enum adpd410x_ts_input_pair

List of input pairs options for time slots.

Enumerator
ADPD410X_INP12 

Use input pair 1 and 2

ADPD410X_INP34 

Use input pair 3 and 4

ADPD410X_INP56 

Use input pair 5 and 6

ADPD410X_INP78 

Use input pair 7 and 8

Function Documentation

◆ adpd410x_get_data()

int32_t adpd410x_get_data ( struct adpd410x_dev *  dev,
uint32_t *  data 
)

Get a full data packet from the device containing data from all active time slots.

Get a full data packet from the device containing data from all active time slots.

Parameters
dev- Device handler.
data- Pointer to the data container.
Returns
0 in case of success, -1 otherwise.

◆ adpd410x_get_fifo_bytecount()

int32_t adpd410x_get_fifo_bytecount ( struct adpd410x_dev *  dev,
uint16_t *  bytes 
)

Get number of bytes in the device FIFO.

Get number of bytes in the device FIFO.

Parameters
dev- Device handler.
bytes- Pointer to the byte count container.
Returns
0 in case of success, -1 otherwise.

◆ adpd410x_get_last_timeslot()

int32_t adpd410x_get_last_timeslot ( struct adpd410x_dev *  dev,
enum adpd410x_timeslots *  timeslot_no 
)

Get number of active time slots.

Get number of active time slots.

Parameters
dev- Device handler.
timeslot_no- Last time slot enabled.
Returns
0 in case of success, -1 otherwise.

◆ adpd410x_get_opmode()

int32_t adpd410x_get_opmode ( struct adpd410x_dev *  dev,
enum adpd410x_opmode *  mode 
)

Get operation mode.

Get operation mode.

Parameters
dev- Device handler.
mode- Operation mode.
Returns
0 in case of success, -1 otherwise.

◆ adpd410x_get_sampling_freq()

int32_t adpd410x_get_sampling_freq ( struct adpd410x_dev *  dev,
uint32_t *  sampling_freq 
)

Get device sampling frequency.

Get device sampling frequency.

Parameters
dev- Device handler.
sampling_freq- New sampling frequency.
Returns
0 in case of success, -1 otherwise.

◆ adpd410x_read_fifo()

int32_t adpd410x_read_fifo ( struct adpd410x_dev *  dev,
uint32_t *  data,
uint16_t  num_samples,
uint8_t  datawidth 
)

Reads a certain number of bytes from the fifo and stores in data Used to read a large amount of data from the fifo efficiently (using as few register reads as possible.)

Read a packet with a certain number of bytes from the FIFO.

Parameters
dev- Device handler.
data- Pointer to the data container.
num_samples- number of samples to read
datawidth- number of bytes per sample
Returns
0 in case of success, -1 or an error code otherwise.

◆ adpd410x_reg_read()

int32_t adpd410x_reg_read ( struct adpd410x_dev *  dev,
uint16_t  address,
uint16_t *  data 
)

Read device register.

Read device register.

Parameters
dev- Device handler.
address- Register address.
data- Pointer to the register value container.
Returns
0 in case of success, -1 otherwise.
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◆ adpd410x_reg_read_bytes()

int32_t adpd410x_reg_read_bytes ( struct adpd410x_dev *  dev,
uint16_t  address,
uint8_t *  data,
uint16_t  num_bytes 
)

Read a specified number of bytes from device register.

Read a specified number of bytes from a register, from 1-255

Parameters
dev- Device handler.
address- Register address.
data- Pointer to the register value container.
num_bytes- number of bytes to read. Max 255 for ADPD4101 (I2C).
Returns
0 in case of success, -1 otherwise.
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◆ adpd410x_reg_write()

int32_t adpd410x_reg_write ( struct adpd410x_dev *  dev,
uint16_t  address,
uint16_t  data 
)

Write device register.

Write device register.

Parameters
dev- Device handler.
address- Register address.
data- New register value.
Returns
0 in case of success, -1 otherwise.
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◆ adpd410x_reg_write_mask()

int32_t adpd410x_reg_write_mask ( struct adpd410x_dev *  dev,
uint16_t  address,
uint16_t  data,
uint16_t  mask 
)

Do a read and write of a register to update only part of a register.

Do a read and write of a register to update only part of a register.

Parameters
dev- Device handler.
address- Address of the register.
data- Value to be written to the device.
mask- Mask of the bit field to update.
Returns
0 in case of success, -1 otherwise.
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◆ adpd410x_remove()

int32_t adpd410x_remove ( struct adpd410x_dev *  dev)

Free memory allocated by adpd410x_setup().

Free memory allocated by adpd400x_setup().

Parameters
dev- Device handler.
Returns
0 in case of success, -1 otherwise.

◆ adpd410x_reset()

int32_t adpd410x_reset ( struct adpd410x_dev *  dev)

Do a software reset.

Do a software reset.

Parameters
dev- Device handler.
Returns
0 in case of success, -1 otherwise.
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◆ adpd410x_set_last_timeslot()

int32_t adpd410x_set_last_timeslot ( struct adpd410x_dev *  dev,
uint8_t  timeslot_no 
)

Set number of active time slots.

◆ adpd410x_set_opmode()

int32_t adpd410x_set_opmode ( struct adpd410x_dev *  dev,
enum adpd410x_opmode  mode 
)

Set operation mode.

Set operation mode.

Parameters
dev- Device handler.
mode- New operation mode.
Returns
0 in case of success, -1 otherwise.

◆ adpd410x_set_sampling_freq()

int32_t adpd410x_set_sampling_freq ( struct adpd410x_dev *  dev,
uint32_t  sampling_freq 
)

Set device sampling frequency.

Set device sampling frequency.

Parameters
dev- Device handler.
sampling_freq- New sampling frequency.
Returns
0 in case of success, -1 otherwise.

◆ adpd410x_setup()

int32_t adpd410x_setup ( struct adpd410x_dev **  device,
struct adpd410x_init_param *  init_param 
)

Setup the device and the driver.

Setup the device and the driver.

Parameters
device- Pointer to the device handler.
init_param- Pointer to the initialization structure.
Returns
0 in case of success, -1 otherwise.

Enable the 1MHz oscillator if the internal low frequency oscillator is used.

◆ adpd410x_timeslot_setup()

int32_t adpd410x_timeslot_setup ( struct adpd410x_dev *  dev,
enum adpd410x_timeslots  timeslot_no,
struct adpd410x_timeslot_init *  init 
)

Setup an active time slot.

Setup an active time slot.

Parameters
dev- Device handler.
timeslot_no- Time slot ID to setup.
init- Pointer to the time slot initialization structure.
Returns
0 in case of success, -1 otherwise.

Set TIA VREF and TRIM options. The 0xE000 is writing reserved bits as specified in the datasheet.

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