36#include "xparameters.h"
38#include "app_config.h"
42#ifdef _XPARAMETERS_PS_H_
43#ifdef XPS_BOARD_ZCU102
46#define GPIO_DEVICE_ID XPAR_PSU_GPIO_0_DEVICE_ID
47#define SPI_DEVICE_ID XPAR_PSU_SPI_0_DEVICE_ID
48#define UART_DEVICE_ID XPAR_PSU_UART_0_DEVICE_ID
49#define UART_IRQ_ID XPAR_XUARTPS_0_INTR
54#define DDR_MEM_BASEADDR XPAR_DDR_MEM_BASEADDR
58#define GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID
59#define SPI_DEVICE_ID XPAR_SPI_0_DEVICE_ID
60#define UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID
61#define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR
63#define DDR_MEM_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR
66#define RX_JESD_BASEADDR XPAR_AXI_JESD204_RX_0_BASEADDR
67#define TX_JESD_BASEADDR XPAR_AXI_JESD204_TX_0_BASEADDR
70#define RX_XCVR_BASEADDR XPAR_AXI_ADRV9026_RX_XCVR_BASEADDR
71#define TX_XCVR_BASEADDR XPAR_AXI_ADRV9026_TX_XCVR_BASEADDR
74#define RX_CORE_BASEADDR XPAR_AD_IP_JESD204_TPL_ADC_0_BASEADDR
75#define TX_CORE_BASEADDR XPAR_AD_IP_JESD204_TPL_DAC_0_BASEADDR
78#define RX_DMA_BASEADDR XPAR_AXI_ADRV9026_RX_DMA_BASEADDR
79#define TX_DMA_BASEADDR XPAR_AXI_ADRV9026_TX_DMA_BASEADDR
81#if defined(DMA_EXAMPLE) || defined(IIO_SUPPORT)
82#define DAC_BUFFER_SAMPLES 8192
83#define ADC_BUFFER_SAMPLES 16384
90#ifdef XPS_BOARD_ZCU102
91#define DAC_GPIO_PLDDR_BYPASS (GPIO_OFFSET + 69)
92#define AD9528_RESET_B (GPIO_OFFSET + 68)
93#define AD9528_SYSREF_REQ (GPIO_OFFSET + 58)
94#define ADRV9025_RESET_B (GPIO_OFFSET + 57)
96#define DAC_GPIO_PLDDR_BYPASS (GPIO_OFFSET + 63)
97#define AD9528_RESET_B (GPIO_OFFSET + 62)
98#define AD9528_SYSREF_REQ (GPIO_OFFSET + 61)
99#define ADRV9025_RESET_B (GPIO_OFFSET + 51)
const struct xil_spi_init_param spi_extra
Definition ad5758_sdz.c:49
Structure holding the initialization parameters for Xilinx platform specific GPIO parameters.
Definition xilinx_gpio.h:56
Structure holding the initialization parameters for Xilinx platform specific SPI parameters when usin...
Definition xilinx_spi.h:60