no-OS
|
Platform dependent parameters. More...
Go to the source code of this file.
Macros | |
#define | GPIO_OFFSET 0 |
#define | GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID |
#define | SPI_DEVICE_ID XPAR_SPI_0_DEVICE_ID |
#define | UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID |
#define | UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR |
#define | DDR_MEM_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR |
#define | RX_JESD_BASEADDR XPAR_AXI_JESD204_RX_0_BASEADDR |
#define | TX_JESD_BASEADDR XPAR_AXI_JESD204_TX_0_BASEADDR |
#define | RX_XCVR_BASEADDR XPAR_AXI_ADRV9026_RX_XCVR_BASEADDR |
#define | TX_XCVR_BASEADDR XPAR_AXI_ADRV9026_TX_XCVR_BASEADDR |
#define | RX_CORE_BASEADDR XPAR_AD_IP_JESD204_TPL_ADC_0_BASEADDR |
#define | TX_CORE_BASEADDR XPAR_AD_IP_JESD204_TPL_DAC_0_BASEADDR |
#define | RX_DMA_BASEADDR XPAR_AXI_ADRV9026_RX_DMA_BASEADDR |
#define | TX_DMA_BASEADDR XPAR_AXI_ADRV9026_TX_DMA_BASEADDR |
#define | AD9528_CS 1 |
#define | ADRV9025_CS 0 |
#define | DAC_GPIO_PLDDR_BYPASS (GPIO_OFFSET + 63) |
#define | AD9528_RESET_B (GPIO_OFFSET + 62) |
#define | AD9528_SYSREF_REQ (GPIO_OFFSET + 61) |
#define | ADRV9025_RESET_B (GPIO_OFFSET + 51) |
Variables | |
struct xil_spi_init_param | spi_extra |
struct xil_gpio_init_param | xil_gpio_param |
Platform dependent parameters.
Copyright 2023(c) Analog Devices, Inc.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define AD9528_CS 1 |
#define AD9528_RESET_B (GPIO_OFFSET + 62) |
#define AD9528_SYSREF_REQ (GPIO_OFFSET + 61) |
#define ADRV9025_CS 0 |
#define ADRV9025_RESET_B (GPIO_OFFSET + 51) |
#define DAC_GPIO_PLDDR_BYPASS (GPIO_OFFSET + 63) |
#define DDR_MEM_BASEADDR XPAR_AXI_DDR_CNTRL_BASEADDR |
#define GPIO_DEVICE_ID XPAR_GPIO_0_DEVICE_ID |
#define GPIO_OFFSET 0 |
#define RX_CORE_BASEADDR XPAR_AD_IP_JESD204_TPL_ADC_0_BASEADDR |
#define RX_DMA_BASEADDR XPAR_AXI_ADRV9026_RX_DMA_BASEADDR |
#define RX_JESD_BASEADDR XPAR_AXI_JESD204_RX_0_BASEADDR |
#define RX_XCVR_BASEADDR XPAR_AXI_ADRV9026_RX_XCVR_BASEADDR |
#define SPI_DEVICE_ID XPAR_SPI_0_DEVICE_ID |
#define TX_CORE_BASEADDR XPAR_AD_IP_JESD204_TPL_DAC_0_BASEADDR |
#define TX_DMA_BASEADDR XPAR_AXI_ADRV9026_TX_DMA_BASEADDR |
#define TX_JESD_BASEADDR XPAR_AXI_JESD204_TX_0_BASEADDR |
#define TX_XCVR_BASEADDR XPAR_AXI_ADRV9026_TX_XCVR_BASEADDR |
#define UART_DEVICE_ID XPAR_AXI_UART_DEVICE_ID |
#define UART_IRQ_ID XPAR_AXI_INTC_AXI_UART_INTERRUPT_INTR |
struct xil_spi_init_param spi_extra |
struct xil_gpio_init_param xil_gpio_param |