adxl367.h File Reference

Header file of ADXL367 Driver. More...

#include <stdint.h>
#include <stdbool.h>
#include "no_os_spi.h"
#include "no_os_i2c.h"

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Classes
struct	adxl367_int_map
	Contains bit options from INT registers. More...
struct	adxl367_fractional_val
	Data format in which the values are converted. More...
struct	adxl367_dev
	ADXL367 Device structure. More...
struct	adxl367_init_param
	Structure holding the parameters for ADXL367 device initialization. More...

Macros
#define	ADXL367_WRITE_REG   0x0A
#define	ADXL367_READ_REG   0x0B
#define	ADXL367_READ_FIFO   0x0D
#define	ADXL367_I2C_READ   0x01
#define	ADXL367_I2C_WRITE   0x00
#define	ADXL367_REG_DEVID_AD   0x00
#define	ADXL367_REG_DEVID_MST   0x01
#define	ADXL367_REG_PARTID   0x02
#define	ADXL367_REG_REVID   0x03
#define	ADXL367_REG_SERIAL_NUMBER_3   0x04
#define	ADXL367_REG_SERIAL_NUMBER_2   0x05
#define	ADXL367_REG_SERIAL_NUMBER_1   0x06
#define	ADXL367_REG_SERIAL_NUMBER_0   0x07
#define	ADXL367_REG_XDATA   0x08
#define	ADXL367_REG_YDATA   0x09
#define	ADXL367_REG_ZDATA   0x0A
#define	ADXL367_REG_STATUS   0x0B
#define	ADXL367_REG_FIFO_ENTRIES_L   0x0C
#define	ADXL367_REG_FIFO_ENTRIES_H   0x0D
#define	ADXL367_REG_XDATA_H   0x0E
#define	ADXL367_REG_XDATA_L   0x0F
#define	ADXL367_REG_YDATA_H   0x10
#define	ADXL367_REG_YDATA_L   0x11
#define	ADXL367_REG_ZDATA_H   0x12
#define	ADXL367_REG_ZDATA_L   0x13
#define	ADXL367_REG_TEMP_H   0x14
#define	ADXL367_REG_TEMP_L   0x15
#define	ADXL367_REG_EX_ADC_H   0x16
#define	ADXL367_REG_EX_ADC_L   0x17
#define	ADXL367_REG_I2C_FIFO_DATA   0x18
#define	ADXL367_REG_SOFT_RESET   0x1F
#define	ADXL367_REG_THRESH_ACT_H   0x20
#define	ADXL367_REG_THRESH_ACT_L   0x21
#define	ADXL367_REG_TIME_ACT   0x22
#define	ADXL367_REG_THRESH_INACT_H   0x23
#define	ADXL367_REG_THRESH_INACT_L   0x24
#define	ADXL367_REG_TIME_INACT_H   0x25
#define	ADXL367_REG_TIME_INACT_L   0x26
#define	ADXL367_REG_ACT_INACT_CTL   0x27
#define	ADXL367_REG_FIFO_CONTROL   0x28
#define	ADXL367_REG_FIFO_SAMPLES   0x29
#define	ADXL367_REG_INTMAP1_LWR   0x2A
#define	ADXL367_REG_INTMAP2_LWR   0x2B
#define	ADXL367_REG_FILTER_CTL   0x2C
#define	ADXL367_REG_POWER_CTL   0x2D
#define	ADXL367_REG_SELF_TEST   0x2E
#define	ADXL367_REG_TAP_THRESH   0x2F
#define	ADXL367_REG_TAP_DUR   0x30
#define	ADXL367_REG_TAP_LATENT   0x31
#define	ADXL367_REG_TAP_WINDOW   0x32
#define	ADXL367_REG_X_OFFSET   0x33
#define	ADXL367_REG_Y_OFFSET   0x34
#define	ADXL367_REG_Z_OFFSET   0x35
#define	ADXL367_REG_X_SENS   0x36
#define	ADXL367_REG_Y_SENS   0x37
#define	ADXL367_REG_Z_SENS   0x38
#define	ADXL367_REG_TIMER_CTL   0x39
#define	ADXL367_REG_INTMAP1_UPPER   0x3A
#define	ADXL367_REG_INTMAP2_UPPER   0x3B
#define	ADXL367_REG_ADC_CTL   0x3C
#define	ADXL367_REG_TEMP_CTL   0x3D
#define	ADXL367_REG_TEMP_ADC_OV_TH_H   0x3E
#define	ADXL367_REG_TEMP_ADC_OV_TH_L   0x3F
#define	ADXL367_REG_TEMP_ADC_UN_TH_H   0x40
#define	ADXL367_REG_TEMP_ADC_UN_TH_L   0x41
#define	ADXL367_REG_TEMP_ADC_TIMER   0x42
#define	ADXL367_REG_AXIS_MASK   0x43
#define	ADXL367_REG_STATUS_COPY   0x44
#define	ADXL367_REG_STATUS_2   0x45
#define	ADXL367_STATUS_ERR_USER_REGS   NO_OS_BIT(7)
#define	ADXL367_STATUS_AWAKE   NO_OS_BIT(6)
#define	ADXL367_STATUS_INACT   NO_OS_BIT(5)
#define	ADXL367_STATUS_ACT   NO_OS_BIT(4)
#define	ADXL367_STATUS_FIFO_OVERRUN   NO_OS_BIT(3)
#define	ADXL367_STATUS_FIFO_WATERMARK   NO_OS_BIT(2)
#define	ADXL367_STATUS_FIFO_RDY   NO_OS_BIT(1)
#define	ADXL367_STATUS_DATA_RDY   NO_OS_BIT(0)
#define	ADXL367_THRESH_H   0x7F
#define	ADXL367_THRESH_L   0xFC
#define	ADXL367_ACT_INACT_CTL_LINKLOOP_MSK   NO_OS_GENMASK(5, 4)
#define	ADXL367_ACT_INACT_CTL_INACT_EN_MSK   NO_OS_GENMASK(3, 2)
#define	ADXL367_ACT_INACT_CTL_ACT_EN_MSK   NO_OS_GENMASK(1, 0)
#define	ADXL367_NO_INACTIVITY_DETECTION_ENABLED   0x0
#define	ADXL367_INACTIVITY_ENABLE   0x1
#define	ADXL367_NO_INACTIVITY_DETECTION_ENABLED_2   0x2
#define	ADXL367_REFERENCED_INACTIVITY_ENABLE   0x3
#define	ADXL367_NO_ACTIVITY_DETECTION   0x0
#define	ADXL367_ACTIVITY_ENABLE   0x1
#define	ADXL367_NO_ACTIVITY_DETECTION_2   0x2
#define	ADXL367_REFERENCED_ACTIVITY_ENABLE   0x3
#define	ADXL367_FIFO_CONTROL_FIFO_CHANNEL_MSK   NO_OS_GENMASK(6, 3)
#define	ADXL367_FIFO_CONTROL_FIFO_SAMPLES   NO_OS_BIT(2)
#define	ADXL367_FIFO_CONTROL_FIFO_MODE_MSK   NO_OS_GENMASK(1, 0)
#define	ADXL367_ALL_AXIS   0x0
#define	ADXL367_X_AXIS   0x1
#define	ADXL367_Y_AXIS   0x2
#define	ADXL367_X_AXIS_2   0x3
#define	ADXL367_ALL_AXIS_TEMP   0x4
#define	ADXL367_X_AXIS_TEMP   0x5
#define	ADXL367_Y_AXIS_TEMP   0x6
#define	ADXL367_Z_AXIS_TEMP   0x7
#define	ADXL367_ALL_AXIS_EXT_ADC   0x8
#define	ADXL367_X_AXIS_EXT_ADC   0x9
#define	ADXL367_Y_AXIS_EXT_ADC   0xA
#define	ADXL367_Z_AXIS_EXT_ADC   0xB
#define	ADXL367_FIFO_DISABLE   0
#define	ADXL367_FIFO_OLDEST_SAVED   1
#define	ADXL367_FIFO_STREAM   2
#define	ADXL367_FIFO_TRIGGERED   3
#define	ADXL367_INTMAP1_INT_LOW_INT1   NO_OS_BIT(7)
#define	ADXL367_INTMAP1_AWAKE_INT1   NO_OS_BIT(6)
#define	ADXL367_INTMAP1_INACT_INT1   NO_OS_BIT(5)
#define	ADXL367_INTMAP1_ACT_INT1   NO_OS_BIT(4)
#define	ADXL367_INTMAP1_FIFO_OVERRUN_INT1   NO_OS_BIT(3)
#define	ADXL367_INTMAP1_FIFO_WATERMARK_INT1   NO_OS_BIT(2)
#define	ADXL367_INTMAP1_FIFO_RDY_INT1   NO_OS_BIT(1)
#define	ADXL367_INTMAP1_DATA_RDY_INT1   NO_OS_BIT(0)
#define	ADXL367_INTMAP2_INT_LOW_INT2   NO_OS_BIT(7)
#define	ADXL367_INTMAP2_AWAKE_INT2   NO_OS_BIT(6)
#define	ADXL367_INTMAP2_INACT_INT2   NO_OS_BIT(5)
#define	ADXL367_INTMAP2_ACT_INT2   NO_OS_BIT(4)
#define	ADXL367_INTMAP2_FIFO_OVERRUN_INT2   NO_OS_BIT(3)
#define	ADXL367_INTMAP2_FIFO_WATERMARK_INT2   NO_OS_BIT(2)
#define	ADXL367_INTMAP2_FIFO_RDY_INT2   NO_OS_BIT(1)
#define	ADXL367_INTMAP2_DATA_RDY_INT2   NO_OS_BIT(0)
#define	ADXL367_FILTER_CTL_RANGE_MSK   NO_OS_GENMASK(7, 6)
#define	ADXL367_FILTER_I2C_HS   NO_OS_BIT(5)
#define	ADXL367_FILTER_CTL_RES   NO_OS_BIT(4)
#define	ADXL367_FILTER_CTL_EXT_SAMPLE   NO_OS_BIT(3)
#define	ADXL367_FILTER_CTL_ODR_MSK   NO_OS_GENMASK(2, 0)
#define	ADXL367_RANGE_2G   0 /* +/-2 g */
#define	ADXL367_RANGE_4G   1 /* +/-4 g */
#define	ADXL367_RANGE_8G   2 /* +/-8 g */
#define	ADXL367_POWER_CTL_RES   NO_OS_BIT(7)
#define	ADXL367_POWER_CTL_EXT_CLK   NO_OS_BIT(6)
#define	ADXL367_POWER_CTL_LOW_NOISE_MSK   NO_OS_GENMASK(5, 4)
#define	ADXL367_POWER_CTL_WAKEUP   NO_OS_BIT(3)
#define	ADXL367_POWER_CTL_AUTOSLEEP   NO_OS_BIT(2)
#define	ADXL367_POWER_CTL_MEASURE_MSK   NO_OS_GENMASK(1, 0)
#define	ADXL367_NOISE_MODE_NORMAL   0
#define	ADXL367_NOISE_MODE_LOW   1
#define	ADXL367_NOISE_MODE_ULTRALOW   2
#define	ADXL367_SELF_TEST_ST_FORCE   NO_OS_BIT(1)
#define	ADXL367_SELF_TEST_ST   NO_OS_BIT(0)
#define	ADXL367_XYZ_AXIS_OFFSET_MASK   0x1F
#define	ADXL367_INTMAPX_UPPER_MASK   0xDF
#define	ADXL367_FIFO_8_12BIT_MSK   NO_OS_GENMASK(7,6)
#define	ADXL367_ADC_INACT_EN   NO_OS_BIT(3)
#define	ADXL367_ADC_ACT_EN   NO_OS_BIT(1)
#define	ADXL367_ADC_EN   NO_OS_BIT(0)
#define	ADXL367_TEMP_INACT_EN   NO_OS_BIT(3)
#define	ADXL367_TEMP_ACT_EN   NO_OS_BIT(1)
#define	ADXL367_TEMP_EN   NO_OS_BIT(0)
#define	ADXL367_DEVICE_AD   0xAD
#define	ADXL367_DEVICE_MST   0x1D
#define	ADXL367_PART_ID   0xF7
#define	ADXL367_RESET_KEY   0x52
#define	ADXL367_FIFO_X_ID   0x00
#define	ADXL367_FIFO_Y_ID   0x01
#define	ADXL367_FIFO_Z_ID   0x02
#define	ADXL367_FIFO_TEMP_ADC_ID   0x03
#define	ADXL367_ABSOLUTE   0x00
#define	ADXL367_REFERENCED   0x01
#define	ADXL367_ACC_SCALE_FACTOR_MUL   245166ULL
#define	ADXL367_ACC_SCALE_FACTOR_DIV   1000000000
#define	ADXL367_TEMP_OFFSET   1185
#define	ADXL367_TEMP_25C   165
#define	ADXL367_TEMP_SCALE   18518518
#define	ADXL367_TEMP_SCALE_DIV   1000000000
#define	ADXL367_SELF_TEST_MIN   90 * 100 / 25
#define	ADXL367_SELF_TEST_MAX   270 * 100 / 25

Enumerations
enum	adxl367_comm_type {   ADXL367_SPI_COMM,   ADXL367_I2C_COMM }
	Enum for communication type. More...
enum	adxl367_op_mode {   ADXL367_OP_STANDBY = 0,   ADXL367_OP_MEASURE = 2 }
	Enum for operating mode. More...
enum	adxl367_range {   ADXL367_2G_RANGE,   ADXL367_4G_RANGE,   ADXL367_8G_RANGE }
	Enum for selecting range. More...
enum	adxl367_odr {   ADXL367_ODR_12P5HZ,   ADXL367_ODR_25HZ,   ADXL367_ODR_50HZ,   ADXL367_ODR_100HZ,   ADXL367_ODR_200HZ,   ADXL367_ODR_400HZ }
	Enum for selecting output data rate. More...
enum	adxl367_fifo_mode {   ADXL367_FIFO_DISABLED,   ADXL367_OLDEST_SAVED,   ADXL367_STREAM_MODE,   ADXL367_TRIGGERED_MODE }
	Enum for selecting FIFO operating mode. More...
enum	adxl367_fifo_format {   ADXL367_FIFO_FORMAT_XYZ,   ADXL367_FIFO_FORMAT_X,   ADXL367_FIFO_FORMAT_Y,   ADXL367_FIFO_FORMAT_Z,   ADXL367_FIFO_FORMAT_XYZT,   ADXL367_FIFO_FORMAT_XT,   ADXL367_FIFO_FORMAT_YT,   ADXL367_FIFO_FORMAT_ZT,   ADXL367_FIFO_FORMAT_XYZA,   ADXL367_FIFO_FORMAT_XA,   ADXL367_FIFO_FORMAT_YA,   ADXL367_FIFO_FORMAT_ZA }
	Enum for selecting FIFO storage mode. More...
enum	adxl367_fifo_read_mode {   ADXL367_12B_CHID,   ADXL367_8B,   ADXL367_12B,   ADXL367_14B_CHID }
	Enum for selecting FIFO reading mode. More...

Functions
int	adxl367_init (struct adxl367_dev **device, struct adxl367_init_param init_param)
	Initializes communication with the device and checks if the part is present by reading the device id. More...
int	adxl367_remove (struct adxl367_dev *dev)
	Frees the resources allocated by adxl367_init(). More...
int	adxl367_self_test (struct adxl367_dev *dev)
	Performs self test. More...
int	adxl367_set_register_value (struct adxl367_dev *dev, uint8_t register_value, uint8_t register_address)
	Writes data into a register. More...
int	adxl367_get_register_value (struct adxl367_dev *dev, uint8_t *read_data, uint8_t register_address, uint8_t bytes_number)
	Performs a burst read of a specified number of registers. More...
int	adxl367_reg_write_msk (struct adxl367_dev *dev, uint8_t reg_addr, uint8_t data, uint8_t mask)
	Performs a masked write to a register. More...
int	adxl367_software_reset (struct adxl367_dev *dev)
	Performs soft-reset. More...
int	adxl367_set_power_mode (struct adxl367_dev *dev, enum adxl367_op_mode mode)
	Places the device into standby/measure mode. More...
int	adxl367_set_range (struct adxl367_dev *dev, enum adxl367_range range)
	Selects the measurement range. More...
int	adxl367_set_output_rate (struct adxl367_dev *dev, enum adxl367_odr odr)
	Selects the Output Data Rate of the device. More...
int	adxl367_set_offset (struct adxl367_dev *dev, uint16_t x_offset, uint16_t y_offset, uint16_t z_offset)
	Sets offset for each axis. More...
int	adxl367_get_raw_xyz (struct adxl367_dev *dev, int16_t *x, int16_t *y, int16_t *z)
	Reads the 3-axis raw data from the accelerometer. More...
int	adxl367_get_g_xyz (struct adxl367_dev *dev, struct adxl367_fractional_val *x, struct adxl367_fractional_val *y, struct adxl367_fractional_val *z)
	Reads the 3-axis raw data from the accelerometer and converts it to g. More...
int	adxl367_temp_read_en (struct adxl367_dev *dev, bool enable)
	Enables temperature reading. More...
int	adxl367_adc_read_en (struct adxl367_dev *dev, bool enable)
	Enables ADC reading. Disables temperature reading. More...
int	adxl367_read_raw_temp (struct adxl367_dev *dev, int16_t *raw_temp)
	Reads the raw temperature of the device. If ADXL367_TEMP_EN is not set, use adxl367_temp_read_en() first to enable temperature reading. More...
int	adxl367_read_temperature (struct adxl367_dev *dev, struct adxl367_fractional_val *temp)
	Reads the temperature of the device. More...
int	adxl367_read_adc (struct adxl367_dev *dev, int16_t *data)
	Reads ADC data. If ADXL367_ADC_EN is not set, use adxl367_adc_read_en() first to enable ADC reading. More...
int	adxl367_get_nb_of_fifo_entries (struct adxl367_dev *dev, uint16_t *entr_nb)
	Reads the number of FIFO entries. More...
int	adxl367_set_fifo_sample_sets_nb (struct adxl367_dev *dev, uint16_t sets_nb)
	Sets the number of FIFO sample sets. More...
int	adxl367_set_fifo_mode (struct adxl367_dev *dev, enum adxl367_fifo_mode mode)
	Sets FIFO mode. More...
int	adxl367_set_fifo_read_mode (struct adxl367_dev *dev, enum adxl367_fifo_read_mode read_mode)
	Sets FIFO read mode. More...
int	adxl367_set_fifo_format (struct adxl367_dev *dev, enum adxl367_fifo_format format)
	Sets FIFO format. More...
int	adxl367_fifo_setup (struct adxl367_dev *dev, enum adxl367_fifo_mode mode, enum adxl367_fifo_format format, uint8_t sets_nb)
	Configures the FIFO feature. Uses ADXL367_14B_CHID read mode as default. More...
int	adxl367_read_raw_fifo (struct adxl367_dev *dev, int16_t *x, int16_t *y, int16_t *z, int16_t *temp_adc, uint16_t *entries)
	Reads all available raw values from FIFO. If, after setting FIFO mode, any of x, y, z, temp or adc aren't selected, assign NULL pointer. Uses ADXL367_14B_CHID read mode as default. More...
int	adxl367_read_converted_fifo (struct adxl367_dev *dev, struct adxl367_fractional_val *x, struct adxl367_fractional_val *y, struct adxl367_fractional_val *z, struct adxl367_fractional_val *temp_adc, uint16_t *entries)
	Reads converted values from FIFO. If, after setting FIFO mode, any of x, y, z, temp or adc aren't selected, assign NULL pointer. Uses ADXL367_14B_CHID read mode as default. More...
int	adxl367_int_map (struct adxl367_dev *dev, struct adxl367_int_map *map, uint8_t pin)
	Enables specified events to interrupt pin. More...
int	adxl367_setup_activity_detection (struct adxl367_dev *dev, uint8_t ref_or_abs, uint16_t threshold, uint8_t time)
	Configures activity detection. More...
int	adxl367_setup_inactivity_detection (struct adxl367_dev *dev, uint8_t ref_or_abs, uint16_t threshold, uint16_t time)
	Configures inactivity detection. More...

Detailed Description

Header file of ADXL367 Driver.

Author

Andrei Porumb (andre.nosp@m.i.po.nosp@m.rumb@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Copyright 2022(c) Analog Devices, Inc.

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

• Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
• Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
• Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
• The use of this software may or may not infringe the patent rights of one or more patent holders. This license does not release you from the requirement that you obtain separate licenses from these patent holders to use this software.
• Use of the software either in source or binary form, must be run on or directly connected to an Analog Devices Inc. component.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

ADXL367_ABSOLUTE

#define ADXL367_ABSOLUTE   0x00

ADXL367_ACC_SCALE_FACTOR_DIV

#define ADXL367_ACC_SCALE_FACTOR_DIV   1000000000

ADXL367_ACC_SCALE_FACTOR_MUL

#define ADXL367_ACC_SCALE_FACTOR_MUL   245166ULL

ADXL367_ACT_INACT_CTL_ACT_EN_MSK

#define ADXL367_ACT_INACT_CTL_ACT_EN_MSK   NO_OS_GENMASK(1, 0)

ADXL367_ACT_INACT_CTL_INACT_EN_MSK

#define ADXL367_ACT_INACT_CTL_INACT_EN_MSK   NO_OS_GENMASK(3, 2)

ADXL367_ACT_INACT_CTL_LINKLOOP_MSK

#define ADXL367_ACT_INACT_CTL_LINKLOOP_MSK   NO_OS_GENMASK(5, 4)

ADXL367_ACTIVITY_ENABLE

#define ADXL367_ACTIVITY_ENABLE   0x1

ADXL367_ADC_ACT_EN

#define ADXL367_ADC_ACT_EN   NO_OS_BIT(1)

ADXL367_ADC_EN

#define ADXL367_ADC_EN   NO_OS_BIT(0)

ADXL367_ADC_INACT_EN

#define ADXL367_ADC_INACT_EN   NO_OS_BIT(3)

ADXL367_ALL_AXIS

#define ADXL367_ALL_AXIS   0x0

ADXL367_ALL_AXIS_EXT_ADC

#define ADXL367_ALL_AXIS_EXT_ADC   0x8

ADXL367_ALL_AXIS_TEMP

#define ADXL367_ALL_AXIS_TEMP   0x4

ADXL367_DEVICE_AD

#define ADXL367_DEVICE_AD   0xAD

ADXL367_DEVICE_MST

#define ADXL367_DEVICE_MST   0x1D

ADXL367_FIFO_8_12BIT_MSK

#define ADXL367_FIFO_8_12BIT_MSK   NO_OS_GENMASK(7,6)

ADXL367_FIFO_CONTROL_FIFO_CHANNEL_MSK

#define ADXL367_FIFO_CONTROL_FIFO_CHANNEL_MSK   NO_OS_GENMASK(6, 3)

ADXL367_FIFO_CONTROL_FIFO_MODE_MSK

#define ADXL367_FIFO_CONTROL_FIFO_MODE_MSK   NO_OS_GENMASK(1, 0)

ADXL367_FIFO_CONTROL_FIFO_SAMPLES

#define ADXL367_FIFO_CONTROL_FIFO_SAMPLES   NO_OS_BIT(2)

ADXL367_FIFO_DISABLE

#define ADXL367_FIFO_DISABLE   0

ADXL367_FIFO_OLDEST_SAVED

#define ADXL367_FIFO_OLDEST_SAVED   1

ADXL367_FIFO_STREAM

#define ADXL367_FIFO_STREAM   2

ADXL367_FIFO_TEMP_ADC_ID

#define ADXL367_FIFO_TEMP_ADC_ID   0x03

ADXL367_FIFO_TRIGGERED

#define ADXL367_FIFO_TRIGGERED   3

ADXL367_FIFO_X_ID

#define ADXL367_FIFO_X_ID   0x00

ADXL367_FIFO_Y_ID

#define ADXL367_FIFO_Y_ID   0x01

ADXL367_FIFO_Z_ID

#define ADXL367_FIFO_Z_ID   0x02

ADXL367_FILTER_CTL_EXT_SAMPLE

#define ADXL367_FILTER_CTL_EXT_SAMPLE   NO_OS_BIT(3)

ADXL367_FILTER_CTL_ODR_MSK

#define ADXL367_FILTER_CTL_ODR_MSK   NO_OS_GENMASK(2, 0)

ADXL367_FILTER_CTL_RANGE_MSK

#define ADXL367_FILTER_CTL_RANGE_MSK   NO_OS_GENMASK(7, 6)

ADXL367_FILTER_CTL_RES

#define ADXL367_FILTER_CTL_RES   NO_OS_BIT(4)

ADXL367_FILTER_I2C_HS

#define ADXL367_FILTER_I2C_HS   NO_OS_BIT(5)

ADXL367_I2C_READ

#define ADXL367_I2C_READ   0x01

ADXL367_I2C_WRITE

#define ADXL367_I2C_WRITE   0x00

ADXL367_INACTIVITY_ENABLE

#define ADXL367_INACTIVITY_ENABLE   0x1

ADXL367_INTMAP1_ACT_INT1

#define ADXL367_INTMAP1_ACT_INT1   NO_OS_BIT(4)

ADXL367_INTMAP1_AWAKE_INT1

#define ADXL367_INTMAP1_AWAKE_INT1   NO_OS_BIT(6)

ADXL367_INTMAP1_DATA_RDY_INT1

#define ADXL367_INTMAP1_DATA_RDY_INT1   NO_OS_BIT(0)

ADXL367_INTMAP1_FIFO_OVERRUN_INT1

#define ADXL367_INTMAP1_FIFO_OVERRUN_INT1   NO_OS_BIT(3)

ADXL367_INTMAP1_FIFO_RDY_INT1

#define ADXL367_INTMAP1_FIFO_RDY_INT1   NO_OS_BIT(1)

ADXL367_INTMAP1_FIFO_WATERMARK_INT1

#define ADXL367_INTMAP1_FIFO_WATERMARK_INT1   NO_OS_BIT(2)

ADXL367_INTMAP1_INACT_INT1

#define ADXL367_INTMAP1_INACT_INT1   NO_OS_BIT(5)

ADXL367_INTMAP1_INT_LOW_INT1

#define ADXL367_INTMAP1_INT_LOW_INT1   NO_OS_BIT(7)

ADXL367_INTMAP2_ACT_INT2

#define ADXL367_INTMAP2_ACT_INT2   NO_OS_BIT(4)

ADXL367_INTMAP2_AWAKE_INT2

#define ADXL367_INTMAP2_AWAKE_INT2   NO_OS_BIT(6)

ADXL367_INTMAP2_DATA_RDY_INT2

#define ADXL367_INTMAP2_DATA_RDY_INT2   NO_OS_BIT(0)

ADXL367_INTMAP2_FIFO_OVERRUN_INT2

#define ADXL367_INTMAP2_FIFO_OVERRUN_INT2   NO_OS_BIT(3)

ADXL367_INTMAP2_FIFO_RDY_INT2

#define ADXL367_INTMAP2_FIFO_RDY_INT2   NO_OS_BIT(1)

ADXL367_INTMAP2_FIFO_WATERMARK_INT2

#define ADXL367_INTMAP2_FIFO_WATERMARK_INT2   NO_OS_BIT(2)

ADXL367_INTMAP2_INACT_INT2

#define ADXL367_INTMAP2_INACT_INT2   NO_OS_BIT(5)

ADXL367_INTMAP2_INT_LOW_INT2

#define ADXL367_INTMAP2_INT_LOW_INT2   NO_OS_BIT(7)

ADXL367_INTMAPX_UPPER_MASK

#define ADXL367_INTMAPX_UPPER_MASK   0xDF

ADXL367_NO_ACTIVITY_DETECTION

#define ADXL367_NO_ACTIVITY_DETECTION   0x0

ADXL367_NO_ACTIVITY_DETECTION_2

#define ADXL367_NO_ACTIVITY_DETECTION_2   0x2

ADXL367_NO_INACTIVITY_DETECTION_ENABLED

#define ADXL367_NO_INACTIVITY_DETECTION_ENABLED   0x0

ADXL367_NO_INACTIVITY_DETECTION_ENABLED_2

#define ADXL367_NO_INACTIVITY_DETECTION_ENABLED_2   0x2

ADXL367_NOISE_MODE_LOW

#define ADXL367_NOISE_MODE_LOW   1

ADXL367_NOISE_MODE_NORMAL

#define ADXL367_NOISE_MODE_NORMAL   0

ADXL367_NOISE_MODE_ULTRALOW

#define ADXL367_NOISE_MODE_ULTRALOW   2

ADXL367_PART_ID

#define ADXL367_PART_ID   0xF7

ADXL367_POWER_CTL_AUTOSLEEP

#define ADXL367_POWER_CTL_AUTOSLEEP   NO_OS_BIT(2)

ADXL367_POWER_CTL_EXT_CLK

#define ADXL367_POWER_CTL_EXT_CLK   NO_OS_BIT(6)

ADXL367_POWER_CTL_LOW_NOISE_MSK

#define ADXL367_POWER_CTL_LOW_NOISE_MSK   NO_OS_GENMASK(5, 4)

ADXL367_POWER_CTL_MEASURE_MSK

#define ADXL367_POWER_CTL_MEASURE_MSK   NO_OS_GENMASK(1, 0)

ADXL367_POWER_CTL_RES

#define ADXL367_POWER_CTL_RES   NO_OS_BIT(7)

ADXL367_POWER_CTL_WAKEUP

#define ADXL367_POWER_CTL_WAKEUP   NO_OS_BIT(3)

ADXL367_RANGE_2G

#define ADXL367_RANGE_2G   0 /* +/-2 g */

ADXL367_RANGE_4G

#define ADXL367_RANGE_4G   1 /* +/-4 g */

ADXL367_RANGE_8G

#define ADXL367_RANGE_8G   2 /* +/-8 g */

ADXL367_READ_FIFO

#define ADXL367_READ_FIFO   0x0D

ADXL367_READ_REG

#define ADXL367_READ_REG   0x0B

ADXL367_REFERENCED

#define ADXL367_REFERENCED   0x01

ADXL367_REFERENCED_ACTIVITY_ENABLE

#define ADXL367_REFERENCED_ACTIVITY_ENABLE   0x3

ADXL367_REFERENCED_INACTIVITY_ENABLE

#define ADXL367_REFERENCED_INACTIVITY_ENABLE   0x3

ADXL367_REG_ACT_INACT_CTL

#define ADXL367_REG_ACT_INACT_CTL   0x27

ADXL367_REG_ADC_CTL

#define ADXL367_REG_ADC_CTL   0x3C

ADXL367_REG_AXIS_MASK

#define ADXL367_REG_AXIS_MASK   0x43

ADXL367_REG_DEVID_AD

#define ADXL367_REG_DEVID_AD   0x00

ADXL367_REG_DEVID_MST

#define ADXL367_REG_DEVID_MST   0x01

ADXL367_REG_EX_ADC_H

#define ADXL367_REG_EX_ADC_H   0x16

ADXL367_REG_EX_ADC_L

#define ADXL367_REG_EX_ADC_L   0x17

ADXL367_REG_FIFO_CONTROL

#define ADXL367_REG_FIFO_CONTROL   0x28

ADXL367_REG_FIFO_ENTRIES_H

#define ADXL367_REG_FIFO_ENTRIES_H   0x0D

ADXL367_REG_FIFO_ENTRIES_L

#define ADXL367_REG_FIFO_ENTRIES_L   0x0C

ADXL367_REG_FIFO_SAMPLES

#define ADXL367_REG_FIFO_SAMPLES   0x29

ADXL367_REG_FILTER_CTL

#define ADXL367_REG_FILTER_CTL   0x2C

ADXL367_REG_I2C_FIFO_DATA

#define ADXL367_REG_I2C_FIFO_DATA   0x18

ADXL367_REG_INTMAP1_LWR

#define ADXL367_REG_INTMAP1_LWR   0x2A

ADXL367_REG_INTMAP1_UPPER

#define ADXL367_REG_INTMAP1_UPPER   0x3A

ADXL367_REG_INTMAP2_LWR

#define ADXL367_REG_INTMAP2_LWR   0x2B

ADXL367_REG_INTMAP2_UPPER

#define ADXL367_REG_INTMAP2_UPPER   0x3B

ADXL367_REG_PARTID

#define ADXL367_REG_PARTID   0x02

ADXL367_REG_POWER_CTL

#define ADXL367_REG_POWER_CTL   0x2D

ADXL367_REG_REVID

#define ADXL367_REG_REVID   0x03

ADXL367_REG_SELF_TEST

#define ADXL367_REG_SELF_TEST   0x2E

ADXL367_REG_SERIAL_NUMBER_0

#define ADXL367_REG_SERIAL_NUMBER_0   0x07

ADXL367_REG_SERIAL_NUMBER_1

#define ADXL367_REG_SERIAL_NUMBER_1   0x06

ADXL367_REG_SERIAL_NUMBER_2

#define ADXL367_REG_SERIAL_NUMBER_2   0x05

ADXL367_REG_SERIAL_NUMBER_3

#define ADXL367_REG_SERIAL_NUMBER_3   0x04

ADXL367_REG_SOFT_RESET

#define ADXL367_REG_SOFT_RESET   0x1F

ADXL367_REG_STATUS

#define ADXL367_REG_STATUS   0x0B

ADXL367_REG_STATUS_2

#define ADXL367_REG_STATUS_2   0x45

ADXL367_REG_STATUS_COPY

#define ADXL367_REG_STATUS_COPY   0x44

ADXL367_REG_TAP_DUR

#define ADXL367_REG_TAP_DUR   0x30

ADXL367_REG_TAP_LATENT

#define ADXL367_REG_TAP_LATENT   0x31

ADXL367_REG_TAP_THRESH

#define ADXL367_REG_TAP_THRESH   0x2F

ADXL367_REG_TAP_WINDOW

#define ADXL367_REG_TAP_WINDOW   0x32

ADXL367_REG_TEMP_ADC_OV_TH_H

#define ADXL367_REG_TEMP_ADC_OV_TH_H   0x3E

ADXL367_REG_TEMP_ADC_OV_TH_L

#define ADXL367_REG_TEMP_ADC_OV_TH_L   0x3F

ADXL367_REG_TEMP_ADC_TIMER

#define ADXL367_REG_TEMP_ADC_TIMER   0x42

ADXL367_REG_TEMP_ADC_UN_TH_H

#define ADXL367_REG_TEMP_ADC_UN_TH_H   0x40

ADXL367_REG_TEMP_ADC_UN_TH_L

#define ADXL367_REG_TEMP_ADC_UN_TH_L   0x41

ADXL367_REG_TEMP_CTL

#define ADXL367_REG_TEMP_CTL   0x3D

ADXL367_REG_TEMP_H

#define ADXL367_REG_TEMP_H   0x14

ADXL367_REG_TEMP_L

#define ADXL367_REG_TEMP_L   0x15

ADXL367_REG_THRESH_ACT_H

#define ADXL367_REG_THRESH_ACT_H   0x20

ADXL367_REG_THRESH_ACT_L

#define ADXL367_REG_THRESH_ACT_L   0x21

ADXL367_REG_THRESH_INACT_H

#define ADXL367_REG_THRESH_INACT_H   0x23

ADXL367_REG_THRESH_INACT_L

#define ADXL367_REG_THRESH_INACT_L   0x24

ADXL367_REG_TIME_ACT

#define ADXL367_REG_TIME_ACT   0x22

ADXL367_REG_TIME_INACT_H

#define ADXL367_REG_TIME_INACT_H   0x25

ADXL367_REG_TIME_INACT_L

#define ADXL367_REG_TIME_INACT_L   0x26

ADXL367_REG_TIMER_CTL

#define ADXL367_REG_TIMER_CTL   0x39

ADXL367_REG_X_OFFSET

#define ADXL367_REG_X_OFFSET   0x33

ADXL367_REG_X_SENS

#define ADXL367_REG_X_SENS   0x36

ADXL367_REG_XDATA

#define ADXL367_REG_XDATA   0x08

ADXL367_REG_XDATA_H

#define ADXL367_REG_XDATA_H   0x0E

ADXL367_REG_XDATA_L

#define ADXL367_REG_XDATA_L   0x0F

ADXL367_REG_Y_OFFSET

#define ADXL367_REG_Y_OFFSET   0x34

ADXL367_REG_Y_SENS

#define ADXL367_REG_Y_SENS   0x37

ADXL367_REG_YDATA

#define ADXL367_REG_YDATA   0x09

ADXL367_REG_YDATA_H

#define ADXL367_REG_YDATA_H   0x10

ADXL367_REG_YDATA_L

#define ADXL367_REG_YDATA_L   0x11

ADXL367_REG_Z_OFFSET

#define ADXL367_REG_Z_OFFSET   0x35

ADXL367_REG_Z_SENS

#define ADXL367_REG_Z_SENS   0x38

ADXL367_REG_ZDATA

#define ADXL367_REG_ZDATA   0x0A

ADXL367_REG_ZDATA_H

#define ADXL367_REG_ZDATA_H   0x12

ADXL367_REG_ZDATA_L

#define ADXL367_REG_ZDATA_L   0x13

ADXL367_RESET_KEY

#define ADXL367_RESET_KEY   0x52

ADXL367_SELF_TEST_MAX

#define ADXL367_SELF_TEST_MAX   270 * 100 / 25

ADXL367_SELF_TEST_MIN

#define ADXL367_SELF_TEST_MIN   90 * 100 / 25

ADXL367_SELF_TEST_ST

#define ADXL367_SELF_TEST_ST   NO_OS_BIT(0)

ADXL367_SELF_TEST_ST_FORCE

#define ADXL367_SELF_TEST_ST_FORCE   NO_OS_BIT(1)

ADXL367_STATUS_ACT

#define ADXL367_STATUS_ACT   NO_OS_BIT(4)

ADXL367_STATUS_AWAKE

#define ADXL367_STATUS_AWAKE   NO_OS_BIT(6)

ADXL367_STATUS_DATA_RDY

#define ADXL367_STATUS_DATA_RDY   NO_OS_BIT(0)

ADXL367_STATUS_ERR_USER_REGS

#define ADXL367_STATUS_ERR_USER_REGS   NO_OS_BIT(7)

ADXL367_STATUS_FIFO_OVERRUN

#define ADXL367_STATUS_FIFO_OVERRUN   NO_OS_BIT(3)

ADXL367_STATUS_FIFO_RDY

#define ADXL367_STATUS_FIFO_RDY   NO_OS_BIT(1)

ADXL367_STATUS_FIFO_WATERMARK

#define ADXL367_STATUS_FIFO_WATERMARK   NO_OS_BIT(2)

ADXL367_STATUS_INACT

#define ADXL367_STATUS_INACT   NO_OS_BIT(5)

ADXL367_TEMP_25C

#define ADXL367_TEMP_25C   165

ADXL367_TEMP_ACT_EN

#define ADXL367_TEMP_ACT_EN   NO_OS_BIT(1)

ADXL367_TEMP_EN

#define ADXL367_TEMP_EN   NO_OS_BIT(0)

ADXL367_TEMP_INACT_EN

#define ADXL367_TEMP_INACT_EN   NO_OS_BIT(3)

ADXL367_TEMP_OFFSET

#define ADXL367_TEMP_OFFSET   1185

ADXL367_TEMP_SCALE

#define ADXL367_TEMP_SCALE   18518518

ADXL367_TEMP_SCALE_DIV

#define ADXL367_TEMP_SCALE_DIV   1000000000

ADXL367_THRESH_H

#define ADXL367_THRESH_H   0x7F

ADXL367_THRESH_L

#define ADXL367_THRESH_L   0xFC

ADXL367_WRITE_REG

#define ADXL367_WRITE_REG   0x0A

ADXL367_X_AXIS

#define ADXL367_X_AXIS   0x1

ADXL367_X_AXIS_2

#define ADXL367_X_AXIS_2   0x3

ADXL367_X_AXIS_EXT_ADC

#define ADXL367_X_AXIS_EXT_ADC   0x9

ADXL367_X_AXIS_TEMP

#define ADXL367_X_AXIS_TEMP   0x5

ADXL367_XYZ_AXIS_OFFSET_MASK

#define ADXL367_XYZ_AXIS_OFFSET_MASK   0x1F

ADXL367_Y_AXIS

#define ADXL367_Y_AXIS   0x2

ADXL367_Y_AXIS_EXT_ADC

#define ADXL367_Y_AXIS_EXT_ADC   0xA

ADXL367_Y_AXIS_TEMP

#define ADXL367_Y_AXIS_TEMP   0x6

ADXL367_Z_AXIS_EXT_ADC

#define ADXL367_Z_AXIS_EXT_ADC   0xB

ADXL367_Z_AXIS_TEMP

#define ADXL367_Z_AXIS_TEMP   0x7

Enumeration Type Documentation

adxl367_comm_type

enum adxl367_comm_type

Enum for communication type.

Enumerator
ADXL367_SPI_COMM
ADXL367_I2C_COMM

adxl367_fifo_format

enum adxl367_fifo_format

Enum for selecting FIFO storage mode.

Enumerator
ADXL367_FIFO_FORMAT_XYZ
ADXL367_FIFO_FORMAT_X
ADXL367_FIFO_FORMAT_Y
ADXL367_FIFO_FORMAT_Z
ADXL367_FIFO_FORMAT_XYZT
ADXL367_FIFO_FORMAT_XT
ADXL367_FIFO_FORMAT_YT
ADXL367_FIFO_FORMAT_ZT
ADXL367_FIFO_FORMAT_XYZA
ADXL367_FIFO_FORMAT_XA
ADXL367_FIFO_FORMAT_YA
ADXL367_FIFO_FORMAT_ZA

adxl367_fifo_mode

enum adxl367_fifo_mode

Enum for selecting FIFO operating mode.

Enumerator
ADXL367_FIFO_DISABLED
ADXL367_OLDEST_SAVED
ADXL367_STREAM_MODE
ADXL367_TRIGGERED_MODE

adxl367_fifo_read_mode

enum adxl367_fifo_read_mode

Enum for selecting FIFO reading mode.

Enumerator
ADXL367_12B_CHID
ADXL367_8B
ADXL367_12B
ADXL367_14B_CHID

adxl367_odr

enum adxl367_odr

Enum for selecting output data rate.

Enumerator
ADXL367_ODR_12P5HZ
ADXL367_ODR_25HZ
ADXL367_ODR_50HZ
ADXL367_ODR_100HZ
ADXL367_ODR_200HZ
ADXL367_ODR_400HZ

adxl367_op_mode

enum adxl367_op_mode

Enum for operating mode.

Enumerator
ADXL367_OP_STANDBY
ADXL367_OP_MEASURE

adxl367_range

enum adxl367_range

Enum for selecting range.

Enumerator
ADXL367_2G_RANGE
ADXL367_4G_RANGE
ADXL367_8G_RANGE

Function Documentation

adxl367_adc_read_en()

int adxl367_adc_read_en	(	struct adxl367_dev *	dev,
		bool	enable
	)

Enables ADC reading. Disables temperature reading.

Parameters

dev	- The device structure.
enable	- 1 - ENABLE 2 - DISABLE

Returns

0 in case of success, negative error code otherwise.

adxl367_fifo_setup()

int adxl367_fifo_setup	(	struct adxl367_dev *	dev,
		enum adxl367_fifo_mode	mode,
		enum adxl367_fifo_format	format,
		uint8_t	sets_nb
	)

Configures the FIFO feature. Uses ADXL367_14B_CHID read mode as default.

Parameters

dev	- The device structure.
mode	- FIFO mode selection. Example: ADXL367_FIFO_DISABLED, ADXL367_OLDEST_SAVED, ADXL367_STREAM_MODE, ADXL367_TRIGGERED_MODE
format	- FIFO format selection. Example: ADXL367_FIFO_FORMAT_XYZ, ADXL367_FIFO_FORMAT_X, ADXL367_FIFO_FORMAT_Y, ADXL367_FIFO_FORMAT_Z, ADXL367_FIFO_FORMAT_XYZT, ADXL367_FIFO_FORMAT_XT, ADXL367_FIFO_FORMAT_YT, ADXL367_FIFO_FORMAT_ZT, ADXL367_FIFO_FORMAT_XYZA, ADXL367_FIFO_FORMAT_XA, ADXL367_FIFO_FORMAT_YA, ADXL367_FIFO_FORMAT_ZA
sets_nb	- Specifies the number of samples sets to store in the FIFO.

Returns

0 in case of success, negative error code otherwise.

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adxl367_get_g_xyz()

int adxl367_get_g_xyz	(	struct adxl367_dev *	dev,
		struct adxl367_fractional_val *	x,
		struct adxl367_fractional_val *	y,
		struct adxl367_fractional_val *	z
	)

Reads the 3-axis raw data from the accelerometer and converts it to g.

Parameters

dev	- The device structure.
x	- Stores the X-axis data.
y	- Stores the Y-axis data.
z	- Stores the Z-axis data.

Returns

0 in case of success, negative error code otherwise.

adxl367_get_nb_of_fifo_entries()

int adxl367_get_nb_of_fifo_entries	(	struct adxl367_dev *	dev,
		uint16_t *	entr_nb
	)

Reads the number of FIFO entries.

Parameters

dev	- The device structure.
entr_nb	- Entries number. Different from sets number. For example, if ADXL367_FIFO_FORMAT_XYZ is selected, one set contains 3 entries.

Returns

0 in case of success, negative error code otherwise.

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adxl367_get_raw_xyz()

int adxl367_get_raw_xyz	(	struct adxl367_dev *	dev,
		int16_t *	x,
		int16_t *	y,
		int16_t *	z
	)

Reads the 3-axis raw data from the accelerometer.

Parameters

dev	- The device structure.
x	- Stores the X-axis data(as two's complement).
y	- Stores the Y-axis data(as two's complement).
z	- Stores the Z-axis data(as two's complement).

Returns

0 in case of success, negative error code otherwise.

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adxl367_get_register_value()

int adxl367_get_register_value	(	struct adxl367_dev *	dev,
		uint8_t *	read_data,
		uint8_t	register_address,
		uint8_t	register_nb
	)

Performs a burst read of a specified number of registers.

Parameters

dev	- The device structure.
read_data	- The read values are stored in this buffer.
register_address	- The start address of the burst read.
register_nb	- Number of registers to be read in burst.

Returns

0 in case of success, negative error code otherwise.

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adxl367_init()

int adxl367_init	(	struct adxl367_dev **	device,
		struct adxl367_init_param	init_param
	)

Initializes communication with the device and checks if the part is present by reading the device id.

Parameters

device	- The device structure.
init_param	- The structure that contains the device initial parameters.

Returns

0 in case of success, negative error code otherwise.

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adxl367_int_map()

int adxl367_int_map	(	struct adxl367_dev *	dev,
		struct adxl367_int_map *	map,
		uint8_t	pin
	)

Enables specified events to interrupt pin.

Parameters

dev	- The device structure.
map	- Structure with enabled events.
pin	- INT pin number. Accepted values: 1 - INT1 2 - INT2

Returns

0 in case of success, negative error code otherwise.

adxl367_read_adc()

int adxl367_read_adc	(	struct adxl367_dev *	dev,
		int16_t *	data
	)

Reads ADC data. If ADXL367_ADC_EN is not set, use adxl367_adc_read_en() first to enable ADC reading.

Parameters

dev	- The device structure.
data	- ADC value.

Returns

0 in case of success, negative error code otherwise.

adxl367_read_converted_fifo()

int adxl367_read_converted_fifo	(	struct adxl367_dev *	dev,
		struct adxl367_fractional_val *	x,
		struct adxl367_fractional_val *	y,
		struct adxl367_fractional_val *	z,
		struct adxl367_fractional_val *	temp_adc,
		uint16_t *	entries
	)

Reads converted values from FIFO. If, after setting FIFO mode, any of x, y, z, temp or adc aren't selected, assign NULL pointer. Uses ADXL367_14B_CHID read mode as default.

Parameters

dev	- The device structure.
x	- X axis fractional data buffer. If not used, assign NULL.
y	- Y axis fractional data buffer. If not used, assign NULL.
z	- Z axis fractional data buffer. If not used, assign NULL.
temp_adc	- Fractional buffer for temperature. If ADC is used, ADC's value will be stored to integer field. If not used, assign NULL.
entries	- Number of read entries.

Returns

0 in case of success, negative error code otherwise.

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adxl367_read_raw_fifo()

int adxl367_read_raw_fifo	(	struct adxl367_dev *	dev,
		int16_t *	x,
		int16_t *	y,
		int16_t *	z,
		int16_t *	temp_adc,
		uint16_t *	entries
	)

Reads all available raw values from FIFO. If, after setting FIFO mode, any of x, y, z, temp or adc aren't selected, assign NULL pointer. Uses ADXL367_14B_CHID read mode as default.

Parameters

dev	- The device structure.
x	- X axis raw data buffer. If not used, assign NULL.
y	- Y axis raw data buffer. If not used, assign NULL.
z	- Z axis raw data buffer. If not used, assign NULL.
temp_adc	- Data buffer for temperature or adc raw data. If not used assign NULL.
entries	- Number of read entries.

Returns

0 in case of success, negative error code otherwise.

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adxl367_read_raw_temp()

int adxl367_read_raw_temp	(	struct adxl367_dev *	dev,
		int16_t *	raw_temp
	)

Reads the raw temperature of the device. If ADXL367_TEMP_EN is not set, use adxl367_temp_read_en() first to enable temperature reading.

Parameters

dev	- The device structure.
raw_temp	- Raw value of temperature.

Returns

0 in case of success, negative error code otherwise.

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adxl367_read_temperature()

int adxl367_read_temperature	(	struct adxl367_dev *	dev,
		struct adxl367_fractional_val *	temp
	)

Reads the temperature of the device.

Parameters

dev	- The device structure.
temp	- Temperature output data.

Returns

0 in case of success, negative error code otherwise.

adxl367_reg_write_msk()

int adxl367_reg_write_msk	(	struct adxl367_dev *	dev,
		uint8_t	reg_addr,
		uint8_t	data,
		uint8_t	mask
	)

Performs a masked write to a register.

Parameters

dev	- The device structure.
reg_addr	- The register address.
data	- The register data.
mask	- The mask.

Returns

0 in case of success, negative error code otherwise.

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adxl367_remove()

int adxl367_remove

(

struct adxl367_dev *

dev

)

Frees the resources allocated by adxl367_init().

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

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adxl367_self_test()

int adxl367_self_test

(

struct adxl367_dev *

dev

)

Performs self test.

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

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adxl367_set_fifo_format()

int adxl367_set_fifo_format	(	struct adxl367_dev *	dev,
		enum adxl367_fifo_format	format
	)

Sets FIFO format.

Parameters

dev	- The device structure.
format	- FIFO format. Accepted values: ADXL367_FIFO_FORMAT_XYZ, ADXL367_FIFO_FORMAT_X, ADXL367_FIFO_FORMAT_Y, ADXL367_FIFO_FORMAT_Z, ADXL367_FIFO_FORMAT_XYZT, ADXL367_FIFO_FORMAT_XT, ADXL367_FIFO_FORMAT_YT, ADXL367_FIFO_FORMAT_ZT, ADXL367_FIFO_FORMAT_XYZA, ADXL367_FIFO_FORMAT_XA, ADXL367_FIFO_FORMAT_YA, ADXL367_FIFO_FORMAT_ZA

Returns

0 in case of success, negative error code otherwise.

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adxl367_set_fifo_mode()

int adxl367_set_fifo_mode	(	struct adxl367_dev *	dev,
		enum adxl367_fifo_mode	mode
	)

Sets FIFO mode.

Parameters

dev	- The device structure.
mode	- FIFO mode. Accepted values: ADXL367_FIFO_DISABLED, ADXL367_OLDEST_SAVED, ADXL367_STREAM_MODE, ADXL367_TRIGGERED_MODE

Returns

0 in case of success, negative error code otherwise.

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adxl367_set_fifo_read_mode()

int adxl367_set_fifo_read_mode	(	struct adxl367_dev *	dev,
		enum adxl367_fifo_read_mode	read_mode
	)

Sets FIFO read mode.

Parameters

dev	- The device structure.
read_mode	- FIFO read mode. Accepted values: ADXL367_12B_CHID, ADXL367_8B, ADXL367_12B, ADXL367_14B_CHID

Returns

0 in case of success, negative error code otherwise.

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adxl367_set_fifo_sample_sets_nb()

int adxl367_set_fifo_sample_sets_nb	(	struct adxl367_dev *	dev,
		uint16_t	sets_nb
	)

Sets the number of FIFO sample sets.

Parameters

dev	- The device structure.
sets_nb	- Sample sets number. For example, if ADXL367_FIFO_FORMAT_XYZ is selected, a value of 2 will represent 6 entries.

Returns

0 in case of success, negative error code otherwise.

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adxl367_set_offset()

int adxl367_set_offset	(	struct adxl367_dev *	dev,
		uint16_t	x_offset,
		uint16_t	y_offset,
		uint16_t	z_offset
	)

Sets offset for each axis.

Parameters

dev	- The device structure.
x_offset	- X axis offset.
y_offset	- Y axis offset.
z_offset	- Z axis offset.

Returns

0 in case of success, negative error code otherwise.

adxl367_set_output_rate()

int adxl367_set_output_rate	(	struct adxl367_dev *	dev,
		enum adxl367_odr	odr
	)

Selects the Output Data Rate of the device.

Parameters

dev	- The device structure.
odr	- Output Data Rate option. Accepted values: ADXL367_ODR_12P5HZ, ADXL367_ODR_25HZ, ADXL367_ODR_50HZ, ADXL367_ODR_100HZ, ADXL367_ODR_200HZ, ADXL367_ODR_400HZ

Returns

0 in case of success, negative error code otherwise.

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adxl367_set_power_mode()

int adxl367_set_power_mode	(	struct adxl367_dev *	dev,
		enum adxl367_op_mode	mode
	)

Places the device into standby/measure mode.

Parameters

dev	- The device structure.
mode	- Power mode. Accepted values: ADXL367_OP_STANDBY = 0, ADXL367_OP_MEASURE = 2

Returns

0 in case of success, negative error code otherwise.

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adxl367_set_range()

int adxl367_set_range	(	struct adxl367_dev *	dev,
		enum adxl367_range	range
	)

Selects the measurement range.

Parameters

dev	- The device structure.
range	- Range option. Accepted values: ADXL367_2G_RANGE, +/- 2g ADXL367_4G_RANGE, +/- 4g ADXL367_8G_RANGE +/- 8g

Returns

0 in case of success, negative error code otherwise.

adxl367_set_register_value()

int adxl367_set_register_value	(	struct adxl367_dev *	dev,
		uint8_t	register_value,
		uint8_t	register_address
	)

Writes data into a register.

Parameters

dev	- The device structure.
register_value	- Data value to write.
register_address	- Address of the register.

Returns

0 in case of success, negative error code otherwise.

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adxl367_setup_activity_detection()

int adxl367_setup_activity_detection	(	struct adxl367_dev *	dev,
		uint8_t	ref_or_abs,
		uint16_t	threshold,
		uint8_t	time
	)

Configures activity detection.

Parameters

dev	- The device structure.
ref_or_abs	- Referenced/Absolute Activity Select. Example: 0 - absolute mode. 1 - referenced mode.
threshold	- 13-bit unsigned value samples are compared to.
time	- 8-bit value written to the timed activity register. Value = number of samples. For example, at 100Hz ODR, 100 value translates to 1 second.

Returns

0 in case of success, negative error code otherwise.

adxl367_setup_inactivity_detection()

int adxl367_setup_inactivity_detection	(	struct adxl367_dev *	dev,
		uint8_t	ref_or_abs,
		uint16_t	threshold,
		uint16_t	time
	)

Configures inactivity detection.

Parameters

dev	- The device structure.
ref_or_abs	- Referenced/Absolute Inactivity Select. Example: 0 - absolute mode. 1 - referenced mode.
threshold	- 13-bit unsigned value samples are compared to.
time	- 16-bit value written to the timed inactivity register. Value = number of samples. For example, at 100Hz ODR, 100 value translates to 1 second.

Returns

0 in case of success, negative error code otherwise.

adxl367_software_reset()

int adxl367_software_reset

(

struct adxl367_dev *

dev

)

Performs soft-reset.

Parameters

dev	- The device structure.

Returns

0 in case of success, negative error code otherwise.

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adxl367_temp_read_en()

int adxl367_temp_read_en	(	struct adxl367_dev *	dev,
		bool	enable
	)

Enables temperature reading.

Parameters

dev	- The device structure.
enable	- 1 - ENABLE 2 - DISABLE

Returns

0 in case of success, negative error code otherwise.

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