no-OS
Classes | Macros | Typedefs | Enumerations | Functions
adxl372.h File Reference

Header file for adxl372 Driver. More...

#include <stdint.h>
#include "no_os_util.h"
#include "no_os_delay.h"
#include "no_os_gpio.h"
#include "no_os_i2c.h"
#include "no_os_spi.h"
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Classes

struct  adxl372_fifo_config
 
struct  adxl372_activity_threshold
 
struct  adxl372_xyz_accel_data
 
struct  adxl372_irq_config
 
struct  adxl372_dev
 
struct  adxl372_init_param
 

Macros

#define ADXL372_DEVID   0x00u /* Analog Devices, Inc., accelerometer ID */
 
#define ADXL372_DEVID_MST   0x01u /* Analog Devices MEMS device ID */
 
#define ADXL372_PARTID   0x02u /* Device ID */
 
#define ADXL372_REVID   0x03u /* product revision ID*/
 
#define ADXL372_STATUS_1   0x04u /* Status register 1 */
 
#define ADXL372_STATUS_2   0x05u /* Status register 2 */
 
#define ADXL372_FIFO_ENTRIES_2   0x06u /* Valid data samples in the FIFO */
 
#define ADXL372_FIFO_ENTRIES_1   0x07u /* Valid data samples in the FIFO */
 
#define ADXL372_X_DATA_H   0x08u /* X-axis acceleration data [11:4] */
 
#define ADXL372_X_DATA_L   0x09u /* X-axis acceleration data [3:0] */
 
#define ADXL372_Y_DATA_H   0x0Au /* Y-axis acceleration data [11:4] */
 
#define ADXL372_Y_DATA_L   0x0Bu /* Y-axis acceleration data [3:0] */
 
#define ADXL372_Z_DATA_H   0x0Cu /* Z-axis acceleration data [11:4] */
 
#define ADXL372_Z_DATA_L   0x0Du /* Z-axis acceleration data [3:0] */
 
#define ADXL372_X_MAXPEAK_H   0x15u /* X-axis MaxPeak acceleration data [15:8] */
 
#define ADXL372_X_MAXPEAK_L   0x16u /* X-axis MaxPeak acceleration data [7:0] */
 
#define ADXL372_Y_MAXPEAK_H   0x17u /* Y-axis MaxPeak acceleration data [15:8] */
 
#define ADXL372_Y_MAXPEAK_L   0x18u /* Y-axis MaxPeak acceleration data [7:0] */
 
#define ADXL372_Z_MAXPEAK_H   0x19u /* Z-axis MaxPeak acceleration data [15:8] */
 
#define ADXL372_Z_MAXPEAK_L   0x1Au /* Z-axis MaxPeak acceleration data [7:0] */
 
#define ADXL372_OFFSET_X   0x20u /* X axis offset */
 
#define ADXL372_OFFSET_Y   0x21u /* Y axis offset */
 
#define ADXL372_OFFSET_Z   0x22u /* Z axis offset */
 
#define ADXL372_X_THRESH_ACT_H   0x23u /* X axis Activity Threshold [15:8] */
 
#define ADXL372_X_THRESH_ACT_L   0x24u /* X axis Activity Threshold [7:0] */
 
#define ADXL372_Y_THRESH_ACT_H   0x25u /* Y axis Activity Threshold [15:8] */
 
#define ADXL372_Y_THRESH_ACT_L   0x26u /* Y axis Activity Threshold [7:0] */
 
#define ADXL372_Z_THRESH_ACT_H   0x27u /* Z axis Activity Threshold [15:8] */
 
#define ADXL372_Z_THRESH_ACT_L   0x28u /* Z axis Activity Threshold [7:0] */
 
#define ADXL372_TIME_ACT   0x29u /* Activity Time */
 
#define ADXL372_X_THRESH_INACT_H   0x2Au /* X axis Inactivity Threshold [15:8] */
 
#define ADXL372_X_THRESH_INACT_L   0x2Bu /* X axis Inactivity Threshold [7:0] */
 
#define ADXL372_Y_THRESH_INACT_H   0x2Cu /* Y axis Inactivity Threshold [15:8] */
 
#define ADXL372_Y_THRESH_INACT_L   0x2Du /* Y axis Inactivity Threshold [7:0] */
 
#define ADXL372_Z_THRESH_INACT_H   0x2Eu /* Z axis Inactivity Threshold [15:8] */
 
#define ADXL372_Z_THRESH_INACT_L   0x2Fu /* Z axis Inactivity Threshold [7:0] */
 
#define ADXL372_TIME_INACT_H   0x30u /* Inactivity Time [15:8] */
 
#define ADXL372_TIME_INACT_L   0x31u /* Inactivity Time [7:0] */
 
#define ADXL372_X_THRESH_ACT2_H   0x32u /* X axis Activity2 Threshold [15:8] */
 
#define ADXL372_X_THRESH_ACT2_L   0x33u /* X axis Activity2 Threshold [7:0] */
 
#define ADXL372_Y_THRESH_ACT2_H   0x34u /* Y axis Activity2 Threshold [15:8] */
 
#define ADXL372_Y_THRESH_ACT2_L   0x35u /* Y axis Activity2 Threshold [7:0] */
 
#define ADXL372_Z_THRESH_ACT2_H   0x36u /* Z axis Activity2 Threshold [15:8] */
 
#define ADXL372_Z_THRESH_ACT2_L   0x37u /* Z axis Activity2 Threshold [7:0] */
 
#define ADXL372_HPF   0x38u /* High Pass Filter */
 
#define ADXL372_FIFO_SAMPLES   0x39u /* FIFO Samples */
 
#define ADXL372_FIFO_CTL   0x3Au /* FIFO Control */
 
#define ADXL372_INT1_MAP   0x3Bu /* Interrupt 1 mapping control */
 
#define ADXL372_INT2_MAP   0x3Cu /* Interrupt 2 mapping control */
 
#define ADXL372_TIMING   0x3Du /* Timing */
 
#define ADXL372_MEASURE   0x3Eu /* Measure */
 
#define ADXL372_POWER_CTL   0x3Fu /* Power control */
 
#define ADXL372_SELF_TEST   0x40u /* Self Test */
 
#define ADXL372_RESET   0x41u /* Reset */
 
#define ADXL372_FIFO_DATA   0x42u /* FIFO Data */
 
#define ADXL372_DEVID_VAL   0xADu /* Analog Devices, Inc., accelerometer ID */
 
#define ADXL372_MST_DEVID_VAL   0x1Du /* Analog Devices MEMS device ID */
 
#define ADXL372_PARTID_VAL   0xFAu /* Device ID */
 
#define ADXL372_REVID_VAL   0x02u /* product revision ID*/
 
#define ADXL372_RESET_CODE   0x52u /* Writing code 0x52 resets the device */
 
#define ADXL372_REG_READ(x)   (((x & 0xFF) << 1) | 0x01)
 
#define ADXL372_REG_WRITE(x)   ((x & 0xFF) << 1)
 
#define ADXL372_POWER_CTL_INSTANT_ON_TH_MSK   NO_OS_BIT(5)
 
#define ADXL372_POWER_CTL_INSTANT_ON_TH_MODE(x)   (((x) & 0x1) << 5)
 
#define ADXL372_POWER_CTL_FIL_SETTLE_MSK   NO_OS_BIT(4)
 
#define ADXL372_POWER_CTL_FIL_SETTLE_MODE(x)   (((x) & 0x1) << 4)
 
#define ADXL372_POWER_CTL_LPF_DIS_MSK   NO_OS_BIT(3)
 
#define ADXL372_POWER_CTL_LPF_DIS_MODE(x)   (((x) & 0x1) << 3)
 
#define ADXL372_POWER_CTL_HPF_DIS_MSK   NO_OS_BIT(2)
 
#define ADXL372_POWER_CTL_HPF_DIS_MODE(x)   (((x) & 0x1) << 2)
 
#define ADXL372_POWER_CTL_MODE_MSK   NO_OS_GENMASK(1, 0)
 
#define ADXL372_POWER_CTL_MODE(x)   (((x) & 0x3) << 0)
 
#define ADXL372_MEASURE_AUTOSLEEP_MSK   NO_OS_BIT(6)
 
#define ADXL372_MEASURE_AUTOSLEEP_MODE(x)   (((x) & 0x1) << 6)
 
#define ADXL372_MEASURE_LINKLOOP_MSK   NO_OS_GENMASK(5, 4)
 
#define ADXL372_MEASURE_LINKLOOP_MODE(x)   (((x) & 0x3) << 4)
 
#define ADXL372_MEASURE_LOW_NOISE_MSK   NO_OS_BIT(3)
 
#define ADXL372_MEASURE_LOW_NOISE_MODE(x)   (((x) & 0x1) << 3)
 
#define ADXL372_MEASURE_BANDWIDTH_MSK   NO_OS_GENMASK(2, 0)
 
#define ADXL372_MEASURE_BANDWIDTH_MODE(x)   (((x) & 0x7) << 0)
 
#define ADXL372_TIMING_ODR_MSK   NO_OS_GENMASK(7, 5)
 
#define ADXL372_TIMING_ODR_MODE(x)   (((x) & 0x7) << 5)
 
#define ADXL372_TIMING_WAKE_UP_RATE_MSK   NO_OS_GENMASK(4, 2)
 
#define ADXL372_TIMING_WAKE_UP_RATE_MODE(x)   (((x) & 0x7) << 2)
 
#define ADXL372_TIMING_EXT_CLK_MSK   NO_OS_BIT(1)
 
#define ADXL372_TIMING_EXT_CLK_MODE(x)   (((x) & 0x1) << 1)
 
#define ADXL372_TIMING_EXT_SYNC_MSK   NO_OS_BIT(0)
 
#define ADXL372_TIMING_EXT_SYNC_MODE(x)   (((x) & 0x1) << 0)
 
#define ADXL372_FIFO_CTL_FORMAT_MSK   NO_OS_GENMASK(5, 3)
 
#define ADXL372_FIFO_CTL_FORMAT_MODE(x)   (((x) & 0x7) << 3)
 
#define ADXL372_FIFO_CTL_MODE_MSK   NO_OS_GENMASK(2, 1)
 
#define ADXL372_FIFO_CTL_MODE_MODE(x)   (((x) & 0x3) << 1)
 
#define ADXL372_FIFO_CTL_SAMPLES_MSK   NO_OS_BIT(0)
 
#define ADXL372_FIFO_CTL_SAMPLES_MODE(x)   (((x) > 0xFF) ? 1 : 0)
 
#define ADXL372_STATUS_1_DATA_RDY(x)   (((x) >> 0) & 0x1)
 
#define ADXL372_STATUS_1_FIFO_RDY(x)   (((x) >> 1) & 0x1)
 
#define ADXL372_STATUS_1_FIFO_FULL(x)   (((x) >> 2) & 0x1)
 
#define ADXL372_STATUS_1_FIFO_OVR(x)   (((x) >> 3) & 0x1)
 
#define ADXL372_STATUS_1_USR_NVM_BUSY(x)   (((x) >> 5) & 0x1)
 
#define ADXL372_STATUS_1_AWAKE(x)   (((x) >> 6) & 0x1)
 
#define ADXL372_STATUS_1_ERR_USR_REGS(x)   (((x) >> 7) & 0x1)
 
#define ADXL372_INT1_MAP_DATA_RDY_MSK   NO_OS_BIT(0)
 
#define ADXL372_INT1_MAP_DATA_RDY_MODE(x)   (((x) & 0x1) << 0)
 
#define ADXL372_INT1_MAP_FIFO_RDY_MSK   NO_OS_BIT(1)
 
#define ADXL372_INT1_MAP_FIFO_RDY_MODE(x)   (((x) & 0x1) << 1)
 
#define ADXL372_INT1_MAP_FIFO_FULL_MSK   NO_OS_BIT(2)
 
#define ADXL372_INT1_MAP_FIFO_FULL_MODE(x)   (((x) & 0x1) << 2)
 
#define ADXL372_INT1_MAP_FIFO_OVR_MSK   NO_OS_BIT(3)
 
#define ADXL372_INT1_MAP_FIFO_OVR_MODE(x)   (((x) & 0x1) << 3)
 
#define ADXL372_INT1_MAP_INACT_MSK   NO_OS_BIT(4)
 
#define ADXL372_INT1_MAP_INACT_MODE(x)   (((x) & 0x1) << 4)
 
#define ADXL372_INT1_MAP_ACT_MSK   NO_OS_BIT(5)
 
#define ADXL372_INT1_MAP_ACT_MODE(x)   (((x) & 0x1) << 5)
 
#define ADXL372_INT1_MAP_AWAKE_MSK   NO_OS_BIT(6)
 
#define ADXL372_INT1_MAP_AWAKE_MODE(x)   (((x) & 0x1) << 6)
 
#define ADXL372_INT1_MAP_LOW_MSK   NO_OS_BIT(7)
 
#define ADXL372_INT1_MAP_LOW_MODE(x)   (((x) & 0x1) << 7)
 
#define ADXL372_INT2_MAP_DATA_RDY_MSK   NO_OS_BIT(0)
 
#define ADXL372_INT2_MAP_DATA_RDY_MODE(x)   (((x) & 0x1) << 0)
 
#define ADXL372_INT2_MAP_FIFO_RDY_MSK   NO_OS_BIT(1)
 
#define ADXL372_INT2_MAP_FIFO_RDY_MODE(x)   (((x) & 0x1) << 1)
 
#define ADXL372_INT2_MAP_FIFO_FULL_MSK   NO_OS_BIT(2)
 
#define ADXL372_INT2_MAP_FIFO_FULL_MODE(x)   (((x) & 0x1) << 2)
 
#define ADXL372_INT2_MAP_FIFO_OVR_MSK   NO_OS_BIT(3)
 
#define ADXL372_INT2_MAP_FIFO_OVR_MODE(x)   (((x) & 0x1) << 3)
 
#define ADXL372_INT2_MAP_INACT_MSK   NO_OS_BIT(4)
 
#define ADXL372_INT2_MAP_INACT_MODE(x)   (((x) & 0x1) << 4)
 
#define ADXL372_INT2_MAP_ACT_MSK   NO_OS_BIT(5)
 
#define ADXL372_INT2_MAP_ACT_MODE(x)   (((x) & 0x1) << 5)
 
#define ADXL372_INT2_MAP_AWAKE_MSK   NO_OS_BIT(6)
 
#define ADXL372_INT2_MAP_AWAKE_MODE(x)   (((x) & 0x1) << 6)
 
#define ADXL372_INT2_MAP_LOW_MSK   NO_OS_BIT(7)
 
#define ADXL372_INT2_MAP_LOW_MODE(x)   (((x) & 0x1) << 7)
 

Typedefs

typedef int32_t(* adxl372_reg_read_func) (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
 
typedef int32_t(* adxl372_reg_write_func) (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t reg_data)
 
typedef int32_t(* adxl372_reg_read_multi_func) (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t *reg_data, uint16_t count)
 

Enumerations

enum  adxl372_axis {
  ADXL372_X_AXIS,
  ADXL372_Y_AXIS,
  ADXL372_Z_AXIS
}
 
enum  adxl372_op_mode {
  ADXL372_STANDBY,
  ADXL372_WAKE_UP,
  ADXL372_INSTANT_ON,
  ADXL372_FULL_BW_MEASUREMENT
}
 
enum  adxl372_bandwidth {
  ADXL372_BW_200HZ,
  ADXL372_BW_400HZ,
  ADXL372_BW_800HZ,
  ADXL372_BW_1600HZ,
  ADXL372_BW_3200HZ
}
 
enum  adxl372_act_proc_mode {
  ADXL372_DEFAULT,
  ADXL372_LINKED,
  ADXL372_LOOPED
}
 
enum  adxl372_odr {
  ADXL372_ODR_400HZ,
  ADXL372_ODR_800HZ,
  ADXL372_ODR_1600HZ,
  ADXL372_ODR_3200HZ,
  ADXL372_ODR_6400HZ
}
 
enum  adxl372_instant_on_th_mode {
  ADXL372_INSTANT_ON_LOW_TH,
  ADXL372_INSTANT_ON_HIGH_TH
}
 
enum  adxl372_wakeup_rate {
  ADXL372_WUR_52ms,
  ADXL372_WUR_104ms,
  ADXL372_WUR_208ms,
  ADXL372_WUR_512ms,
  ADXL372_WUR_2048ms,
  ADXL372_WUR_4096ms,
  ADXL372_WUR_8192ms,
  ADXL372_WUR_24576ms
}
 
enum  adxl372_th_activity {
  ADXL372_ACTIVITY,
  ADXL372_ACTIVITY2,
  ADXL372_INACTIVITY
}
 
enum  adxl372_filter_settle {
  ADXL372_FILTER_SETTLE_370,
  ADXL372_FILTER_SETTLE_16
}
 
enum  adxl372_fifo_format {
  ADXL372_XYZ_FIFO,
  ADXL372_X_FIFO,
  ADXL372_Y_FIFO,
  ADXL372_XY_FIFO,
  ADXL372_Z_FIFO,
  ADXL372_XZ_FIFO,
  ADXL372_YZ_FIFO,
  ADXL372_XYZ_PEAK_FIFO
}
 
enum  adxl372_fifo_mode {
  ADXL372_FIFO_BYPASSED,
  ADXL372_FIFO_STREAMED,
  ADXL372_FIFO_TRIGGERED,
  ADXL372_FIFO_OLD_SAVED
}
 
enum  adxl372_comm_type {
  SPI,
  I2C
}
 

Functions

int32_t adxl372_spi_reg_read (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
 
int32_t adxl372_spi_reg_read_multiple (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t *reg_data, uint16_t count)
 
int32_t adxl372_spi_reg_write (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t reg_data)
 
int32_t adxl372_i2c_reg_read (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t *reg_data)
 
int32_t adxl372_i2c_reg_write (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t reg_data)
 
int32_t adxl372_i2c_reg_read_multiple (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t *reg_data, uint16_t count)
 
int32_t adxl372_write_mask (struct adxl372_dev *dev, uint8_t reg_addr, uint32_t mask, uint8_t data)
 
int32_t adxl372_set_activity_threshold (struct adxl372_dev *dev, enum adxl372_th_activity act, uint16_t thresh, bool referenced, bool enable)
 
int32_t adxl372_set_op_mode (struct adxl372_dev *dev, enum adxl372_op_mode op_mode)
 
int32_t adxl372_set_autosleep (struct adxl372_dev *dev, bool enable)
 
int32_t adxl372_set_bandwidth (struct adxl372_dev *dev, enum adxl372_bandwidth bw)
 
int32_t adxl372_set_act_proc_mode (struct adxl372_dev *dev, enum adxl372_act_proc_mode mode)
 
int32_t adxl372_set_odr (struct adxl372_dev *dev, enum adxl372_odr odr)
 
int32_t adxl372_set_instant_on_th (struct adxl372_dev *dev, enum adxl372_instant_on_th_mode mode)
 
int32_t adxl372_set_wakeup_rate (struct adxl372_dev *dev, enum adxl372_wakeup_rate wur)
 
int32_t adxl372_set_activity_time (struct adxl372_dev *dev, uint8_t time)
 
int32_t adxl372_set_inactivity_time (struct adxl372_dev *dev, uint16_t time)
 
int32_t adxl372_interrupt_config (struct adxl372_dev *dev, struct adxl372_irq_config int1, struct adxl372_irq_config int2)
 
int32_t adxl372_set_filter_settle (struct adxl372_dev *dev, enum adxl372_filter_settle mode)
 
int32_t adxl372_get_status (struct adxl372_dev *dev, uint8_t *status1, uint8_t *status2, uint16_t *fifo_entries)
 
int32_t adxl372_reset (struct adxl372_dev *dev)
 
int32_t adxl372_configure_fifo (struct adxl372_dev *dev, enum adxl372_fifo_mode mode, enum adxl372_fifo_format format, uint16_t fifo_samples)
 
int32_t adxl372_get_fifo_xyz_data (struct adxl372_dev *dev, struct adxl372_xyz_accel_data *fifo_data, uint16_t cnt)
 
int32_t adxl372_service_fifo_ev (struct adxl372_dev *dev, struct adxl372_xyz_accel_data *fifo_data, uint16_t *fifo_entries)
 
int32_t adxl372_get_highest_peak_data (struct adxl372_dev *dev, struct adxl372_xyz_accel_data *max_peak)
 
int32_t adxl372_get_accel_data (struct adxl372_dev *dev, struct adxl372_xyz_accel_data *accel_data)
 
int32_t adxl372_init (struct adxl372_dev **device, struct adxl372_init_param init_param)
 

Detailed Description

Header file for adxl372 Driver.

Author
SPopa (stefa.nosp@m.n.po.nosp@m.pa@an.nosp@m.alog.nosp@m..com)

Copyright 2018(c) Analog Devices, Inc.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ ADXL372_DEVID

#define ADXL372_DEVID   0x00u /* Analog Devices, Inc., accelerometer ID */

◆ ADXL372_DEVID_MST

#define ADXL372_DEVID_MST   0x01u /* Analog Devices MEMS device ID */

◆ ADXL372_DEVID_VAL

#define ADXL372_DEVID_VAL   0xADu /* Analog Devices, Inc., accelerometer ID */

◆ ADXL372_FIFO_CTL

#define ADXL372_FIFO_CTL   0x3Au /* FIFO Control */

◆ ADXL372_FIFO_CTL_FORMAT_MODE

#define ADXL372_FIFO_CTL_FORMAT_MODE (   x)    (((x) & 0x7) << 3)

◆ ADXL372_FIFO_CTL_FORMAT_MSK

#define ADXL372_FIFO_CTL_FORMAT_MSK   NO_OS_GENMASK(5, 3)

◆ ADXL372_FIFO_CTL_MODE_MODE

#define ADXL372_FIFO_CTL_MODE_MODE (   x)    (((x) & 0x3) << 1)

◆ ADXL372_FIFO_CTL_MODE_MSK

#define ADXL372_FIFO_CTL_MODE_MSK   NO_OS_GENMASK(2, 1)

◆ ADXL372_FIFO_CTL_SAMPLES_MODE

#define ADXL372_FIFO_CTL_SAMPLES_MODE (   x)    (((x) > 0xFF) ? 1 : 0)

◆ ADXL372_FIFO_CTL_SAMPLES_MSK

#define ADXL372_FIFO_CTL_SAMPLES_MSK   NO_OS_BIT(0)

◆ ADXL372_FIFO_DATA

#define ADXL372_FIFO_DATA   0x42u /* FIFO Data */

◆ ADXL372_FIFO_ENTRIES_1

#define ADXL372_FIFO_ENTRIES_1   0x07u /* Valid data samples in the FIFO */

◆ ADXL372_FIFO_ENTRIES_2

#define ADXL372_FIFO_ENTRIES_2   0x06u /* Valid data samples in the FIFO */

◆ ADXL372_FIFO_SAMPLES

#define ADXL372_FIFO_SAMPLES   0x39u /* FIFO Samples */

◆ ADXL372_HPF

#define ADXL372_HPF   0x38u /* High Pass Filter */

◆ ADXL372_INT1_MAP

#define ADXL372_INT1_MAP   0x3Bu /* Interrupt 1 mapping control */

◆ ADXL372_INT1_MAP_ACT_MODE

#define ADXL372_INT1_MAP_ACT_MODE (   x)    (((x) & 0x1) << 5)

◆ ADXL372_INT1_MAP_ACT_MSK

#define ADXL372_INT1_MAP_ACT_MSK   NO_OS_BIT(5)

◆ ADXL372_INT1_MAP_AWAKE_MODE

#define ADXL372_INT1_MAP_AWAKE_MODE (   x)    (((x) & 0x1) << 6)

◆ ADXL372_INT1_MAP_AWAKE_MSK

#define ADXL372_INT1_MAP_AWAKE_MSK   NO_OS_BIT(6)

◆ ADXL372_INT1_MAP_DATA_RDY_MODE

#define ADXL372_INT1_MAP_DATA_RDY_MODE (   x)    (((x) & 0x1) << 0)

◆ ADXL372_INT1_MAP_DATA_RDY_MSK

#define ADXL372_INT1_MAP_DATA_RDY_MSK   NO_OS_BIT(0)

◆ ADXL372_INT1_MAP_FIFO_FULL_MODE

#define ADXL372_INT1_MAP_FIFO_FULL_MODE (   x)    (((x) & 0x1) << 2)

◆ ADXL372_INT1_MAP_FIFO_FULL_MSK

#define ADXL372_INT1_MAP_FIFO_FULL_MSK   NO_OS_BIT(2)

◆ ADXL372_INT1_MAP_FIFO_OVR_MODE

#define ADXL372_INT1_MAP_FIFO_OVR_MODE (   x)    (((x) & 0x1) << 3)

◆ ADXL372_INT1_MAP_FIFO_OVR_MSK

#define ADXL372_INT1_MAP_FIFO_OVR_MSK   NO_OS_BIT(3)

◆ ADXL372_INT1_MAP_FIFO_RDY_MODE

#define ADXL372_INT1_MAP_FIFO_RDY_MODE (   x)    (((x) & 0x1) << 1)

◆ ADXL372_INT1_MAP_FIFO_RDY_MSK

#define ADXL372_INT1_MAP_FIFO_RDY_MSK   NO_OS_BIT(1)

◆ ADXL372_INT1_MAP_INACT_MODE

#define ADXL372_INT1_MAP_INACT_MODE (   x)    (((x) & 0x1) << 4)

◆ ADXL372_INT1_MAP_INACT_MSK

#define ADXL372_INT1_MAP_INACT_MSK   NO_OS_BIT(4)

◆ ADXL372_INT1_MAP_LOW_MODE

#define ADXL372_INT1_MAP_LOW_MODE (   x)    (((x) & 0x1) << 7)

◆ ADXL372_INT1_MAP_LOW_MSK

#define ADXL372_INT1_MAP_LOW_MSK   NO_OS_BIT(7)

◆ ADXL372_INT2_MAP

#define ADXL372_INT2_MAP   0x3Cu /* Interrupt 2 mapping control */

◆ ADXL372_INT2_MAP_ACT_MODE

#define ADXL372_INT2_MAP_ACT_MODE (   x)    (((x) & 0x1) << 5)

◆ ADXL372_INT2_MAP_ACT_MSK

#define ADXL372_INT2_MAP_ACT_MSK   NO_OS_BIT(5)

◆ ADXL372_INT2_MAP_AWAKE_MODE

#define ADXL372_INT2_MAP_AWAKE_MODE (   x)    (((x) & 0x1) << 6)

◆ ADXL372_INT2_MAP_AWAKE_MSK

#define ADXL372_INT2_MAP_AWAKE_MSK   NO_OS_BIT(6)

◆ ADXL372_INT2_MAP_DATA_RDY_MODE

#define ADXL372_INT2_MAP_DATA_RDY_MODE (   x)    (((x) & 0x1) << 0)

◆ ADXL372_INT2_MAP_DATA_RDY_MSK

#define ADXL372_INT2_MAP_DATA_RDY_MSK   NO_OS_BIT(0)

◆ ADXL372_INT2_MAP_FIFO_FULL_MODE

#define ADXL372_INT2_MAP_FIFO_FULL_MODE (   x)    (((x) & 0x1) << 2)

◆ ADXL372_INT2_MAP_FIFO_FULL_MSK

#define ADXL372_INT2_MAP_FIFO_FULL_MSK   NO_OS_BIT(2)

◆ ADXL372_INT2_MAP_FIFO_OVR_MODE

#define ADXL372_INT2_MAP_FIFO_OVR_MODE (   x)    (((x) & 0x1) << 3)

◆ ADXL372_INT2_MAP_FIFO_OVR_MSK

#define ADXL372_INT2_MAP_FIFO_OVR_MSK   NO_OS_BIT(3)

◆ ADXL372_INT2_MAP_FIFO_RDY_MODE

#define ADXL372_INT2_MAP_FIFO_RDY_MODE (   x)    (((x) & 0x1) << 1)

◆ ADXL372_INT2_MAP_FIFO_RDY_MSK

#define ADXL372_INT2_MAP_FIFO_RDY_MSK   NO_OS_BIT(1)

◆ ADXL372_INT2_MAP_INACT_MODE

#define ADXL372_INT2_MAP_INACT_MODE (   x)    (((x) & 0x1) << 4)

◆ ADXL372_INT2_MAP_INACT_MSK

#define ADXL372_INT2_MAP_INACT_MSK   NO_OS_BIT(4)

◆ ADXL372_INT2_MAP_LOW_MODE

#define ADXL372_INT2_MAP_LOW_MODE (   x)    (((x) & 0x1) << 7)

◆ ADXL372_INT2_MAP_LOW_MSK

#define ADXL372_INT2_MAP_LOW_MSK   NO_OS_BIT(7)

◆ ADXL372_MEASURE

#define ADXL372_MEASURE   0x3Eu /* Measure */

◆ ADXL372_MEASURE_AUTOSLEEP_MODE

#define ADXL372_MEASURE_AUTOSLEEP_MODE (   x)    (((x) & 0x1) << 6)

◆ ADXL372_MEASURE_AUTOSLEEP_MSK

#define ADXL372_MEASURE_AUTOSLEEP_MSK   NO_OS_BIT(6)

◆ ADXL372_MEASURE_BANDWIDTH_MODE

#define ADXL372_MEASURE_BANDWIDTH_MODE (   x)    (((x) & 0x7) << 0)

◆ ADXL372_MEASURE_BANDWIDTH_MSK

#define ADXL372_MEASURE_BANDWIDTH_MSK   NO_OS_GENMASK(2, 0)

◆ ADXL372_MEASURE_LINKLOOP_MODE

#define ADXL372_MEASURE_LINKLOOP_MODE (   x)    (((x) & 0x3) << 4)

◆ ADXL372_MEASURE_LINKLOOP_MSK

#define ADXL372_MEASURE_LINKLOOP_MSK   NO_OS_GENMASK(5, 4)

◆ ADXL372_MEASURE_LOW_NOISE_MODE

#define ADXL372_MEASURE_LOW_NOISE_MODE (   x)    (((x) & 0x1) << 3)

◆ ADXL372_MEASURE_LOW_NOISE_MSK

#define ADXL372_MEASURE_LOW_NOISE_MSK   NO_OS_BIT(3)

◆ ADXL372_MST_DEVID_VAL

#define ADXL372_MST_DEVID_VAL   0x1Du /* Analog Devices MEMS device ID */

◆ ADXL372_OFFSET_X

#define ADXL372_OFFSET_X   0x20u /* X axis offset */

◆ ADXL372_OFFSET_Y

#define ADXL372_OFFSET_Y   0x21u /* Y axis offset */

◆ ADXL372_OFFSET_Z

#define ADXL372_OFFSET_Z   0x22u /* Z axis offset */

◆ ADXL372_PARTID

#define ADXL372_PARTID   0x02u /* Device ID */

◆ ADXL372_PARTID_VAL

#define ADXL372_PARTID_VAL   0xFAu /* Device ID */

◆ ADXL372_POWER_CTL

#define ADXL372_POWER_CTL   0x3Fu /* Power control */

◆ ADXL372_POWER_CTL_FIL_SETTLE_MODE

#define ADXL372_POWER_CTL_FIL_SETTLE_MODE (   x)    (((x) & 0x1) << 4)

◆ ADXL372_POWER_CTL_FIL_SETTLE_MSK

#define ADXL372_POWER_CTL_FIL_SETTLE_MSK   NO_OS_BIT(4)

◆ ADXL372_POWER_CTL_HPF_DIS_MODE

#define ADXL372_POWER_CTL_HPF_DIS_MODE (   x)    (((x) & 0x1) << 2)

◆ ADXL372_POWER_CTL_HPF_DIS_MSK

#define ADXL372_POWER_CTL_HPF_DIS_MSK   NO_OS_BIT(2)

◆ ADXL372_POWER_CTL_INSTANT_ON_TH_MODE

#define ADXL372_POWER_CTL_INSTANT_ON_TH_MODE (   x)    (((x) & 0x1) << 5)

◆ ADXL372_POWER_CTL_INSTANT_ON_TH_MSK

#define ADXL372_POWER_CTL_INSTANT_ON_TH_MSK   NO_OS_BIT(5)

◆ ADXL372_POWER_CTL_LPF_DIS_MODE

#define ADXL372_POWER_CTL_LPF_DIS_MODE (   x)    (((x) & 0x1) << 3)

◆ ADXL372_POWER_CTL_LPF_DIS_MSK

#define ADXL372_POWER_CTL_LPF_DIS_MSK   NO_OS_BIT(3)

◆ ADXL372_POWER_CTL_MODE

#define ADXL372_POWER_CTL_MODE (   x)    (((x) & 0x3) << 0)

◆ ADXL372_POWER_CTL_MODE_MSK

#define ADXL372_POWER_CTL_MODE_MSK   NO_OS_GENMASK(1, 0)

◆ ADXL372_REG_READ

#define ADXL372_REG_READ (   x)    (((x & 0xFF) << 1) | 0x01)

◆ ADXL372_REG_WRITE

#define ADXL372_REG_WRITE (   x)    ((x & 0xFF) << 1)

◆ ADXL372_RESET

#define ADXL372_RESET   0x41u /* Reset */

◆ ADXL372_RESET_CODE

#define ADXL372_RESET_CODE   0x52u /* Writing code 0x52 resets the device */

◆ ADXL372_REVID

#define ADXL372_REVID   0x03u /* product revision ID*/

◆ ADXL372_REVID_VAL

#define ADXL372_REVID_VAL   0x02u /* product revision ID*/

◆ ADXL372_SELF_TEST

#define ADXL372_SELF_TEST   0x40u /* Self Test */

◆ ADXL372_STATUS_1

#define ADXL372_STATUS_1   0x04u /* Status register 1 */

◆ ADXL372_STATUS_1_AWAKE

#define ADXL372_STATUS_1_AWAKE (   x)    (((x) >> 6) & 0x1)

◆ ADXL372_STATUS_1_DATA_RDY

#define ADXL372_STATUS_1_DATA_RDY (   x)    (((x) >> 0) & 0x1)

◆ ADXL372_STATUS_1_ERR_USR_REGS

#define ADXL372_STATUS_1_ERR_USR_REGS (   x)    (((x) >> 7) & 0x1)

◆ ADXL372_STATUS_1_FIFO_FULL

#define ADXL372_STATUS_1_FIFO_FULL (   x)    (((x) >> 2) & 0x1)

◆ ADXL372_STATUS_1_FIFO_OVR

#define ADXL372_STATUS_1_FIFO_OVR (   x)    (((x) >> 3) & 0x1)

◆ ADXL372_STATUS_1_FIFO_RDY

#define ADXL372_STATUS_1_FIFO_RDY (   x)    (((x) >> 1) & 0x1)

◆ ADXL372_STATUS_1_USR_NVM_BUSY

#define ADXL372_STATUS_1_USR_NVM_BUSY (   x)    (((x) >> 5) & 0x1)

◆ ADXL372_STATUS_2

#define ADXL372_STATUS_2   0x05u /* Status register 2 */

◆ ADXL372_TIME_ACT

#define ADXL372_TIME_ACT   0x29u /* Activity Time */

◆ ADXL372_TIME_INACT_H

#define ADXL372_TIME_INACT_H   0x30u /* Inactivity Time [15:8] */

◆ ADXL372_TIME_INACT_L

#define ADXL372_TIME_INACT_L   0x31u /* Inactivity Time [7:0] */

◆ ADXL372_TIMING

#define ADXL372_TIMING   0x3Du /* Timing */

◆ ADXL372_TIMING_EXT_CLK_MODE

#define ADXL372_TIMING_EXT_CLK_MODE (   x)    (((x) & 0x1) << 1)

◆ ADXL372_TIMING_EXT_CLK_MSK

#define ADXL372_TIMING_EXT_CLK_MSK   NO_OS_BIT(1)

◆ ADXL372_TIMING_EXT_SYNC_MODE

#define ADXL372_TIMING_EXT_SYNC_MODE (   x)    (((x) & 0x1) << 0)

◆ ADXL372_TIMING_EXT_SYNC_MSK

#define ADXL372_TIMING_EXT_SYNC_MSK   NO_OS_BIT(0)

◆ ADXL372_TIMING_ODR_MODE

#define ADXL372_TIMING_ODR_MODE (   x)    (((x) & 0x7) << 5)

◆ ADXL372_TIMING_ODR_MSK

#define ADXL372_TIMING_ODR_MSK   NO_OS_GENMASK(7, 5)

◆ ADXL372_TIMING_WAKE_UP_RATE_MODE

#define ADXL372_TIMING_WAKE_UP_RATE_MODE (   x)    (((x) & 0x7) << 2)

◆ ADXL372_TIMING_WAKE_UP_RATE_MSK

#define ADXL372_TIMING_WAKE_UP_RATE_MSK   NO_OS_GENMASK(4, 2)

◆ ADXL372_X_DATA_H

#define ADXL372_X_DATA_H   0x08u /* X-axis acceleration data [11:4] */

◆ ADXL372_X_DATA_L

#define ADXL372_X_DATA_L   0x09u /* X-axis acceleration data [3:0] */

◆ ADXL372_X_MAXPEAK_H

#define ADXL372_X_MAXPEAK_H   0x15u /* X-axis MaxPeak acceleration data [15:8] */

◆ ADXL372_X_MAXPEAK_L

#define ADXL372_X_MAXPEAK_L   0x16u /* X-axis MaxPeak acceleration data [7:0] */

◆ ADXL372_X_THRESH_ACT2_H

#define ADXL372_X_THRESH_ACT2_H   0x32u /* X axis Activity2 Threshold [15:8] */

◆ ADXL372_X_THRESH_ACT2_L

#define ADXL372_X_THRESH_ACT2_L   0x33u /* X axis Activity2 Threshold [7:0] */

◆ ADXL372_X_THRESH_ACT_H

#define ADXL372_X_THRESH_ACT_H   0x23u /* X axis Activity Threshold [15:8] */

◆ ADXL372_X_THRESH_ACT_L

#define ADXL372_X_THRESH_ACT_L   0x24u /* X axis Activity Threshold [7:0] */

◆ ADXL372_X_THRESH_INACT_H

#define ADXL372_X_THRESH_INACT_H   0x2Au /* X axis Inactivity Threshold [15:8] */

◆ ADXL372_X_THRESH_INACT_L

#define ADXL372_X_THRESH_INACT_L   0x2Bu /* X axis Inactivity Threshold [7:0] */

◆ ADXL372_Y_DATA_H

#define ADXL372_Y_DATA_H   0x0Au /* Y-axis acceleration data [11:4] */

◆ ADXL372_Y_DATA_L

#define ADXL372_Y_DATA_L   0x0Bu /* Y-axis acceleration data [3:0] */

◆ ADXL372_Y_MAXPEAK_H

#define ADXL372_Y_MAXPEAK_H   0x17u /* Y-axis MaxPeak acceleration data [15:8] */

◆ ADXL372_Y_MAXPEAK_L

#define ADXL372_Y_MAXPEAK_L   0x18u /* Y-axis MaxPeak acceleration data [7:0] */

◆ ADXL372_Y_THRESH_ACT2_H

#define ADXL372_Y_THRESH_ACT2_H   0x34u /* Y axis Activity2 Threshold [15:8] */

◆ ADXL372_Y_THRESH_ACT2_L

#define ADXL372_Y_THRESH_ACT2_L   0x35u /* Y axis Activity2 Threshold [7:0] */

◆ ADXL372_Y_THRESH_ACT_H

#define ADXL372_Y_THRESH_ACT_H   0x25u /* Y axis Activity Threshold [15:8] */

◆ ADXL372_Y_THRESH_ACT_L

#define ADXL372_Y_THRESH_ACT_L   0x26u /* Y axis Activity Threshold [7:0] */

◆ ADXL372_Y_THRESH_INACT_H

#define ADXL372_Y_THRESH_INACT_H   0x2Cu /* Y axis Inactivity Threshold [15:8] */

◆ ADXL372_Y_THRESH_INACT_L

#define ADXL372_Y_THRESH_INACT_L   0x2Du /* Y axis Inactivity Threshold [7:0] */

◆ ADXL372_Z_DATA_H

#define ADXL372_Z_DATA_H   0x0Cu /* Z-axis acceleration data [11:4] */

◆ ADXL372_Z_DATA_L

#define ADXL372_Z_DATA_L   0x0Du /* Z-axis acceleration data [3:0] */

◆ ADXL372_Z_MAXPEAK_H

#define ADXL372_Z_MAXPEAK_H   0x19u /* Z-axis MaxPeak acceleration data [15:8] */

◆ ADXL372_Z_MAXPEAK_L

#define ADXL372_Z_MAXPEAK_L   0x1Au /* Z-axis MaxPeak acceleration data [7:0] */

◆ ADXL372_Z_THRESH_ACT2_H

#define ADXL372_Z_THRESH_ACT2_H   0x36u /* Z axis Activity2 Threshold [15:8] */

◆ ADXL372_Z_THRESH_ACT2_L

#define ADXL372_Z_THRESH_ACT2_L   0x37u /* Z axis Activity2 Threshold [7:0] */

◆ ADXL372_Z_THRESH_ACT_H

#define ADXL372_Z_THRESH_ACT_H   0x27u /* Z axis Activity Threshold [15:8] */

◆ ADXL372_Z_THRESH_ACT_L

#define ADXL372_Z_THRESH_ACT_L   0x28u /* Z axis Activity Threshold [7:0] */

◆ ADXL372_Z_THRESH_INACT_H

#define ADXL372_Z_THRESH_INACT_H   0x2Eu /* Z axis Inactivity Threshold [15:8] */

◆ ADXL372_Z_THRESH_INACT_L

#define ADXL372_Z_THRESH_INACT_L   0x2Fu /* Z axis Inactivity Threshold [7:0] */

Typedef Documentation

◆ adxl372_reg_read_func

typedef int32_t(* adxl372_reg_read_func) (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t *reg_data)

◆ adxl372_reg_read_multi_func

typedef int32_t(* adxl372_reg_read_multi_func) (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t *reg_data, uint16_t count)

◆ adxl372_reg_write_func

typedef int32_t(* adxl372_reg_write_func) (struct adxl372_dev *dev, uint8_t reg_addr, uint8_t reg_data)

Enumeration Type Documentation

◆ adxl372_act_proc_mode

enum adxl372_act_proc_mode
Enumerator
ADXL372_DEFAULT 
ADXL372_LINKED 
ADXL372_LOOPED 

◆ adxl372_axis

enum adxl372_axis
Enumerator
ADXL372_X_AXIS 
ADXL372_Y_AXIS 
ADXL372_Z_AXIS 

◆ adxl372_bandwidth

enum adxl372_bandwidth
Enumerator
ADXL372_BW_200HZ 
ADXL372_BW_400HZ 
ADXL372_BW_800HZ 
ADXL372_BW_1600HZ 
ADXL372_BW_3200HZ 

◆ adxl372_comm_type

enum adxl372_comm_type
Enumerator
SPI 
I2C 

◆ adxl372_fifo_format

enum adxl372_fifo_format
Enumerator
ADXL372_XYZ_FIFO 
ADXL372_X_FIFO 
ADXL372_Y_FIFO 
ADXL372_XY_FIFO 
ADXL372_Z_FIFO 
ADXL372_XZ_FIFO 
ADXL372_YZ_FIFO 
ADXL372_XYZ_PEAK_FIFO 

◆ adxl372_fifo_mode

enum adxl372_fifo_mode
Enumerator
ADXL372_FIFO_BYPASSED 
ADXL372_FIFO_STREAMED 
ADXL372_FIFO_TRIGGERED 
ADXL372_FIFO_OLD_SAVED 

◆ adxl372_filter_settle

enum adxl372_filter_settle
Enumerator
ADXL372_FILTER_SETTLE_370 
ADXL372_FILTER_SETTLE_16 

◆ adxl372_instant_on_th_mode

enum adxl372_instant_on_th_mode
Enumerator
ADXL372_INSTANT_ON_LOW_TH 
ADXL372_INSTANT_ON_HIGH_TH 

◆ adxl372_odr

enum adxl372_odr
Enumerator
ADXL372_ODR_400HZ 
ADXL372_ODR_800HZ 
ADXL372_ODR_1600HZ 
ADXL372_ODR_3200HZ 
ADXL372_ODR_6400HZ 

◆ adxl372_op_mode

enum adxl372_op_mode
Enumerator
ADXL372_STANDBY 
ADXL372_WAKE_UP 
ADXL372_INSTANT_ON 
ADXL372_FULL_BW_MEASUREMENT 

◆ adxl372_th_activity

enum adxl372_th_activity
Enumerator
ADXL372_ACTIVITY 
ADXL372_ACTIVITY2 
ADXL372_INACTIVITY 

◆ adxl372_wakeup_rate

enum adxl372_wakeup_rate
Enumerator
ADXL372_WUR_52ms 
ADXL372_WUR_104ms 
ADXL372_WUR_208ms 
ADXL372_WUR_512ms 
ADXL372_WUR_2048ms 
ADXL372_WUR_4096ms 
ADXL372_WUR_8192ms 
ADXL372_WUR_24576ms 

Function Documentation

◆ adxl372_configure_fifo()

int32_t adxl372_configure_fifo ( struct adxl372_dev *  dev,
enum adxl372_fifo_mode  mode,
enum adxl372_fifo_format  format,
uint16_t  fifo_samples 
)

Configure the operating parameters for the FIFO.

Parameters
dev- The device structure.
mode- FIFO Mode. Specifies FIFO operating mode. Accepted values: ADXL372_FIFO_BYPASSED ADXL372_FIFO_STREAMED ADXL372_FIFO_TRIGGERED ADXL372_FIFO_OLD_SAVED
format- FIFO Format. Specifies which data is stored in the FIFO buffer. Accepted values: ADXL372_XYZ_FIFO ADXL372_X_FIFO ADXL372_Y_FIFO ADXL372_XY_FIFO ADXL372_Z_FIFO ADXL372_XZ_FIFO ADXL372_YZ_FIFO ADXL372_XYZ_PEAK_FIFO
fifo_samples- FIFO Samples. Watermark number of FIFO samples that triggers a FIFO_FULL condition when reached. Values range from 0 to 512.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_get_accel_data()

int32_t adxl372_get_accel_data ( struct adxl372_dev *  dev,
struct adxl372_xyz_accel_data *  accel_data 
)

Retrieve 3-axis acceleration data

Parameters
dev- The device structure.
accel_data- pointer to a variable of type adxl372_xyz_accel_data where (x, y, z) acceleration data will be stored.
Returns
0 in case of success, negative error code otherwise.

◆ adxl372_get_fifo_xyz_data()

int32_t adxl372_get_fifo_xyz_data ( struct adxl372_dev *  dev,
struct adxl372_xyz_accel_data *  samples,
uint16_t  cnt 
)

Get the data stored in FIFO.

Parameters
dev- The device structure.
samples- pointer to the raw data stored in the ADXL372_FIFO_DATA
cnt- How many samples should be retrieved from the FIFO DATA reg
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_get_highest_peak_data()

int32_t adxl372_get_highest_peak_data ( struct adxl372_dev *  dev,
struct adxl372_xyz_accel_data *  max_peak 
)

Retrieve the highest magnitude (x, y, z) sample recorded since the last read of the MAXPEAK registers

Parameters
dev- The device structure.
max_peak- pointer to a variable of type adxl372_xyz_accel_data where (x, y, z) max values will be stored.
Returns
0 in case of success, negative error code otherwise.

◆ adxl372_get_status()

int32_t adxl372_get_status ( struct adxl372_dev *  dev,
uint8_t *  status1,
uint8_t *  status2,
uint16_t *  fifo_entries 
)

Get the STATUS, STATUS2, FIFO_ENTRIES and FIFO_ENTRIES2 registers data

Parameters
dev- The device structure.
status1- Data stored in the STATUS1 register
status2- Data stored in the STATUS2 register
fifo_entries- Number of valid data samples present in the FIFO buffer (0 to 512)
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_i2c_reg_read()

int32_t adxl372_i2c_reg_read ( struct adxl372_dev *  dev,
uint8_t  reg_addr,
uint8_t *  reg_data 
)

Read from device.

Parameters
dev- The device structure.
reg_addr- The register address.
reg_data- The register data.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_i2c_reg_read_multiple()

int32_t adxl372_i2c_reg_read_multiple ( struct adxl372_dev *  dev,
uint8_t  reg_addr,
uint8_t *  reg_data,
uint16_t  count 
)

Multibyte read from device. A register read begins with the address and autoincrements for each aditional byte in the transfer.

Parameters
dev- The device structure.
reg_addr- The register address.
reg_data- The register data.
count- Number of bytes to read.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_i2c_reg_write()

int32_t adxl372_i2c_reg_write ( struct adxl372_dev *  dev,
uint8_t  reg_addr,
uint8_t  reg_data 
)

Write to device.

Parameters
dev- The device structure.
reg_addr- The register address.
reg_data- The register data.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_init()

int32_t adxl372_init ( struct adxl372_dev **  device,
struct adxl372_init_param  init_param 
)

Initialize the device.

Parameters
device- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.

◆ adxl372_interrupt_config()

int32_t adxl372_interrupt_config ( struct adxl372_dev *  dev,
struct adxl372_irq_config  int1,
struct adxl372_irq_config  int2 
)

Configure the INT1 and INT2 interrupt pins.

Parameters
dev- The device structure.
int1- INT1 interrupt pins.
int2- INT2 interrupt pins.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_reset()

int32_t adxl372_reset ( struct adxl372_dev *  dev)

Software reset.

Parameters
dev- The device structure.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_service_fifo_ev()

int32_t adxl372_service_fifo_ev ( struct adxl372_dev *  dev,
struct adxl372_xyz_accel_data *  fifo_data,
uint16_t *  fifo_entries 
)

Retrieve data stored in FIFO. Can be used in polling mode, but works best when interrupts are used

Parameters
dev- The device structure.
fifo_data- pointer to an array of type adxl372_xyz_accel_data where (x, y, z) values will be stored. Array max size should be 170, as the FIFO can hold up to 512 samples.
fifo_entries- pointer which will store the number of valid data samples present in the FIFO buffer
Returns
0 in case of success, negative error code otherwise.

◆ adxl372_set_act_proc_mode()

int32_t adxl372_set_act_proc_mode ( struct adxl372_dev *  dev,
enum adxl372_act_proc_mode  mode 
)

Link/Loop Activity Processing.

Parameters
dev- The device structure.
mode- Mode of operation. Accepted values: ADXL372_DEFAULT ADXL372_LINKED ADXL372_LOOPED
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_set_activity_threshold()

int32_t adxl372_set_activity_threshold ( struct adxl372_dev *  dev,
enum adxl372_th_activity  act,
uint16_t  thresh,
bool  referenced,
bool  enable 
)

Set the threshold for activity detection for all 3-axis

Parameters
dev- The device structure.
act- Type of activity. Accepted values: ADXL372_ACTIVITY ADXL372_ACTIVITY2 ADXL372_INACTIVITY
thresh- 11-bit unsigned value sets the threshold for activity, activity2 or inactivity detection.
referenced- Selects referenced or absolute activity processing.
enable- Enable activity detection using all 3-axis data.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_set_activity_time()

int32_t adxl372_set_activity_time ( struct adxl372_dev *  dev,
uint8_t  time 
)

Set the activity timer

Parameters
dev- The device structure.
time- The value set in this register.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_set_autosleep()

int32_t adxl372_set_autosleep ( struct adxl372_dev *  dev,
bool  enable 
)

Autosleep. When set to 1, autosleep is enabled, and the device enters wake-up mode automatically upon detection of inactivity.

Parameters
dev- The device structure.
enable- Accepted values: true false
Returns
0 in case of success, negative error code otherwise.

◆ adxl372_set_bandwidth()

int32_t adxl372_set_bandwidth ( struct adxl372_dev *  dev,
enum adxl372_bandwidth  bw 
)

Select the desired output signal bandwidth.

Parameters
dev- The device structure.
bw- bandwidth. Accepted values: ADXL372_BW_200HZ ADXL372_BW_400HZ ADXL372_BW_800HZ ADXL372_BW_1600HZ ADXL372_BW_3200HZ
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_set_filter_settle()

int32_t adxl372_set_filter_settle ( struct adxl372_dev *  dev,
enum adxl372_filter_settle  mode 
)

Set the filter settling period.

Parameters
dev- The device structure.
mode- settle period Accepted values: ADXL372_FILTER_SETTLE_370 ADXL372_FILTER_SETTLE_16
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_set_inactivity_time()

int32_t adxl372_set_inactivity_time ( struct adxl372_dev *  dev,
uint16_t  time 
)

Set the inactivity timer

Parameters
dev- The device structure.
time- is the 16-bit value set by the TIME_INACT_L register (eight LSBs) and the TIME_INACT_H register (eight MSBs).
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_set_instant_on_th()

int32_t adxl372_set_instant_on_th ( struct adxl372_dev *  dev,
enum adxl372_instant_on_th_mode  mode 
)

Select instant on threshold

Parameters
dev- The device structure.
mode- 0 = low threshold, 1 = high threshold. Accepted values: ADXL372_INSTANT_ON_LOW_TH ADXL372_INSTANT_ON_HIGH_TH
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_set_odr()

int32_t adxl372_set_odr ( struct adxl372_dev *  dev,
enum adxl372_odr  odr 
)

Set Output data rate.

Parameters
dev- The device structure.
odr- Output data rate. Accepted values: ADXL372_ODR_400HZ ADXL372_ODR_800HZ ADXL372_ODR_1600HZ ADXL372_ODR_3200HZ ADXL372_ODR_6400HZ
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_set_op_mode()

int32_t adxl372_set_op_mode ( struct adxl372_dev *  dev,
enum adxl372_op_mode  op_mode 
)

Set the mode of operation.

Parameters
dev- The device structure.
op_mode- Mode of operation. Accepted values: ADXL372_STANDBY ADXL372_WAKE_UP ADXL372_INSTANT_ON ADXL372_FULL_BW_MEASUREMENT
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_set_wakeup_rate()

int32_t adxl372_set_wakeup_rate ( struct adxl372_dev *  dev,
enum adxl372_wakeup_rate  wur 
)

Set the Timer Rate for Wake-Up Mode.

Parameters
dev- The device structure.
wur- wake up mode rate Accepted values: ADXL372_WUR_52ms ADXL372_WUR_104ms ADXL372_WUR_208ms ADXL372_WUR_512ms ADXL372_WUR_2048ms ADXL372_WUR_4096ms ADXL372_WUR_8192ms ADXL372_WUR_24576ms
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_spi_reg_read()

int32_t adxl372_spi_reg_read ( struct adxl372_dev *  dev,
uint8_t  reg_addr,
uint8_t *  reg_data 
)

Read from device.

Parameters
dev- The device structure.
reg_addr- The register address.
reg_data- The register data.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_spi_reg_read_multiple()

int32_t adxl372_spi_reg_read_multiple ( struct adxl372_dev *  dev,
uint8_t  reg_addr,
uint8_t *  reg_data,
uint16_t  count 
)

Multibyte read from device. A register read begins with the address and autoincrements for each aditional byte in the transfer.

Parameters
dev- The device structure.
reg_addr- The register address.
reg_data- The register data.
count- Number of bytes to read.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_spi_reg_write()

int32_t adxl372_spi_reg_write ( struct adxl372_dev *  dev,
uint8_t  reg_addr,
uint8_t  reg_data 
)

Write to device.

Parameters
dev- The device structure.
reg_addr- The register address.
reg_data- The register data.
Returns
0 in case of success, negative error code otherwise.
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◆ adxl372_write_mask()

int32_t adxl372_write_mask ( struct adxl372_dev *  dev,
uint8_t  reg_addr,
uint32_t  mask,
uint8_t  data 
)

Write to device using a mask.

Parameters
dev- The device structure.
reg_addr- The register address.
mask- The mask.
data- The register data.
Returns
0 in case of success, negative error code otherwise.
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