axi_dmac.h File Reference

Driver for the Analog Devices AXI-DMAC core. More...

#include <stdint.h>
#include "no_os_util.h"

Include dependency graph for axi_dmac.h:

Classes
struct	axi_dma_transfer
struct	axi_dmac
struct	axi_dmac_init

Macros
#define	AXI_DMAC_REG_IRQ_MASK   0x80
#define	AXI_DMAC_REG_IRQ_PENDING   0x84
#define	AXI_DMAC_IRQ_SOT   NO_OS_BIT(0)
#define	AXI_DMAC_IRQ_EOT   NO_OS_BIT(1)
#define	AXI_DMAC_REG_INTF_DESC   0x010
#define	AXI_DMAC_DMA_BPB_DEST   NO_OS_GENMASK(3,0)
#define	AXI_DMAC_DMA_TYPE_DEST   NO_OS_GENMASK(5,4)
#define	AXI_DMAC_DMA_BPB_SRC   NO_OS_GENMASK(11,8)
#define	AXI_DMAC_DMA_TYPE_SRC   NO_OS_GENMASK(13,12)
#define	AXI_DMAC_REG_CTRL   0x400
#define	AXI_DMAC_CTRL_ENABLE   NO_OS_BIT(0)
#define	AXI_DMAC_CTRL_DISABLE   0u
#define	AXI_DMAC_CTRL_PAUSE   NO_OS_BIT(1)
#define	AXI_DMAC_REG_TRANSFER_ID   0x404
#define	AXI_DMAC_REG_TRANSFER_SUBMIT   0x408
#define	AXI_DMAC_TRANSFER_SUBMIT   NO_OS_BIT(0)
#define	AXI_DMAC_QUEUE_FULL   NO_OS_BIT(0)
#define	AXI_DMAC_REG_FLAGS   0x40c
#define	AXI_DMAC_REG_DEST_ADDRESS   0x410
#define	AXI_DMAC_REG_SRC_ADDRESS   0x414
#define	AXI_DMAC_REG_X_LENGTH   0x418
#define	AXI_DMAC_REG_Y_LENGTH   0x41c
#define	AXI_DMAC_REG_DEST_STRIDE   0x420
#define	AXI_DMAC_REG_SRC_STRIDE   0x424
#define	AXI_DMAC_REG_TRANSFER_DONE   0x428

Enumerations
enum	use_irq {   IRQ_DISABLED = 0 ,   IRQ_ENABLED = 1 }
enum	dma_direction {   INVALID_DIR = 0 ,   DMA_DEV_TO_MEM = 1 ,   DMA_MEM_TO_DEV = 2 ,   DMA_MEM_TO_MEM = 3 }
enum	dma_flags {   DMA_CYCLIC = 1 ,   DMA_LAST = 2 ,   DMA_PARTIAL_REPORTING_EN = 4 }
enum	cyclic_transfer {   NO = 0 ,   CYCLIC = 1 }

Functions
void	axi_dmac_dev_to_mem_isr (void *instance)
void	axi_dmac_mem_to_dev_isr (void *instance)
void	axi_dmac_mem_to_mem_isr (void *instance)
void	axi_dmac_write_isr (void *instance)
int32_t	axi_dmac_read (struct axi_dmac *dmac, uint32_t reg_addr, uint32_t *reg_data)
int32_t	axi_dmac_write (struct axi_dmac *dmac, uint32_t reg_addr, uint32_t reg_data)
int32_t	axi_dmac_is_transfer_ready (struct axi_dmac *dmac, bool *rdy)
int32_t	axi_dmac_init (struct axi_dmac **adc_core, const struct axi_dmac_init *init)
int32_t	axi_dmac_remove (struct axi_dmac *dmac)
int32_t	axi_dmac_transfer_start (struct axi_dmac *dmac, struct axi_dma_transfer *dma_transfer)
int32_t	axi_dmac_transfer_wait_completion (struct axi_dmac *dmac, uint32_t timeout_ms)
void	axi_dmac_transfer_stop (struct axi_dmac *dmac)

Detailed Description

Driver for the Analog Devices AXI-DMAC core.

Author

DBogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Copyright 2018(c) Analog Devices, Inc.

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

AXI_DMAC_CTRL_DISABLE

#define AXI_DMAC_CTRL_DISABLE   0u

AXI_DMAC_CTRL_ENABLE

#define AXI_DMAC_CTRL_ENABLE   NO_OS_BIT(0)

AXI_DMAC_CTRL_PAUSE

#define AXI_DMAC_CTRL_PAUSE   NO_OS_BIT(1)

AXI_DMAC_DMA_BPB_DEST

#define AXI_DMAC_DMA_BPB_DEST   NO_OS_GENMASK(3,0)

AXI_DMAC_DMA_BPB_SRC

#define AXI_DMAC_DMA_BPB_SRC   NO_OS_GENMASK(11,8)

AXI_DMAC_DMA_TYPE_DEST

#define AXI_DMAC_DMA_TYPE_DEST   NO_OS_GENMASK(5,4)

AXI_DMAC_DMA_TYPE_SRC

#define AXI_DMAC_DMA_TYPE_SRC   NO_OS_GENMASK(13,12)

AXI_DMAC_IRQ_EOT

#define AXI_DMAC_IRQ_EOT   NO_OS_BIT(1)

AXI_DMAC_IRQ_SOT

#define AXI_DMAC_IRQ_SOT   NO_OS_BIT(0)

AXI_DMAC_QUEUE_FULL

#define AXI_DMAC_QUEUE_FULL   NO_OS_BIT(0)

AXI_DMAC_REG_CTRL

#define AXI_DMAC_REG_CTRL   0x400

AXI_DMAC_REG_DEST_ADDRESS

#define AXI_DMAC_REG_DEST_ADDRESS   0x410

AXI_DMAC_REG_DEST_STRIDE

#define AXI_DMAC_REG_DEST_STRIDE   0x420

AXI_DMAC_REG_FLAGS

#define AXI_DMAC_REG_FLAGS   0x40c

AXI_DMAC_REG_INTF_DESC

#define AXI_DMAC_REG_INTF_DESC   0x010

AXI_DMAC_REG_IRQ_MASK

#define AXI_DMAC_REG_IRQ_MASK   0x80

AXI_DMAC_REG_IRQ_PENDING

#define AXI_DMAC_REG_IRQ_PENDING   0x84

AXI_DMAC_REG_SRC_ADDRESS

#define AXI_DMAC_REG_SRC_ADDRESS   0x414

AXI_DMAC_REG_SRC_STRIDE

#define AXI_DMAC_REG_SRC_STRIDE   0x424

AXI_DMAC_REG_TRANSFER_DONE

#define AXI_DMAC_REG_TRANSFER_DONE   0x428

AXI_DMAC_REG_TRANSFER_ID

#define AXI_DMAC_REG_TRANSFER_ID   0x404

AXI_DMAC_REG_TRANSFER_SUBMIT

#define AXI_DMAC_REG_TRANSFER_SUBMIT   0x408

AXI_DMAC_REG_X_LENGTH

#define AXI_DMAC_REG_X_LENGTH   0x418

AXI_DMAC_REG_Y_LENGTH

#define AXI_DMAC_REG_Y_LENGTH   0x41c

AXI_DMAC_TRANSFER_SUBMIT

#define AXI_DMAC_TRANSFER_SUBMIT   NO_OS_BIT(0)

Enumeration Type Documentation

cyclic_transfer

enum cyclic_transfer

Enumerator
NO
CYCLIC

dma_direction

enum dma_direction

Enumerator
INVALID_DIR
DMA_DEV_TO_MEM
DMA_MEM_TO_DEV
DMA_MEM_TO_MEM

dma_flags

enum dma_flags

Enumerator
DMA_CYCLIC
DMA_LAST
DMA_PARTIAL_REPORTING_EN

use_irq

enum use_irq

Enumerator
IRQ_DISABLED
IRQ_ENABLED

Function Documentation

axi_dmac_dev_to_mem_isr()

void axi_dmac_dev_to_mem_isr

(

void *

instance

)

axi_dmac_init()

int32_t axi_dmac_init	(	struct axi_dmac **	adc_core,
		const struct axi_dmac_init *	init )

axi_dmac_is_transfer_ready()

int32_t axi_dmac_is_transfer_ready	(	struct axi_dmac *	dmac,
		bool *	rdy )

axi_dmac_mem_to_dev_isr()

void axi_dmac_mem_to_dev_isr

(

void *

instance

)

See if remaining size is bigger than max transfer size and set burst size.

axi_dmac_mem_to_mem_isr()

void axi_dmac_mem_to_mem_isr

(

void *

instance

)

See if remaining size is bigger than max transfer size and set burst size.

axi_dmac_read()

int32_t axi_dmac_read	(	struct axi_dmac *	dmac,
		uint32_t	reg_addr,
		uint32_t *	reg_data )

axi_dmac_remove()

int32_t axi_dmac_remove

(

struct axi_dmac *

dmac

)

axi_dmac_transfer_start()

int32_t axi_dmac_transfer_start	(	struct axi_dmac *	dmac,
		struct axi_dma_transfer *	dma_transfer )

axi_dmac_transfer_stop()

void axi_dmac_transfer_stop

(

struct axi_dmac *

dmac

)

axi_dmac_transfer_wait_completion()

int32_t axi_dmac_transfer_wait_completion	(	struct axi_dmac *	dmac,
		uint32_t	timeout_ms )

axi_dmac_write()

int32_t axi_dmac_write	(	struct axi_dmac *	dmac,
		uint32_t	reg_addr,
		uint32_t	reg_data )

axi_dmac_write_isr()

void axi_dmac_write_isr

(

void *

instance

)