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Parameters Definitions. More...
#include <xparameters.h>Macros | |
| #define | SPI_DEVICE_ID XPAR_PS7_SPI_0_DEVICE_ID |
| #define | GPIO_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID |
| #define | CN0561_DMA_BASEADDR XPAR_AXI_CN0561_DMA_BASEADDR |
| #define | CN0561_SPI_ENGINE_BASEADDR XPAR_SPI_CN0561_SPI_CN0561_AXI_REGMAP_BASEADDR |
| #define | CN0561_SPI_ENG_REF_CLK_FREQ_HZ 100000000 |
| #define | CN0561_SPI_CS 0 |
| #define | GPIO_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID |
| #define | GPIO_OFFSET 54 |
| #define | GPIO_RESETN GPIO_OFFSET + 32 |
| #define | GPIO_PDN GPIO_OFFSET + 33 |
| #define | GPIO_MODE GPIO_OFFSET + 34 |
| #define | GPIO_PINBSPI GPIO_OFFSET + 35 |
| #define | GPIO_0 GPIO_OFFSET + 36 |
| #define | GPIO_1 GPIO_OFFSET + 37 |
| #define | GPIO_2 GPIO_OFFSET + 38 |
| #define | GPIO_4 GPIO_OFFSET + 39 |
| #define | GPIO_5 GPIO_OFFSET + 40 |
| #define | GPIO_6 GPIO_OFFSET + 41 |
| #define | GPIO_7 GPIO_OFFSET + 42 |
| #define | CN0561_FMC_CH_NO 4 |
| #define | CN0561_FMC_SAMPLE_NO 256 |
| #define | ADC_BUFFER_SIZE 1000000 |
| #define | CORA_Z7S_DATA_CLK_FREQ_HZ 24000000 |
| #define | ZED_DATA_CLK_FREQ_HZ 50000000 |
Parameters Definitions.
Copyright 2021(c) Analog Devices, Inc.
SPDX-License-Identifier: BSD-3-Clause
| #define ADC_BUFFER_SIZE 1000000 |
| #define CN0561_DMA_BASEADDR XPAR_AXI_CN0561_DMA_BASEADDR |
| #define CN0561_FMC_CH_NO 4 |
| #define CN0561_FMC_SAMPLE_NO 256 |
| #define CN0561_SPI_CS 0 |
| #define CN0561_SPI_ENG_REF_CLK_FREQ_HZ 100000000 |
| #define CN0561_SPI_ENGINE_BASEADDR XPAR_SPI_CN0561_SPI_CN0561_AXI_REGMAP_BASEADDR |
| #define CORA_Z7S_DATA_CLK_FREQ_HZ 24000000 |
| #define GPIO_0 GPIO_OFFSET + 36 |
| #define GPIO_1 GPIO_OFFSET + 37 |
| #define GPIO_2 GPIO_OFFSET + 38 |
| #define GPIO_4 GPIO_OFFSET + 39 |
| #define GPIO_5 GPIO_OFFSET + 40 |
| #define GPIO_6 GPIO_OFFSET + 41 |
| #define GPIO_7 GPIO_OFFSET + 42 |
| #define GPIO_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID |
| #define GPIO_DEVICE_ID XPAR_PS7_GPIO_0_DEVICE_ID |
| #define GPIO_MODE GPIO_OFFSET + 34 |
| #define GPIO_OFFSET 54 |
| #define GPIO_PDN GPIO_OFFSET + 33 |
| #define GPIO_PINBSPI GPIO_OFFSET + 35 |
| #define GPIO_RESETN GPIO_OFFSET + 32 |
| #define SPI_DEVICE_ID XPAR_PS7_SPI_0_DEVICE_ID |
| #define ZED_DATA_CLK_FREQ_HZ 50000000 |