Platform dependent parameters. More...

#include "app_config.h"
#include "xparameters.h"

Include dependency graph for parameters.h:

Macros
#define	UART_BAUDRATE 115200

#define	SPI_DEVICE_ID XPAR_XSPIPS_0_DEVICE_ID

#define	GPIO_DEVICE_ID XPAR_XGPIOPS_0_DEVICE_ID

#define	UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID

#define	UART_IRQ_ID XPAR_XUARTPS_1_INTR

#define	GPIO_OFFSET 54

#define	ADC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x800000)

#define	DAC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x900000)

#define	RX_CORE_BASEADDR XPAR_AXI_AD9680_TPL_ADC_TPL_CORE_BASEADDR

#define	TX_CORE_BASEADDR XPAR_AXI_AD9144_TPL_DAC_TPL_CORE_BASEADDR

#define	RX_DMA_BASEADDR XPAR_AXI_AD9680_DMA_BASEADDR

#define	TX_DMA_BASEADDR XPAR_AXI_AD9144_DMA_BASEADDR

#define	RX_JESD_BASEADDR XPAR_AXI_AD9680_JESD_RX_AXI_BASEADDR

#define	TX_JESD_BASEADDR XPAR_AXI_AD9144_JESD_TX_AXI_BASEADDR

#define	RX_XCVR_BASEADDR XPAR_AXI_AD9680_XCVR_BASEADDR

#define	TX_XCVR_BASEADDR XPAR_AXI_AD9144_XCVR_BASEADDR

#define	GPIO_TRIG (GPIO_OFFSET + 43)

#define	GPIO_ADC_PD (GPIO_OFFSET + 42)

#define	GPIO_DAC_TXEN (GPIO_OFFSET + 41)

#define	GPIO_DAC_RESET (GPIO_OFFSET + 40)

#define	GPIO_CLKD_SYNC (GPIO_OFFSET + 38)

#define	GPIO_ADC_FDB (GPIO_OFFSET + 36)

#define	GPIO_ADC_FDA (GPIO_OFFSET + 35)

#define	GPIO_DAC_IRQ (GPIO_OFFSET + 34)

#define	GPIO_CLKD_STATUS_1 (GPIO_OFFSET + 33)

#define	GPIO_CLKD_STATUS_0 (GPIO_OFFSET + 32)

Enumerations
enum	ad9523_channels { DAC_DEVICE_CLK , DAC_DEVICE_SYSREF , DAC_FPGA_CLK , DAC_FPGA_SYSREF , ADC_DEVICE_CLK , ADC_DEVICE_SYSREF , ADC_FPGA_CLK , ADC_FPGA_SYSREF }

Detailed Description

Platform dependent parameters.

Author: Antoniu Miclaus (anton.nosp@m.iu.m.nosp@m.iclau.nosp@m.s@an.nosp@m.alog..nosp@m.com)

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

◆ ADC_DDR_BASEADDR

#define ADC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x800000)

◆ DAC_DDR_BASEADDR

#define DAC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x900000)

◆ GPIO_ADC_FDA

#define GPIO_ADC_FDA (GPIO_OFFSET + 35)

◆ GPIO_ADC_FDB

#define GPIO_ADC_FDB (GPIO_OFFSET + 36)

◆ GPIO_ADC_PD

#define GPIO_ADC_PD (GPIO_OFFSET + 42)

◆ GPIO_CLKD_STATUS_0

#define GPIO_CLKD_STATUS_0 (GPIO_OFFSET + 32)

◆ GPIO_CLKD_STATUS_1

#define GPIO_CLKD_STATUS_1 (GPIO_OFFSET + 33)

◆ GPIO_CLKD_SYNC

#define GPIO_CLKD_SYNC (GPIO_OFFSET + 38)

◆ GPIO_DAC_IRQ

#define GPIO_DAC_IRQ (GPIO_OFFSET + 34)

◆ GPIO_DAC_RESET

#define GPIO_DAC_RESET (GPIO_OFFSET + 40)

◆ GPIO_DAC_TXEN

#define GPIO_DAC_TXEN (GPIO_OFFSET + 41)

◆ GPIO_DEVICE_ID

#define GPIO_DEVICE_ID XPAR_XGPIOPS_0_DEVICE_ID

◆ GPIO_OFFSET

#define GPIO_OFFSET 54

◆ GPIO_TRIG

#define GPIO_TRIG (GPIO_OFFSET + 43)

◆ RX_CORE_BASEADDR

#define RX_CORE_BASEADDR XPAR_AXI_AD9680_TPL_ADC_TPL_CORE_BASEADDR

◆ RX_DMA_BASEADDR

#define RX_DMA_BASEADDR XPAR_AXI_AD9680_DMA_BASEADDR

◆ RX_JESD_BASEADDR

#define RX_JESD_BASEADDR XPAR_AXI_AD9680_JESD_RX_AXI_BASEADDR

◆ RX_XCVR_BASEADDR

#define RX_XCVR_BASEADDR XPAR_AXI_AD9680_XCVR_BASEADDR

◆ SPI_DEVICE_ID

#define SPI_DEVICE_ID XPAR_XSPIPS_0_DEVICE_ID

◆ TX_CORE_BASEADDR

#define TX_CORE_BASEADDR XPAR_AXI_AD9144_TPL_DAC_TPL_CORE_BASEADDR

◆ TX_DMA_BASEADDR

#define TX_DMA_BASEADDR XPAR_AXI_AD9144_DMA_BASEADDR

◆ TX_JESD_BASEADDR

#define TX_JESD_BASEADDR XPAR_AXI_AD9144_JESD_TX_AXI_BASEADDR

◆ TX_XCVR_BASEADDR

#define TX_XCVR_BASEADDR XPAR_AXI_AD9144_XCVR_BASEADDR

◆ UART_BAUDRATE

#define UART_BAUDRATE 115200

◆ UART_DEVICE_ID

#define UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID

◆ UART_IRQ_ID

#define UART_IRQ_ID XPAR_XUARTPS_1_INTR

Enumeration Type Documentation

◆ ad9523_channels

enum ad9523_channels

Enumerator
DAC_DEVICE_CLK
DAC_DEVICE_SYSREF
DAC_FPGA_CLK
DAC_FPGA_SYSREF
ADC_DEVICE_CLK
ADC_DEVICE_SYSREF
ADC_FPGA_CLK
ADC_FPGA_SYSREF

Macros

Enumerations