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Platform dependent parameters. More...
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Macros | |
#define | UART_BAUDRATE 115200 |
#define | SPI_DEVICE_ID XPAR_XSPIPS_0_DEVICE_ID |
#define | GPIO_DEVICE_ID XPAR_XGPIOPS_0_DEVICE_ID |
#define | UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID |
#define | UART_IRQ_ID XPAR_XUARTPS_1_INTR |
#define | INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID |
#define | GPIO_OFFSET 54 |
#define | ADC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x800000) |
#define | DAC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x900000) |
#define | RX_CORE_BASEADDR XPAR_AXI_AD9680_TPL_ADC_TPL_CORE_BASEADDR |
#define | TX_CORE_BASEADDR XPAR_AXI_AD9144_TPL_DAC_TPL_CORE_BASEADDR |
#define | RX_DMA_BASEADDR XPAR_AXI_AD9680_DMA_BASEADDR |
#define | TX_DMA_BASEADDR XPAR_AXI_AD9144_DMA_BASEADDR |
#define | RX_JESD_BASEADDR XPAR_AXI_AD9680_JESD_RX_AXI_BASEADDR |
#define | TX_JESD_BASEADDR XPAR_AXI_AD9144_JESD_TX_AXI_BASEADDR |
#define | RX_XCVR_BASEADDR XPAR_AXI_AD9680_XCVR_BASEADDR |
#define | TX_XCVR_BASEADDR XPAR_AXI_AD9144_XCVR_BASEADDR |
#define | GPIO_TRIG (GPIO_OFFSET + 43) |
#define | GPIO_ADC_PD (GPIO_OFFSET + 42) |
#define | GPIO_DAC_TXEN (GPIO_OFFSET + 41) |
#define | GPIO_DAC_RESET (GPIO_OFFSET + 40) |
#define | GPIO_CLKD_SYNC (GPIO_OFFSET + 38) |
#define | GPIO_ADC_FDB (GPIO_OFFSET + 36) |
#define | GPIO_ADC_FDA (GPIO_OFFSET + 35) |
#define | GPIO_DAC_IRQ (GPIO_OFFSET + 34) |
#define | GPIO_CLKD_STATUS_1 (GPIO_OFFSET + 33) |
#define | GPIO_CLKD_STATUS_0 (GPIO_OFFSET + 32) |
Platform dependent parameters.
Copyright 2020(c) Analog Devices, Inc.
Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define ADC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x800000) |
#define DAC_DDR_BASEADDR (XPAR_DDR_MEM_BASEADDR + 0x900000) |
#define GPIO_ADC_FDA (GPIO_OFFSET + 35) |
#define GPIO_ADC_FDB (GPIO_OFFSET + 36) |
#define GPIO_ADC_PD (GPIO_OFFSET + 42) |
#define GPIO_CLKD_STATUS_0 (GPIO_OFFSET + 32) |
#define GPIO_CLKD_STATUS_1 (GPIO_OFFSET + 33) |
#define GPIO_CLKD_SYNC (GPIO_OFFSET + 38) |
#define GPIO_DAC_IRQ (GPIO_OFFSET + 34) |
#define GPIO_DAC_RESET (GPIO_OFFSET + 40) |
#define GPIO_DAC_TXEN (GPIO_OFFSET + 41) |
#define GPIO_DEVICE_ID XPAR_XGPIOPS_0_DEVICE_ID |
#define GPIO_OFFSET 54 |
#define GPIO_TRIG (GPIO_OFFSET + 43) |
#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID |
#define RX_CORE_BASEADDR XPAR_AXI_AD9680_TPL_ADC_TPL_CORE_BASEADDR |
#define RX_DMA_BASEADDR XPAR_AXI_AD9680_DMA_BASEADDR |
#define RX_JESD_BASEADDR XPAR_AXI_AD9680_JESD_RX_AXI_BASEADDR |
#define RX_XCVR_BASEADDR XPAR_AXI_AD9680_XCVR_BASEADDR |
#define SPI_DEVICE_ID XPAR_XSPIPS_0_DEVICE_ID |
#define TX_CORE_BASEADDR XPAR_AXI_AD9144_TPL_DAC_TPL_CORE_BASEADDR |
#define TX_DMA_BASEADDR XPAR_AXI_AD9144_DMA_BASEADDR |
#define TX_JESD_BASEADDR XPAR_AXI_AD9144_JESD_TX_AXI_BASEADDR |
#define TX_XCVR_BASEADDR XPAR_AXI_AD9144_XCVR_BASEADDR |
#define UART_BAUDRATE 115200 |
#define UART_DEVICE_ID XPAR_XUARTPS_0_DEVICE_ID |
#define UART_IRQ_ID XPAR_XUARTPS_1_INTR |
enum ad9523_channels |