no-OS
Classes | Macros | Functions | Variables
hmc7044.c File Reference

Implementation of HMC7044, HMC7043 Driver. More...

#include <stdlib.h>
#include <stdio.h>
#include <limits.h>
#include "no_os_print_log.h"
#include "no_os_error.h"
#include "no_os_util.h"
#include "no_os_alloc.h"
#include "no_os_clk.h"
#include "hmc7044.h"
#include "jesd204.h"
Include dependency graph for hmc7044.c:

Classes

struct  hmc7044_jesd204_priv
 

Macros

#define HMC7044_WRITE   (0 << 15)
 
#define HMC7044_READ   (1 << 15)
 
#define HMC7044_CNT(x)   (((x) - 1) << 13)
 
#define HMC7044_ADDR(x)   ((x) & 0xFFF)
 
#define HMC7044_REG_SOFT_RESET   0x0000
 
#define HMC7044_SOFT_RESET   NO_OS_BIT(0)
 
#define HMC7044_REG_REQ_MODE_0   0x0001
 
#define HMC7044_RESEED_REQ   NO_OS_BIT(7)
 
#define HMC7044_HIGH_PERF_DISTRIB_PATH   NO_OS_BIT(6)
 
#define HMC7044_HIGH_PERF_PLL_VCO   NO_OS_BIT(5)
 
#define HMC7044_FORCE_HOLDOVER   NO_OS_BIT(4)
 
#define HMC7044_MUTE_OUT_DIV   NO_OS_BIT(3)
 
#define HMC7044_PULSE_GEN_REQ   NO_OS_BIT(2)
 
#define HMC7044_RESTART_DIV_FSM   NO_OS_BIT(1)
 
#define HMC7044_SLEEP_MODE   NO_OS_BIT(0)
 
#define HMC7044_REG_REQ_MODE_1   0x0002
 
#define HMC7044_PLL2_AUTOTUNE_TRIG   NO_OS_BIT(2)
 
#define HMC7044_SLIP_REQ   NO_OS_BIT(1)
 
#define HMC7044_REG_EN_CTRL_0   0x0003
 
#define HMC7044_RF_RESEEDER_EN   NO_OS_BIT(5)
 
#define HMC7044_VCO_SEL(x)   (((x) & 0x3) << 3)
 
#define HMC7044_VCO_EXT   0
 
#define HMC7044_VCO_HIGH   1
 
#define HMC7044_VCO_LOW   2
 
#define HMC7044_SYSREF_TIMER_EN   NO_OS_BIT(2)
 
#define HMC7044_PLL2_EN   NO_OS_BIT(1)
 
#define HMC7044_PLL1_EN   NO_OS_BIT(0)
 
#define HMC7044_REG_EN_CTRL_1   0x0004
 
#define HMC7044_SEVEN_PAIRS(x)   ((x) & 0x7f)
 
#define HMC7044_REG_GLOB_MODE   0x0005
 
#define HMC7044_REF_PATH_EN(x)   ((x) & 0xf)
 
#define HMC7044_RFSYNC_EN   NO_OS_BIT(4)
 
#define HMC7044_VCOIN_MODE_EN   NO_OS_BIT(5)
 
#define HMC7044_SYNC_PIN_MODE(x)   (((x) & 0x3) << 6)
 
#define HMC7044_REG_SCRATCHPAD   0x0008
 
#define HMC7044_REG_CLKIN0_BUF_CTRL   0x000A
 
#define HMC7044_REG_CLKIN1_BUF_CTRL   0x000B
 
#define HMC7044_REG_CLKIN2_BUF_CTRL   0x000C
 
#define HMC7044_REG_CLKIN3_BUF_CTRL   0x000D
 
#define HMC7044_REG_OSCIN_BUF_CTRL   0x000E
 
#define HMC7044_REG_PLL1_REF_PRIO_CTRL   0x0014
 
#define HMC7044_HIGH_Z_EN   NO_OS_BIT(4)
 
#define HMC7044_LVPECL_EN   NO_OS_BIT(3)
 
#define HMC7044_AC_COUPLING_EN   NO_OS_BIT(2)
 
#define HMC7044_100_OHM_EN   NO_OS_BIT(1)
 
#define HMC7044_BUF_EN   NO_OS_BIT(0)
 
#define HMC7044_REG_PLL1_CP_CTRL   0x001A
 
#define HMC7044_PLL1_CP_CURRENT(x)   ((x) & 0xf)
 
#define HMC7044_REG_CLKIN_PRESCALER(x)   (0x001C + (x))
 
#define HMC7044_REG_OSCIN_PRESCALER   0x0020
 
#define HMC7044_REG_PLL1_R_LSB   0x0021
 
#define HMC7044_R1_LSB(x)   ((x) & 0xff)
 
#define HMC7044_REG_PLL1_R_MSB   0x0022
 
#define HMC7044_R1_MSB(x)   (((x) & 0xff00) >> 8)
 
#define HMC7044_REG_PLL1_N_LSB   0x0026
 
#define HMC7044_N1_LSB(x)   ((x) & 0xff)
 
#define HMC7044_REG_PLL1_N_MSB   0x0027
 
#define HMC7044_N1_MSB(x)   (((x) & 0xff00) >> 8)
 
#define HMC7044_REG_PLL1_LOCK_DETECT   0x0028
 
#define HMC7044_LOCK_DETECT_SLIP   NO_OS_BIT(5)
 
#define HMC7044_LOCK_DETECT_TIMER(x)   ((x) & 0x1f)
 
#define HMC7044_REG_PLL1_REF_SWITCH   0x0029
 
#define HMC7044_BYPASS_DEBOUNCER   NO_OS_BIT(5)
 
#define HMC7044_MANUAL_MODE_SWITCH(x)   (((x) & 0x3) << 3)
 
#define HMC7044_HOLDOVER_DAC   NO_OS_BIT(2)
 
#define HMC7044_AUTO_REVERT_SWITCH   NO_OS_BIT(1)
 
#define HMC7044_AUTO_MODE_SWITCH   NO_OS_BIT(0)
 
#define HMC7044_REG_PLL2_FREQ_DOUBLER   0x0032
 
#define HMC7044_PLL2_FREQ_DOUBLER_DIS   NO_OS_BIT(0)
 
#define HMC7044_REG_PLL2_R_LSB   0x0033
 
#define HMC7044_R2_LSB(x)   ((x) & 0xff)
 
#define HMC7044_REG_PLL2_R_MSB   0x0034
 
#define HMC7044_R2_MSB(x)   (((x) & 0xf00) >> 8)
 
#define HMC7044_REG_PLL2_N_LSB   0x0035
 
#define HMC7044_N2_LSB(x)   ((x) & 0xff)
 
#define HMC7044_REG_PLL2_N_MSB   0x0036
 
#define HMC7044_N2_MSB(x)   (((x) & 0xff00) >> 8)
 
#define HMC7044_REG_OSCOUT_PATH   0x0039
 
#define HMC7044_REG_OSCOUT_DRIVER_0   0x003A
 
#define HMC7044_REG_OSCOUT_DRIVER_1   0x003B
 
#define HMC7044_REG_GPI_CTRL(x)   (0x0046 + (x))
 
#define HMC7044_REG_GPI_SEL(x)   ((x) & 0xf)
 
#define HMC7044_REG_GPO_CTRL(x)   (0x0050 + (x))
 
#define HMC7044_GPO_SEL(x)   (((x) & 0x3f) << 2)
 
#define HMC7044_GPO_MODE   NO_OS_BIT(1)
 
#define HMC7044_GPO_EN   NO_OS_BIT(0)
 
#define HMC7044_REG_PULSE_GEN   0x005A
 
#define HMC7044_PULSE_GEN_MODE(x)   ((x) & 0x7)
 
#define HMC7044_REG_SYNC   0x005B
 
#define HMC7044_SYNC_RETIME   NO_OS_BIT(2)
 
#define HMC7044_SYNC_THROUGH_PLL2   NO_OS_BIT(1)
 
#define HMC7044_SYNC_POLARITY   NO_OS_BIT(0)
 
#define HMC7044_REG_SYSREF_TIMER_LSB   0x005C
 
#define HMC7044_SYSREF_TIMER_LSB(x)   ((x) & 0xff)
 
#define HMC7044_REG_SYSREF_TIMER_MSB   0x005D
 
#define HMC7044_SYSREF_TIMER_MSB(x)   (((x) & 0xf00) >> 8)
 
#define HMC7044_CLK_INPUT_CTRL   0x0064
 
#define HMC7044_LOW_FREQ_INPUT_MODE   NO_OS_BIT(0)
 
#define HMC7044_DIV_2_INPUT_MODE   NO_OS_BIT(1)
 
#define HMC7044_REG_ALARM_READBACK   0x007D
 
#define HMC7044_REG_PLL1_STATUS   0x0082
 
#define HMC7044_PLL1_FSM_STATE(x)   ((x) & 0x7)
 
#define HMC7044_PLL1_ACTIVE_CLKIN(x)   (((x) >> 3) & 0x3)
 
#define HMC7044_PLL2_LOCK_DETECT(x)   ((x) & 0x1)
 
#define HMC7044_SYSREF_SYNC_STAT(x)   ((x) & 0x2)
 
#define HMC7044_CLK_OUT_PH_STATUS(x)   ((x) & 0x4)
 
#define HMC7044_PLL1_PLL2_LOCK_STAT(x)   ((x) & 0x8)
 
#define HMC7044_SYNC_REQ_STATUS(x)   ((x) & 0x10)
 
#define HMC7044_REG_CLK_OUT_DRV_LOW_PW   0x009F
 
#define HMC7044_REG_CLK_OUT_DRV_HIGH_PW   0x00A0
 
#define HMC7044_REG_PLL1_DELAY   0x00A5
 
#define HMC7044_REG_PLL1_HOLDOVER   0x00A8
 
#define HMC7044_REG_VTUNE_PRESET   0x00B0
 
#define HMC7044_REG_CH_OUT_CRTL_0(ch)   (0x00C8 + 0xA * (ch))
 
#define HMC7044_HI_PERF_MODE   NO_OS_BIT(7)
 
#define HMC7044_SYNC_EN   NO_OS_BIT(6)
 
#define HMC7044_CH_EN   NO_OS_BIT(0)
 
#define HMC7044_START_UP_MODE_DYN_EN   (NO_OS_BIT(3) | NO_OS_BIT(2))
 
#define HMC7044_REG_CH_OUT_CRTL_1(ch)   (0x00C9 + 0xA * (ch))
 
#define HMC7044_DIV_LSB(x)   ((x) & 0xFF)
 
#define HMC7044_REG_CH_OUT_CRTL_2(ch)   (0x00CA + 0xA * (ch))
 
#define HMC7044_DIV_MSB(x)   (((x) >> 8) & 0xFF)
 
#define HMC7044_REG_CH_OUT_CRTL_3(ch)   (0x00CB + 0xA * (ch))
 
#define HMC7044_REG_CH_OUT_CRTL_4(ch)   (0x00CC + 0xA * (ch))
 
#define HMC7044_REG_CH_OUT_CRTL_5(ch)   (0x00CD + 0xA * (ch))
 
#define HMC7044_REG_CH_OUT_CRTL_6(ch)   (0x00CE + 0xA * (ch))
 
#define HMC7044_REG_CH_OUT_CRTL_7(ch)   (0x00CF + 0xA * (ch))
 
#define HMC7044_REG_CH_OUT_CRTL_8(ch)   (0x00D0 + 0xA * (ch))
 
#define HMC7044_DRIVER_MODE(x)   (((x) & 0x3) << 3)
 
#define HMC7044_DRIVER_Z_MODE(x)   (((x) & 0x3) << 0)
 
#define HMC7044_DYN_DRIVER_EN   NO_OS_BIT(5)
 
#define HMC7044_FORCE_MUTE_EN   NO_OS_BIT(7)
 
#define HMC7044_NUM_CHAN   14
 
#define HMC7044_LOW_VCO_MIN   2150000
 
#define HMC7044_LOW_VCO_MAX   2880000
 
#define HMC7044_HIGH_VCO_MIN   2650000
 
#define HMC7044_HIGH_VCO_MAX   3200000
 
#define HMC7044_RECOMM_LCM_MIN   30000
 
#define HMC7044_RECOMM_LCM_MAX   70000
 
#define HMC7044_RECOMM_PFD1   10000
 
#define HMC7044_MIN_PFD1   1
 
#define HMC7044_MAX_PFD1   50000
 
#define HMC7044_CP_CURRENT_STEP   120
 
#define HMC7044_CP_CURRENT_MIN   120
 
#define HMC7044_CP_CURRENT_MAX   1920
 
#define HMC7044_CP_CURRENT_DEF   1080
 
#define HMC7044_R1_MAX   65535
 
#define HMC7044_N1_MAX   65535
 
#define HMC7044_R2_MIN   1
 
#define HMC7044_R2_MAX   4095
 
#define HMC7044_N2_MIN   8
 
#define HMC7044_N2_MAX   65535
 
#define HMC7044_OUT_DIV_MIN   1
 
#define HMC7044_OUT_DIV_MAX   4094
 

Functions

int32_t hmc7044_read (struct hmc7044_dev *dev, uint16_t reg, uint8_t *val)
 
uint32_t hmc7044_calc_out_div (uint32_t rate, uint32_t parent_rate)
 
int32_t hmc7044_clk_recalc_rate (struct hmc7044_dev *dev, uint32_t chan_num, uint64_t *rate)
 
int32_t hmc7044_clk_round_rate (struct hmc7044_dev *dev, uint32_t rate, uint64_t *rounded_rate)
 
int32_t hmc7044_clk_set_rate (struct hmc7044_dev *dev, uint32_t chan_num, uint64_t rate)
 
int32_t hmc7044_init (struct hmc7044_dev **device, const struct hmc7044_init_param *init_param)
 
int32_t hmc7044_remove (struct hmc7044_dev *device)
 
int32_t hmc7044_set_rate (struct no_os_clk_desc *desc, uint64_t rate)
 Set the clock rate. More...
 

Variables

const struct no_os_clk_platform_ops hmc7044_clk_ops
 hmc7044 clock ops More...
 

Detailed Description

Implementation of HMC7044, HMC7043 Driver.

Author
DBogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Copyright 2018-2020(c) Analog Devices, Inc.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

  1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
  3. Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES, INC. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

◆ HMC7044_100_OHM_EN

#define HMC7044_100_OHM_EN   NO_OS_BIT(1)

◆ HMC7044_AC_COUPLING_EN

#define HMC7044_AC_COUPLING_EN   NO_OS_BIT(2)

◆ HMC7044_ADDR

#define HMC7044_ADDR (   x)    ((x) & 0xFFF)

◆ HMC7044_AUTO_MODE_SWITCH

#define HMC7044_AUTO_MODE_SWITCH   NO_OS_BIT(0)

◆ HMC7044_AUTO_REVERT_SWITCH

#define HMC7044_AUTO_REVERT_SWITCH   NO_OS_BIT(1)

◆ HMC7044_BUF_EN

#define HMC7044_BUF_EN   NO_OS_BIT(0)

◆ HMC7044_BYPASS_DEBOUNCER

#define HMC7044_BYPASS_DEBOUNCER   NO_OS_BIT(5)

◆ HMC7044_CH_EN

#define HMC7044_CH_EN   NO_OS_BIT(0)

◆ HMC7044_CLK_INPUT_CTRL

#define HMC7044_CLK_INPUT_CTRL   0x0064

◆ HMC7044_CLK_OUT_PH_STATUS

#define HMC7044_CLK_OUT_PH_STATUS (   x)    ((x) & 0x4)

◆ HMC7044_CNT

#define HMC7044_CNT (   x)    (((x) - 1) << 13)

◆ HMC7044_CP_CURRENT_DEF

#define HMC7044_CP_CURRENT_DEF   1080

◆ HMC7044_CP_CURRENT_MAX

#define HMC7044_CP_CURRENT_MAX   1920

◆ HMC7044_CP_CURRENT_MIN

#define HMC7044_CP_CURRENT_MIN   120

◆ HMC7044_CP_CURRENT_STEP

#define HMC7044_CP_CURRENT_STEP   120

◆ HMC7044_DIV_2_INPUT_MODE

#define HMC7044_DIV_2_INPUT_MODE   NO_OS_BIT(1)

◆ HMC7044_DIV_LSB

#define HMC7044_DIV_LSB (   x)    ((x) & 0xFF)

◆ HMC7044_DIV_MSB

#define HMC7044_DIV_MSB (   x)    (((x) >> 8) & 0xFF)

◆ HMC7044_DRIVER_MODE

#define HMC7044_DRIVER_MODE (   x)    (((x) & 0x3) << 3)

◆ HMC7044_DRIVER_Z_MODE

#define HMC7044_DRIVER_Z_MODE (   x)    (((x) & 0x3) << 0)

◆ HMC7044_DYN_DRIVER_EN

#define HMC7044_DYN_DRIVER_EN   NO_OS_BIT(5)

◆ HMC7044_FORCE_HOLDOVER

#define HMC7044_FORCE_HOLDOVER   NO_OS_BIT(4)

◆ HMC7044_FORCE_MUTE_EN

#define HMC7044_FORCE_MUTE_EN   NO_OS_BIT(7)

◆ HMC7044_GPO_EN

#define HMC7044_GPO_EN   NO_OS_BIT(0)

◆ HMC7044_GPO_MODE

#define HMC7044_GPO_MODE   NO_OS_BIT(1)

◆ HMC7044_GPO_SEL

#define HMC7044_GPO_SEL (   x)    (((x) & 0x3f) << 2)

◆ HMC7044_HI_PERF_MODE

#define HMC7044_HI_PERF_MODE   NO_OS_BIT(7)

◆ HMC7044_HIGH_PERF_DISTRIB_PATH

#define HMC7044_HIGH_PERF_DISTRIB_PATH   NO_OS_BIT(6)

◆ HMC7044_HIGH_PERF_PLL_VCO

#define HMC7044_HIGH_PERF_PLL_VCO   NO_OS_BIT(5)

◆ HMC7044_HIGH_VCO_MAX

#define HMC7044_HIGH_VCO_MAX   3200000

◆ HMC7044_HIGH_VCO_MIN

#define HMC7044_HIGH_VCO_MIN   2650000

◆ HMC7044_HIGH_Z_EN

#define HMC7044_HIGH_Z_EN   NO_OS_BIT(4)

◆ HMC7044_HOLDOVER_DAC

#define HMC7044_HOLDOVER_DAC   NO_OS_BIT(2)

◆ HMC7044_LOCK_DETECT_SLIP

#define HMC7044_LOCK_DETECT_SLIP   NO_OS_BIT(5)

◆ HMC7044_LOCK_DETECT_TIMER

#define HMC7044_LOCK_DETECT_TIMER (   x)    ((x) & 0x1f)

◆ HMC7044_LOW_FREQ_INPUT_MODE

#define HMC7044_LOW_FREQ_INPUT_MODE   NO_OS_BIT(0)

◆ HMC7044_LOW_VCO_MAX

#define HMC7044_LOW_VCO_MAX   2880000

◆ HMC7044_LOW_VCO_MIN

#define HMC7044_LOW_VCO_MIN   2150000

◆ HMC7044_LVPECL_EN

#define HMC7044_LVPECL_EN   NO_OS_BIT(3)

◆ HMC7044_MANUAL_MODE_SWITCH

#define HMC7044_MANUAL_MODE_SWITCH (   x)    (((x) & 0x3) << 3)

◆ HMC7044_MAX_PFD1

#define HMC7044_MAX_PFD1   50000

◆ HMC7044_MIN_PFD1

#define HMC7044_MIN_PFD1   1

◆ HMC7044_MUTE_OUT_DIV

#define HMC7044_MUTE_OUT_DIV   NO_OS_BIT(3)

◆ HMC7044_N1_LSB

#define HMC7044_N1_LSB (   x)    ((x) & 0xff)

◆ HMC7044_N1_MAX

#define HMC7044_N1_MAX   65535

◆ HMC7044_N1_MSB

#define HMC7044_N1_MSB (   x)    (((x) & 0xff00) >> 8)

◆ HMC7044_N2_LSB

#define HMC7044_N2_LSB (   x)    ((x) & 0xff)

◆ HMC7044_N2_MAX

#define HMC7044_N2_MAX   65535

◆ HMC7044_N2_MIN

#define HMC7044_N2_MIN   8

◆ HMC7044_N2_MSB

#define HMC7044_N2_MSB (   x)    (((x) & 0xff00) >> 8)

◆ HMC7044_NUM_CHAN

#define HMC7044_NUM_CHAN   14

◆ HMC7044_OUT_DIV_MAX

#define HMC7044_OUT_DIV_MAX   4094

◆ HMC7044_OUT_DIV_MIN

#define HMC7044_OUT_DIV_MIN   1

◆ HMC7044_PLL1_ACTIVE_CLKIN

#define HMC7044_PLL1_ACTIVE_CLKIN (   x)    (((x) >> 3) & 0x3)

◆ HMC7044_PLL1_CP_CURRENT

#define HMC7044_PLL1_CP_CURRENT (   x)    ((x) & 0xf)

◆ HMC7044_PLL1_EN

#define HMC7044_PLL1_EN   NO_OS_BIT(0)

◆ HMC7044_PLL1_FSM_STATE

#define HMC7044_PLL1_FSM_STATE (   x)    ((x) & 0x7)

◆ HMC7044_PLL1_PLL2_LOCK_STAT

#define HMC7044_PLL1_PLL2_LOCK_STAT (   x)    ((x) & 0x8)

◆ HMC7044_PLL2_AUTOTUNE_TRIG

#define HMC7044_PLL2_AUTOTUNE_TRIG   NO_OS_BIT(2)

◆ HMC7044_PLL2_EN

#define HMC7044_PLL2_EN   NO_OS_BIT(1)

◆ HMC7044_PLL2_FREQ_DOUBLER_DIS

#define HMC7044_PLL2_FREQ_DOUBLER_DIS   NO_OS_BIT(0)

◆ HMC7044_PLL2_LOCK_DETECT

#define HMC7044_PLL2_LOCK_DETECT (   x)    ((x) & 0x1)

◆ HMC7044_PULSE_GEN_MODE

#define HMC7044_PULSE_GEN_MODE (   x)    ((x) & 0x7)

◆ HMC7044_PULSE_GEN_REQ

#define HMC7044_PULSE_GEN_REQ   NO_OS_BIT(2)

◆ HMC7044_R1_LSB

#define HMC7044_R1_LSB (   x)    ((x) & 0xff)

◆ HMC7044_R1_MAX

#define HMC7044_R1_MAX   65535

◆ HMC7044_R1_MSB

#define HMC7044_R1_MSB (   x)    (((x) & 0xff00) >> 8)

◆ HMC7044_R2_LSB

#define HMC7044_R2_LSB (   x)    ((x) & 0xff)

◆ HMC7044_R2_MAX

#define HMC7044_R2_MAX   4095

◆ HMC7044_R2_MIN

#define HMC7044_R2_MIN   1

◆ HMC7044_R2_MSB

#define HMC7044_R2_MSB (   x)    (((x) & 0xf00) >> 8)

◆ HMC7044_READ

#define HMC7044_READ   (1 << 15)

◆ HMC7044_RECOMM_LCM_MAX

#define HMC7044_RECOMM_LCM_MAX   70000

◆ HMC7044_RECOMM_LCM_MIN

#define HMC7044_RECOMM_LCM_MIN   30000

◆ HMC7044_RECOMM_PFD1

#define HMC7044_RECOMM_PFD1   10000

◆ HMC7044_REF_PATH_EN

#define HMC7044_REF_PATH_EN (   x)    ((x) & 0xf)

◆ HMC7044_REG_ALARM_READBACK

#define HMC7044_REG_ALARM_READBACK   0x007D

◆ HMC7044_REG_CH_OUT_CRTL_0

#define HMC7044_REG_CH_OUT_CRTL_0 (   ch)    (0x00C8 + 0xA * (ch))

◆ HMC7044_REG_CH_OUT_CRTL_1

#define HMC7044_REG_CH_OUT_CRTL_1 (   ch)    (0x00C9 + 0xA * (ch))

◆ HMC7044_REG_CH_OUT_CRTL_2

#define HMC7044_REG_CH_OUT_CRTL_2 (   ch)    (0x00CA + 0xA * (ch))

◆ HMC7044_REG_CH_OUT_CRTL_3

#define HMC7044_REG_CH_OUT_CRTL_3 (   ch)    (0x00CB + 0xA * (ch))

◆ HMC7044_REG_CH_OUT_CRTL_4

#define HMC7044_REG_CH_OUT_CRTL_4 (   ch)    (0x00CC + 0xA * (ch))

◆ HMC7044_REG_CH_OUT_CRTL_5

#define HMC7044_REG_CH_OUT_CRTL_5 (   ch)    (0x00CD + 0xA * (ch))

◆ HMC7044_REG_CH_OUT_CRTL_6

#define HMC7044_REG_CH_OUT_CRTL_6 (   ch)    (0x00CE + 0xA * (ch))

◆ HMC7044_REG_CH_OUT_CRTL_7

#define HMC7044_REG_CH_OUT_CRTL_7 (   ch)    (0x00CF + 0xA * (ch))

◆ HMC7044_REG_CH_OUT_CRTL_8

#define HMC7044_REG_CH_OUT_CRTL_8 (   ch)    (0x00D0 + 0xA * (ch))

◆ HMC7044_REG_CLK_OUT_DRV_HIGH_PW

#define HMC7044_REG_CLK_OUT_DRV_HIGH_PW   0x00A0

◆ HMC7044_REG_CLK_OUT_DRV_LOW_PW

#define HMC7044_REG_CLK_OUT_DRV_LOW_PW   0x009F

◆ HMC7044_REG_CLKIN0_BUF_CTRL

#define HMC7044_REG_CLKIN0_BUF_CTRL   0x000A

◆ HMC7044_REG_CLKIN1_BUF_CTRL

#define HMC7044_REG_CLKIN1_BUF_CTRL   0x000B

◆ HMC7044_REG_CLKIN2_BUF_CTRL

#define HMC7044_REG_CLKIN2_BUF_CTRL   0x000C

◆ HMC7044_REG_CLKIN3_BUF_CTRL

#define HMC7044_REG_CLKIN3_BUF_CTRL   0x000D

◆ HMC7044_REG_CLKIN_PRESCALER

#define HMC7044_REG_CLKIN_PRESCALER (   x)    (0x001C + (x))

◆ HMC7044_REG_EN_CTRL_0

#define HMC7044_REG_EN_CTRL_0   0x0003

◆ HMC7044_REG_EN_CTRL_1

#define HMC7044_REG_EN_CTRL_1   0x0004

◆ HMC7044_REG_GLOB_MODE

#define HMC7044_REG_GLOB_MODE   0x0005

◆ HMC7044_REG_GPI_CTRL

#define HMC7044_REG_GPI_CTRL (   x)    (0x0046 + (x))

◆ HMC7044_REG_GPI_SEL

#define HMC7044_REG_GPI_SEL (   x)    ((x) & 0xf)

◆ HMC7044_REG_GPO_CTRL

#define HMC7044_REG_GPO_CTRL (   x)    (0x0050 + (x))

◆ HMC7044_REG_OSCIN_BUF_CTRL

#define HMC7044_REG_OSCIN_BUF_CTRL   0x000E

◆ HMC7044_REG_OSCIN_PRESCALER

#define HMC7044_REG_OSCIN_PRESCALER   0x0020

◆ HMC7044_REG_OSCOUT_DRIVER_0

#define HMC7044_REG_OSCOUT_DRIVER_0   0x003A

◆ HMC7044_REG_OSCOUT_DRIVER_1

#define HMC7044_REG_OSCOUT_DRIVER_1   0x003B

◆ HMC7044_REG_OSCOUT_PATH

#define HMC7044_REG_OSCOUT_PATH   0x0039

◆ HMC7044_REG_PLL1_CP_CTRL

#define HMC7044_REG_PLL1_CP_CTRL   0x001A

◆ HMC7044_REG_PLL1_DELAY

#define HMC7044_REG_PLL1_DELAY   0x00A5

◆ HMC7044_REG_PLL1_HOLDOVER

#define HMC7044_REG_PLL1_HOLDOVER   0x00A8

◆ HMC7044_REG_PLL1_LOCK_DETECT

#define HMC7044_REG_PLL1_LOCK_DETECT   0x0028

◆ HMC7044_REG_PLL1_N_LSB

#define HMC7044_REG_PLL1_N_LSB   0x0026

◆ HMC7044_REG_PLL1_N_MSB

#define HMC7044_REG_PLL1_N_MSB   0x0027

◆ HMC7044_REG_PLL1_R_LSB

#define HMC7044_REG_PLL1_R_LSB   0x0021

◆ HMC7044_REG_PLL1_R_MSB

#define HMC7044_REG_PLL1_R_MSB   0x0022

◆ HMC7044_REG_PLL1_REF_PRIO_CTRL

#define HMC7044_REG_PLL1_REF_PRIO_CTRL   0x0014

◆ HMC7044_REG_PLL1_REF_SWITCH

#define HMC7044_REG_PLL1_REF_SWITCH   0x0029

◆ HMC7044_REG_PLL1_STATUS

#define HMC7044_REG_PLL1_STATUS   0x0082

◆ HMC7044_REG_PLL2_FREQ_DOUBLER

#define HMC7044_REG_PLL2_FREQ_DOUBLER   0x0032

◆ HMC7044_REG_PLL2_N_LSB

#define HMC7044_REG_PLL2_N_LSB   0x0035

◆ HMC7044_REG_PLL2_N_MSB

#define HMC7044_REG_PLL2_N_MSB   0x0036

◆ HMC7044_REG_PLL2_R_LSB

#define HMC7044_REG_PLL2_R_LSB   0x0033

◆ HMC7044_REG_PLL2_R_MSB

#define HMC7044_REG_PLL2_R_MSB   0x0034

◆ HMC7044_REG_PULSE_GEN

#define HMC7044_REG_PULSE_GEN   0x005A

◆ HMC7044_REG_REQ_MODE_0

#define HMC7044_REG_REQ_MODE_0   0x0001

◆ HMC7044_REG_REQ_MODE_1

#define HMC7044_REG_REQ_MODE_1   0x0002

◆ HMC7044_REG_SCRATCHPAD

#define HMC7044_REG_SCRATCHPAD   0x0008

◆ HMC7044_REG_SOFT_RESET

#define HMC7044_REG_SOFT_RESET   0x0000

◆ HMC7044_REG_SYNC

#define HMC7044_REG_SYNC   0x005B

◆ HMC7044_REG_SYSREF_TIMER_LSB

#define HMC7044_REG_SYSREF_TIMER_LSB   0x005C

◆ HMC7044_REG_SYSREF_TIMER_MSB

#define HMC7044_REG_SYSREF_TIMER_MSB   0x005D

◆ HMC7044_REG_VTUNE_PRESET

#define HMC7044_REG_VTUNE_PRESET   0x00B0

◆ HMC7044_RESEED_REQ

#define HMC7044_RESEED_REQ   NO_OS_BIT(7)

◆ HMC7044_RESTART_DIV_FSM

#define HMC7044_RESTART_DIV_FSM   NO_OS_BIT(1)

◆ HMC7044_RF_RESEEDER_EN

#define HMC7044_RF_RESEEDER_EN   NO_OS_BIT(5)

◆ HMC7044_RFSYNC_EN

#define HMC7044_RFSYNC_EN   NO_OS_BIT(4)

◆ HMC7044_SEVEN_PAIRS

#define HMC7044_SEVEN_PAIRS (   x)    ((x) & 0x7f)

◆ HMC7044_SLEEP_MODE

#define HMC7044_SLEEP_MODE   NO_OS_BIT(0)

◆ HMC7044_SLIP_REQ

#define HMC7044_SLIP_REQ   NO_OS_BIT(1)

◆ HMC7044_SOFT_RESET

#define HMC7044_SOFT_RESET   NO_OS_BIT(0)

◆ HMC7044_START_UP_MODE_DYN_EN

#define HMC7044_START_UP_MODE_DYN_EN   (NO_OS_BIT(3) | NO_OS_BIT(2))

◆ HMC7044_SYNC_EN

#define HMC7044_SYNC_EN   NO_OS_BIT(6)

◆ HMC7044_SYNC_PIN_MODE

#define HMC7044_SYNC_PIN_MODE (   x)    (((x) & 0x3) << 6)

◆ HMC7044_SYNC_POLARITY

#define HMC7044_SYNC_POLARITY   NO_OS_BIT(0)

◆ HMC7044_SYNC_REQ_STATUS

#define HMC7044_SYNC_REQ_STATUS (   x)    ((x) & 0x10)

◆ HMC7044_SYNC_RETIME

#define HMC7044_SYNC_RETIME   NO_OS_BIT(2)

◆ HMC7044_SYNC_THROUGH_PLL2

#define HMC7044_SYNC_THROUGH_PLL2   NO_OS_BIT(1)

◆ HMC7044_SYSREF_SYNC_STAT

#define HMC7044_SYSREF_SYNC_STAT (   x)    ((x) & 0x2)

◆ HMC7044_SYSREF_TIMER_EN

#define HMC7044_SYSREF_TIMER_EN   NO_OS_BIT(2)

◆ HMC7044_SYSREF_TIMER_LSB

#define HMC7044_SYSREF_TIMER_LSB (   x)    ((x) & 0xff)

◆ HMC7044_SYSREF_TIMER_MSB

#define HMC7044_SYSREF_TIMER_MSB (   x)    (((x) & 0xf00) >> 8)

◆ HMC7044_VCO_EXT

#define HMC7044_VCO_EXT   0

◆ HMC7044_VCO_HIGH

#define HMC7044_VCO_HIGH   1

◆ HMC7044_VCO_LOW

#define HMC7044_VCO_LOW   2

◆ HMC7044_VCO_SEL

#define HMC7044_VCO_SEL (   x)    (((x) & 0x3) << 3)

◆ HMC7044_VCOIN_MODE_EN

#define HMC7044_VCOIN_MODE_EN   NO_OS_BIT(5)

◆ HMC7044_WRITE

#define HMC7044_WRITE   (0 << 15)

Function Documentation

◆ hmc7044_calc_out_div()

uint32_t hmc7044_calc_out_div ( uint32_t  rate,
uint32_t  parent_rate 
)

Calculate the output channel divider.

Parameters
rate- The desired rate.
parent_rate- The parent rate.
Returns
The output divider.
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◆ hmc7044_clk_recalc_rate()

int32_t hmc7044_clk_recalc_rate ( struct hmc7044_dev *  dev,
uint32_t  chan_num,
uint64_t *  rate 
)

Recalculate rate corresponding to a channel.

Parameters
dev- The device structure.
chan_num- Channel number.
rate- Channel rate.
Returns
0 in case of success, negative error code otherwise.

◆ hmc7044_clk_round_rate()

int32_t hmc7044_clk_round_rate ( struct hmc7044_dev *  dev,
uint32_t  rate,
uint64_t *  rounded_rate 
)

Calculate closest possible rate

Parameters
dev- The device structure
rate- The desired rate.
rounded_rate- The closest possible rate of desired rate.
Returns
0 in case of success, negative error code otherwise.
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◆ hmc7044_clk_set_rate()

int32_t hmc7044_clk_set_rate ( struct hmc7044_dev *  dev,
uint32_t  chan_num,
uint64_t  rate 
)

Set channel rate.

Parameters
dev- The device structure.
chan_num- Channel number.
rate- Channel rate.
Returns
0 in case of success, negative error code otherwise.
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◆ hmc7044_init()

int32_t hmc7044_init ( struct hmc7044_dev **  device,
const struct hmc7044_init_param *  init_param 
)

Initialize the device.

Parameters
device- The device structure.
init_param- The structure that contains the device initial parameters.
Returns
0 in case of success, negative error code otherwise.
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◆ hmc7044_read()

int32_t hmc7044_read ( struct hmc7044_dev *  dev,
uint16_t  reg,
uint8_t *  val 
)

SPI register read from device.

Parameters
dev- The device structure.
reg- The register address.
val- The register data.
Returns
0 in case of success, negative error code otherwise.

◆ hmc7044_remove()

int32_t hmc7044_remove ( struct hmc7044_dev *  device)

Remove the device - release resources.

Parameters
device- The device structure.
Returns
0 in case of success, negative error code otherwise.
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◆ hmc7044_set_rate()

int32_t hmc7044_set_rate ( struct no_os_clk_desc *  desc,
uint64_t  rate 
)

Set the clock rate.

Parameters
desc- The CLK descriptor.
rate- The desired rate.
Returns
0 in case of success, negative error code otherwise.

Variable Documentation

◆ hmc7044_clk_ops

const struct no_os_clk_platform_ops hmc7044_clk_ops
Initial value:
= {
.clk_recalc_rate =&hmc7044_recalc_rate,
.clk_round_rate = &hmc7044_round_rate,
.clk_set_rate = &hmc7044_set_rate,
}

hmc7044 clock ops

hmc7044 specific CLK platform ops structure

hmc7044_set_rate
int32_t hmc7044_set_rate(struct no_os_clk_desc *desc, uint64_t rate)
Set the clock rate.
Definition: hmc7044.c:1681
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