Analog Devices JESD204 clock.
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Analog Devices JESD204 clock.
- Author
- DBogdan (drago.nosp@m.s.bo.nosp@m.gdan@.nosp@m.anal.nosp@m.og.co.nosp@m.m)
Copyright 2020(c) Analog Devices, Inc.
SPDX-License-Identifier: BSD-3-Clause
◆ jesd204_clk_disable()
| int32_t jesd204_clk_disable |
( |
struct jesd204_clk * | clk | ) |
|
Stop the clock.
- Parameters
-
| clk | - The clock structure. |
- Returns
- 0 in case of success, negative error code otherwise.
◆ jesd204_clk_enable()
Start the clock.
- Parameters
-
| clk | - The clock structure. |
- Returns
- 0 in case of success, negative error code otherwise.
◆ jesd204_clk_set_rate()
| int32_t jesd204_clk_set_rate |
( |
struct jesd204_clk * | clk, |
|
|
uint32_t | chan, |
|
|
uint32_t | rate ) |
Change the frequency of the clock.
- Parameters
-
| clk | - The clock structure. |
| chan | - The clock channel. |
| rate | - The desired frequency. |
- Returns
- 0 in case of success, negative error code otherwise.
◆ jesd204_clk_ops
Initial value:= {
.init = &jesd204_no_os_clk_init,
.clk_enable = &jesd204_no_os_clk_enable,
.clk_disable = &jesd204_no_os_clk_disable,
.clk_set_rate = &jesd204_no_os_clk_set_rate,
.remove = &jesd204_no_os_clk_remove
}
jesd204 specific CLK platform ops structure