Header file for max22516 Driver. More...

#include <stdint.h>
#include <math.h>
#include <stdbool.h>
#include "no_os_spi.h"
#include "no_os_gpio.h"
#include "no_os_util.h"

Include dependency graph for max22516.h:

Classes
struct	max22516_init_param
	MAX22516 Initialization Parameters structure. More...

struct	max22516_dev
	MAX22516 Device Descriptor. More...

Macros
#define	REG_CHIP_ID 0x00

#define	REG_REV_ID 0x01

#define	REG_IOL_STAT 0x02

#define	REG_DEV_STAT1 0x03

#define	REG_DEV_STAT2 0x04

#define	REG_ISDU_STAT 0x05

#define	REG_IOL_ERR_CNT 0x06

#define	REG_FRM_ERR_CNT 0x07

#define	REG_IOL_INT 0x08

#define	REG_DEV_INT 0x09

#define	REG_ISDU_INT 0x0A

#define	REG_IOL_INT_EN 0x0E

#define	REG_DEV_INT_EN 0x0F

#define	REG_ISDU_INT_EN 0x10

#define	REG_IOL_CFG 0x14

#define	REG_WATCHDOG 0x15

#define	REG_WDGCLR 0x16

#define	REG_MISC_CFG 0x17

#define	REG_CLK_CFG 0x18

#define	REG_CLK_TRIM 0x19

#define	REG_PG1_MSTCMD 0x1A

#define	REG_PG1_MSTCYCTM 0x1B

#define	REG_PG1_MINCYCTM 0x1C

#define	REG_PG1_MSEQCAP 0x1D

#define	REG_PG1_REVID 0x1E

#define	REG_PG1_PDIN 0x1F

#define	REG_PG1_PDOUT 0x20

#define	REG_PG1_VID1 0x21

#define	REG_PG1_VID2 0x22

#define	REG_PG1_DEVID1 0x23

#define	REG_PG1_DEVID2 0x24

#define	REG_PG1_DEVID3 0x25

#define	REG_PG1_FUNCID1 0x26

#define	REG_PG1_FUNCID2 0x27

#define	REG_PG1_RES1 0x28

#define	REG_PG1_RES2 0x29

#define	REG_WDG_EVENT 0x2A

#define	REG_STATUS_CODE_DEF 0x2B

#define	REG_STATUS_CODE 0x2C

#define	REG_EVENT_QUAL 0x2D

#define	REG_EVENT_CODE_MSB 0x2E

#define	REG_EVENT_CODE_LSB 0x2F

#define	REG_EVENT_FLAG 0x30

#define	REG_PDIN_FIFO 0x35

#define	REG_PDIN_DATA_RDY 0x36

#define	REG_PDOUT_FIFO 0x37

#define	REG_ISDU_OFFSET 0x3F

#define	REG_ISDU_INFIFO 0x40

#define	REG_ISDU_DATARDY 0x41

#define	REG_ISDU_OUTFIFO 0x42

#define	REG_ISDU_LEVEL 0x43

#define	REG_LED1_CTRL_MSB 0x50

#define	REG_LED1_CTRL_LSB 0x51

#define	REG_LED2_CTRL_MSB 0x52

#define	REG_LED2_CTRL_LSB 0x53

#define	REG_GPIO1_CTRL 0x54

#define	REG_GPIO2_CTRL 0x55

#define	REG_CQ_CTRL1 0x56

#define	REG_CQ_CTRL2 0x57

#define	REG_DO_CTRL1 0x58

#define	REG_DO_CTRL2 0x59

#define	REG_TX_CTRL 0x5A

#define	REG_RX_CTRL 0x5B

#define	REG_MISC_CTRL 0x5C

#define	DEV_STAT2_SET_DOFAULT NO_OS_BIT(5)

#define	DEV_STAT2_SET_CQFAULT NO_OS_BIT(4)

#define	DEV_STAT2_SET_V24ERR NO_OS_BIT(3)

#define	DEV_STAT2_SET_VMWERR NO_OS_BIT(2)

#define	DEV_STAT2_SET_THWARN NO_OS_BIT(1)

#define	DEV_STAT2_SET_TSHD NO_OS_BIT(0)

#define	BIT_CQCTRL1_CQ_SLEW0 0x00

#define	BIT_CQCTRL1_CQ_SLEW1 NO_OS_BIT(6)

#define	BIT_CQCTRL1_CQ_SLEW2 NO_OS_BIT(7)

#define	BIT_CQCTRL1_CQ_SLEW3 NO_OS_GENMASK(7, 6)

#define	BIT_CQCTRL1_CQ_PD NO_OS_BIT(5)

#define	BIT_CQCTRL1_CQ_PU NO_OS_BIT(4)

#define	BIT_CQCTRL1_CQ_NPN NO_OS_BIT(3)

#define	BIT_CQCTRL1_CQ_PP NO_OS_BIT(2)

#define	BIT_CQCTRL1_CQ_INV NO_OS_BIT(1)

#define	BIT_CQCTRL1_CQ_EN NO_OS_BIT(0)

#define	BIT_CQ_CL_50MA 0x00

#define	BIT_CQ_CL_100MA NO_OS_BIT(6)

#define	BIT_CQ_CL_200MA NO_OS_BIT(7)

#define	BIT_CQ_CL_250MA NO_OS_GENMASK(7, 6)

#define	BIT_CQ_CLBL_128US 0x00

#define	BIT_CQ_CLBL_500US NO_OS_BIT(3)

#define	BIT_CQ_CLBL_1000US NO_OS_BIT(4)

#define	BIT_CQ_CLBL_5000US NO_OS_GENMASK(4, 3)

#define	BIT_CQ_AUTORTY_TIME_50MS 0x00

#define	BIT_CQ_AUTORTY_TIME_100MS NO_OS_BIT(1)

#define	BIT_CQ_AUTORTY_TIME_200MS NO_OS_BIT(2)

#define	BIT_CQ_AUTORTY_TIME_500MS NO_OS_GENMASK(2, 1)

#define	BIT_CQ_AUTORTY NO_OS_BIT(0)

#define	BIT_DOCTRL1_DO_SLEW0 0x00

#define	BIT_DOCTRL1_DO_SLEW1 NO_OS_BIT(6)

#define	BIT_DOCTRL1_DO_SLEW2 NO_OS_BIT(7)

#define	BIT_DOCTRL1_DO_SLEW3 NO_OS_GENMASK(7, 6)

#define	BIT_DOCTRL1_DO_PD NO_OS_BIT(5)

#define	BIT_DOCTRL1_DO_PU NO_OS_BIT(4)

#define	BIT_DOCTRL1_DO_NPN NO_OS_BIT(3)

#define	BIT_DOCTRL1_DO_PP NO_OS_BIT(2)

#define	BIT_DOCTRL1_DO_INV NO_OS_BIT(1)

#define	BIT_DOCTRL1_DO_EN NO_OS_BIT(0)

#define	BIT_DO_CL_50MA 0x00

#define	BIT_DO_CL_100MA NO_OS_BIT(6)

#define	BIT_DO_CL_200MA NO_OS_BIT(7)

#define	BIT_DO_CL_250MA NO_OS_GENMASK(7, 6)

#define	BIT_DO_CLBL_128US 0x00

#define	BIT_DO_CLBL_500US NO_OS_BIT(3)

#define	BIT_DO_CLBL_1000US NO_OS_BIT(4)

#define	BIT_DO_CLBL_5000US NO_OS_GENMASK(4, 3)

#define	BIT_DO_AUTORTY_TIME_50MS 0x00

#define	BIT_DO_AUTORTY_TIME_100MS NO_OS_BIT(1)

#define	BIT_DO_AUTORTY_TIME_200MS NO_OS_BIT(2)

#define	BIT_DO_AUTORTY_TIME_500MS NO_OS_GENMASK(2, 1)

#define	BIT_DO_AUTORTY NO_OS_BIT(0)

#define	BIT_TXC_CQTX NO_OS_BIT(7)

#define	BIT_TXC_CQTXEN NO_OS_BIT(6)

#define	BIT_TXC_CQDRVSEL NO_OS_BIT(5)

#define	BIT_TXC_DOTX NO_OS_BIT(4)

#define	BIT_TXC_DODRVSEL NO_OS_BIT(3)

#define	BIT_TXC_CQDOPAR NO_OS_BIT(1)

#define	BIT_TXC_DO_AV NO_OS_BIT(0)

#define	DEV_STAT2_SET_V24ERR NO_OS_BIT(3)

#define	DEV_STAT2_SET_VMERR NO_OS_BIT(2)

#define	DEV_STAT2_SET_THWARN NO_OS_BIT(1)

#define	DEV_STAT2_SET_TSHD NO_OS_BIT(0)

#define	EVF_EVENT_FLG NO_OS_BIT(0)

#define	REG_EVENT_CODE_MSB_MSK NO_OS_GENMASK(15, 8)

#define	REG_EVENT_CODE_LSB_MSK NO_OS_GENMASK(7, 0)

#define	PG1_VID1_MSK NO_OS_GENMASK(15, 8)

#define	PG1_VID2_MSK NO_OS_GENMASK(7, 0)

#define	PG1_DEVID1_MSK NO_OS_GENMASK(23, 16)

#define	PG1_DEVID2_MSK NO_OS_GENMASK(15, 8)

#define	PG1_DEVID3_MSK NO_OS_GENMASK(7, 0)

#define	PG1_FUNCID1_MSB_MSK NO_OS_GENMASK(15, 8)

#define	PG1_FUNCID1_LSB_MSK NO_OS_GENMASK(7, 0)

#define	REG_LED1_CTRL_MSB_MSK NO_OS_GENMASK(15, 8)

#define	REG_LED1_CTRL_LSB_MSK NO_OS_GENMASK(7, 0)

#define	REG_LED2_CTRL_MSB_MSK NO_OS_GENMASK(15, 8)

#define	REG_LED2_CTRL_LSB_MSK NO_OS_GENMASK(7, 0)

#define	MAX22516_SPI_DUMMY_DATA 0x00

#define	MAX22516_BUFF_SIZE_BYTES 64

#define	MAX22516_SPI_READ_CMD NO_OS_BIT(7)

Functions
int	max22516_write (struct max22516_dev *dev, uint8_t reg_addr, uint8_t data)
	Writes data to max22516 over SPI.

int	max22516_read (struct max22516_dev dev, uint8_t reg_addr, uint8_t data)
	Reads data from max22516 over SPI.

int	max22516_update (struct max22516_dev *dev, uint8_t reg_addr, uint8_t mask, uint8_t data)
	Update MAX22516 register.

int	max22516_burst_write_register (struct max22516_dev dev, uint8_t reg_addr, uint8_t count, uint8_t data)
	MAX22516 burst write.

int	max22516_burst_read_register (struct max22516_dev dev, uint8_t reg_addr, uint8_t count, uint8_t data)
	MAX22516 burst read.

void	max22516_build_tcyc (int16_t t, uint8_t *tmr)
	MAX22516 build tcyc.

void	max22516_rebuild_min_cyct_to_us (int16_t t, uint32_t *tmr)
	MAX22516 rebuild min cyct to microseconds.

int	max22516_set_min_ctmr (struct max22516_dev *dev, uint16_t min_t)
	MAX22516 set min ctmr.

int	max22516_set_id (struct max22516_dev *dev, uint16_t vid, uint32_t id, uint16_t fid)
	MAX22516 set id.

void	max22516_decode_tcyc (uint8_t tmr, int16_t *t)
	MAX22516 decode tcyc.

int	max22516_get_mst_ctmr (struct max22516_dev dev, uint16_t min_t, int16_t c_tmr)
	MAX22516 get mst ctmr.

int	max22516_get_dl_mode (struct max22516_dev dev, uint8_t mode)
	MAX22516 get dl mode.

int	max22516_get_iol_err_cnt (struct max22516_dev dev, uint8_t cnt)
	MAX22516 get iol err cnt.

int	max22516_get_frm_err_cnt (struct max22516_dev dev, uint8_t cnt)
	MAX22516 get frm err cnt.

int	max22516_clr_iol_err_cnt (struct max22516_dev *dev)
	MAX22516 clr iol err cnt.

int	max22516_clr_frm_err_cnt (struct max22516_dev *dev)
	MAX22516 clr frm err cnt.

int	max22516_set_led1 (struct max22516_dev *dev, uint16_t ltmr)
	MAX22516 set led1.

int	max22516_set_led2 (struct max22516_dev *dev, uint16_t ltmr)
	MAX22516 set led2.

int	max22516_get_v24 (struct max22516_dev dev, uint8_t status3)
	MAX22516 get v24.

int	max22516_get_thd (struct max22516_dev dev, uint8_t status3)
	MAX22516 get THD.

int	max22516_setup_cq_dis (struct max22516_dev *dev)
	MAX22516 setup cq dis.

int	max22516_setup_cq_pp (struct max22516_dev *dev)
	MAX22516 setup cq pp.

int	max22516_setup_cq_pnp (struct max22516_dev *dev)
	MAX22516 setup cq pnp.

int	max22516_setup_cq_npn (struct max22516_dev *dev)
	MAX22516 setup cq npn.

int	max22516_tx_set (struct max22516_dev *dev, uint8_t low_high)
	MAX22516 tx set.

int	max22516_txen_set (struct max22516_dev *dev, uint8_t lvl)
	MAX22516 txen set.

int	max22516_set_cq (struct max22516_dev *dev, uint8_t lvl)
	MAX22516 set cq.

int	max22516_tx_get (struct max22516_dev dev, uint8_t low_high)
	MAX22516 tx get.

int	max22516_get_cq (struct max22516_dev dev, uint8_t cq)
	MAX22516 get cq.

int	max22516_get_cq_stat (struct max22516_dev dev, uint8_t status3)
	MAX22516 get cq stat.

int	max22516_setup_do_dis (struct max22516_dev *dev)
	MAX22516 setup do dis.

int	max22516_setup_do_pp (struct max22516_dev *dev)
	MAX22516 setup do pp.

int	max22516_setup_do_pnp (struct max22516_dev *dev)
	MAX22516 setup do pnp.

int	max22516_setup_do_npn (struct max22516_dev *dev)
	MAX22516 setup do npn.

int	max22516_do_set (struct max22516_dev *dev, uint8_t lvl)
	MAX22516 do set.

int	max22516_do_get (struct max22516_dev dev, uint8_t lvl)
	MAX22516 do get.

int	max22516_get_do_stat (struct max22516_dev dev, uint8_t status3)
	MAX22516 get do stat.

int	max22516_set_event (struct max22516_dev *dev, uint8_t ev_qual, uint16_t ev_code)
	MAX22516 set event.

int	max22516_setup_watchdog (struct max22516_dev *dev, uint8_t wd_timeout, uint8_t wd_clr, uint8_t wd_event_en, uint8_t wd_event_flag)
	MAX22516 setup watchdog.

int	max22516_init (struct max22516_dev *device, struct max22516_init_param init_param)
	Initialize the MAX22516 device.

int	max22516_remove (struct max22516_dev *dev)
	Free resoulces allocated for MAX22516.

Detailed Description

Header file for max22516 Driver.

Author: Antoniu Miclaus (anton.nosp@m.iu.m.nosp@m.iclau.nosp@m.s@an.nosp@m.alog..nosp@m.com)

SPDX-License-Identifier: BSD-3-Clause

Macro Definition Documentation

◆ BIT_CQ_AUTORTY

#define BIT_CQ_AUTORTY NO_OS_BIT(0)

◆ BIT_CQ_AUTORTY_TIME_100MS

#define BIT_CQ_AUTORTY_TIME_100MS NO_OS_BIT(1)

◆ BIT_CQ_AUTORTY_TIME_200MS

#define BIT_CQ_AUTORTY_TIME_200MS NO_OS_BIT(2)

◆ BIT_CQ_AUTORTY_TIME_500MS

#define BIT_CQ_AUTORTY_TIME_500MS NO_OS_GENMASK(2, 1)

◆ BIT_CQ_AUTORTY_TIME_50MS

#define BIT_CQ_AUTORTY_TIME_50MS 0x00

◆ BIT_CQ_CL_100MA

#define BIT_CQ_CL_100MA NO_OS_BIT(6)

◆ BIT_CQ_CL_200MA

#define BIT_CQ_CL_200MA NO_OS_BIT(7)

◆ BIT_CQ_CL_250MA

#define BIT_CQ_CL_250MA NO_OS_GENMASK(7, 6)

◆ BIT_CQ_CL_50MA

#define BIT_CQ_CL_50MA 0x00

◆ BIT_CQ_CLBL_1000US

#define BIT_CQ_CLBL_1000US NO_OS_BIT(4)

◆ BIT_CQ_CLBL_128US

#define BIT_CQ_CLBL_128US 0x00

◆ BIT_CQ_CLBL_5000US

#define BIT_CQ_CLBL_5000US NO_OS_GENMASK(4, 3)

◆ BIT_CQ_CLBL_500US

#define BIT_CQ_CLBL_500US NO_OS_BIT(3)

◆ BIT_CQCTRL1_CQ_EN

#define BIT_CQCTRL1_CQ_EN NO_OS_BIT(0)

◆ BIT_CQCTRL1_CQ_INV

#define BIT_CQCTRL1_CQ_INV NO_OS_BIT(1)

◆ BIT_CQCTRL1_CQ_NPN

#define BIT_CQCTRL1_CQ_NPN NO_OS_BIT(3)

◆ BIT_CQCTRL1_CQ_PD

#define BIT_CQCTRL1_CQ_PD NO_OS_BIT(5)

◆ BIT_CQCTRL1_CQ_PP

#define BIT_CQCTRL1_CQ_PP NO_OS_BIT(2)

◆ BIT_CQCTRL1_CQ_PU

#define BIT_CQCTRL1_CQ_PU NO_OS_BIT(4)

◆ BIT_CQCTRL1_CQ_SLEW0

#define BIT_CQCTRL1_CQ_SLEW0 0x00

◆ BIT_CQCTRL1_CQ_SLEW1

#define BIT_CQCTRL1_CQ_SLEW1 NO_OS_BIT(6)

◆ BIT_CQCTRL1_CQ_SLEW2

#define BIT_CQCTRL1_CQ_SLEW2 NO_OS_BIT(7)

◆ BIT_CQCTRL1_CQ_SLEW3

#define BIT_CQCTRL1_CQ_SLEW3 NO_OS_GENMASK(7, 6)

◆ BIT_DO_AUTORTY

#define BIT_DO_AUTORTY NO_OS_BIT(0)

◆ BIT_DO_AUTORTY_TIME_100MS

#define BIT_DO_AUTORTY_TIME_100MS NO_OS_BIT(1)

◆ BIT_DO_AUTORTY_TIME_200MS

#define BIT_DO_AUTORTY_TIME_200MS NO_OS_BIT(2)

◆ BIT_DO_AUTORTY_TIME_500MS

#define BIT_DO_AUTORTY_TIME_500MS NO_OS_GENMASK(2, 1)

◆ BIT_DO_AUTORTY_TIME_50MS

#define BIT_DO_AUTORTY_TIME_50MS 0x00

◆ BIT_DO_CL_100MA

#define BIT_DO_CL_100MA NO_OS_BIT(6)

◆ BIT_DO_CL_200MA

#define BIT_DO_CL_200MA NO_OS_BIT(7)

◆ BIT_DO_CL_250MA

#define BIT_DO_CL_250MA NO_OS_GENMASK(7, 6)

◆ BIT_DO_CL_50MA

#define BIT_DO_CL_50MA 0x00

◆ BIT_DO_CLBL_1000US

#define BIT_DO_CLBL_1000US NO_OS_BIT(4)

◆ BIT_DO_CLBL_128US

#define BIT_DO_CLBL_128US 0x00

◆ BIT_DO_CLBL_5000US

#define BIT_DO_CLBL_5000US NO_OS_GENMASK(4, 3)

◆ BIT_DO_CLBL_500US

#define BIT_DO_CLBL_500US NO_OS_BIT(3)

◆ BIT_DOCTRL1_DO_EN

#define BIT_DOCTRL1_DO_EN NO_OS_BIT(0)

◆ BIT_DOCTRL1_DO_INV

#define BIT_DOCTRL1_DO_INV NO_OS_BIT(1)

◆ BIT_DOCTRL1_DO_NPN

#define BIT_DOCTRL1_DO_NPN NO_OS_BIT(3)

◆ BIT_DOCTRL1_DO_PD

#define BIT_DOCTRL1_DO_PD NO_OS_BIT(5)

◆ BIT_DOCTRL1_DO_PP

#define BIT_DOCTRL1_DO_PP NO_OS_BIT(2)

◆ BIT_DOCTRL1_DO_PU

#define BIT_DOCTRL1_DO_PU NO_OS_BIT(4)

◆ BIT_DOCTRL1_DO_SLEW0

#define BIT_DOCTRL1_DO_SLEW0 0x00

◆ BIT_DOCTRL1_DO_SLEW1

#define BIT_DOCTRL1_DO_SLEW1 NO_OS_BIT(6)

◆ BIT_DOCTRL1_DO_SLEW2

#define BIT_DOCTRL1_DO_SLEW2 NO_OS_BIT(7)

◆ BIT_DOCTRL1_DO_SLEW3

#define BIT_DOCTRL1_DO_SLEW3 NO_OS_GENMASK(7, 6)

◆ BIT_TXC_CQDOPAR

#define BIT_TXC_CQDOPAR NO_OS_BIT(1)

◆ BIT_TXC_CQDRVSEL

#define BIT_TXC_CQDRVSEL NO_OS_BIT(5)

◆ BIT_TXC_CQTX

#define BIT_TXC_CQTX NO_OS_BIT(7)

◆ BIT_TXC_CQTXEN

#define BIT_TXC_CQTXEN NO_OS_BIT(6)

◆ BIT_TXC_DO_AV

#define BIT_TXC_DO_AV NO_OS_BIT(0)

◆ BIT_TXC_DODRVSEL

#define BIT_TXC_DODRVSEL NO_OS_BIT(3)

◆ BIT_TXC_DOTX

#define BIT_TXC_DOTX NO_OS_BIT(4)

◆ DEV_STAT2_SET_CQFAULT

#define DEV_STAT2_SET_CQFAULT NO_OS_BIT(4)

◆ DEV_STAT2_SET_DOFAULT

#define DEV_STAT2_SET_DOFAULT NO_OS_BIT(5)

◆ DEV_STAT2_SET_THWARN [1/2]

#define DEV_STAT2_SET_THWARN NO_OS_BIT(1)

◆ DEV_STAT2_SET_THWARN [2/2]

#define DEV_STAT2_SET_THWARN NO_OS_BIT(1)

◆ DEV_STAT2_SET_TSHD [1/2]

#define DEV_STAT2_SET_TSHD NO_OS_BIT(0)

◆ DEV_STAT2_SET_TSHD [2/2]

#define DEV_STAT2_SET_TSHD NO_OS_BIT(0)

◆ DEV_STAT2_SET_V24ERR [1/2]

#define DEV_STAT2_SET_V24ERR NO_OS_BIT(3)

◆ DEV_STAT2_SET_V24ERR [2/2]

#define DEV_STAT2_SET_V24ERR NO_OS_BIT(3)

◆ DEV_STAT2_SET_VMERR

#define DEV_STAT2_SET_VMERR NO_OS_BIT(2)

◆ DEV_STAT2_SET_VMWERR

#define DEV_STAT2_SET_VMWERR NO_OS_BIT(2)

◆ EVF_EVENT_FLG

#define EVF_EVENT_FLG NO_OS_BIT(0)

◆ MAX22516_BUFF_SIZE_BYTES

#define MAX22516_BUFF_SIZE_BYTES 64

◆ MAX22516_SPI_DUMMY_DATA

#define MAX22516_SPI_DUMMY_DATA 0x00

◆ MAX22516_SPI_READ_CMD

#define MAX22516_SPI_READ_CMD NO_OS_BIT(7)

◆ PG1_DEVID1_MSK

#define PG1_DEVID1_MSK NO_OS_GENMASK(23, 16)

◆ PG1_DEVID2_MSK

#define PG1_DEVID2_MSK NO_OS_GENMASK(15, 8)

◆ PG1_DEVID3_MSK

#define PG1_DEVID3_MSK NO_OS_GENMASK(7, 0)

◆ PG1_FUNCID1_LSB_MSK

#define PG1_FUNCID1_LSB_MSK NO_OS_GENMASK(7, 0)

◆ PG1_FUNCID1_MSB_MSK

#define PG1_FUNCID1_MSB_MSK NO_OS_GENMASK(15, 8)

◆ PG1_VID1_MSK

#define PG1_VID1_MSK NO_OS_GENMASK(15, 8)

◆ PG1_VID2_MSK

#define PG1_VID2_MSK NO_OS_GENMASK(7, 0)

◆ REG_CHIP_ID

#define REG_CHIP_ID 0x00

◆ REG_CLK_CFG

#define REG_CLK_CFG 0x18

◆ REG_CLK_TRIM

#define REG_CLK_TRIM 0x19

◆ REG_CQ_CTRL1

#define REG_CQ_CTRL1 0x56

◆ REG_CQ_CTRL2

#define REG_CQ_CTRL2 0x57

◆ REG_DEV_INT

#define REG_DEV_INT 0x09

◆ REG_DEV_INT_EN

#define REG_DEV_INT_EN 0x0F

◆ REG_DEV_STAT1

#define REG_DEV_STAT1 0x03

◆ REG_DEV_STAT2

#define REG_DEV_STAT2 0x04

◆ REG_DO_CTRL1

#define REG_DO_CTRL1 0x58

◆ REG_DO_CTRL2

#define REG_DO_CTRL2 0x59

◆ REG_EVENT_CODE_LSB

#define REG_EVENT_CODE_LSB 0x2F

◆ REG_EVENT_CODE_LSB_MSK

#define REG_EVENT_CODE_LSB_MSK NO_OS_GENMASK(7, 0)

◆ REG_EVENT_CODE_MSB

#define REG_EVENT_CODE_MSB 0x2E

◆ REG_EVENT_CODE_MSB_MSK

#define REG_EVENT_CODE_MSB_MSK NO_OS_GENMASK(15, 8)

◆ REG_EVENT_FLAG

#define REG_EVENT_FLAG 0x30

◆ REG_EVENT_QUAL

#define REG_EVENT_QUAL 0x2D

◆ REG_FRM_ERR_CNT

#define REG_FRM_ERR_CNT 0x07

◆ REG_GPIO1_CTRL

#define REG_GPIO1_CTRL 0x54

◆ REG_GPIO2_CTRL

#define REG_GPIO2_CTRL 0x55

◆ REG_IOL_CFG

#define REG_IOL_CFG 0x14

◆ REG_IOL_ERR_CNT

#define REG_IOL_ERR_CNT 0x06

◆ REG_IOL_INT

#define REG_IOL_INT 0x08

◆ REG_IOL_INT_EN

#define REG_IOL_INT_EN 0x0E

◆ REG_IOL_STAT

#define REG_IOL_STAT 0x02

◆ REG_ISDU_DATARDY

#define REG_ISDU_DATARDY 0x41

◆ REG_ISDU_INFIFO

#define REG_ISDU_INFIFO 0x40

◆ REG_ISDU_INT

#define REG_ISDU_INT 0x0A

◆ REG_ISDU_INT_EN

#define REG_ISDU_INT_EN 0x10

◆ REG_ISDU_LEVEL

#define REG_ISDU_LEVEL 0x43

◆ REG_ISDU_OFFSET

#define REG_ISDU_OFFSET 0x3F

◆ REG_ISDU_OUTFIFO

#define REG_ISDU_OUTFIFO 0x42

◆ REG_ISDU_STAT

#define REG_ISDU_STAT 0x05

◆ REG_LED1_CTRL_LSB

#define REG_LED1_CTRL_LSB 0x51

◆ REG_LED1_CTRL_LSB_MSK

#define REG_LED1_CTRL_LSB_MSK NO_OS_GENMASK(7, 0)

◆ REG_LED1_CTRL_MSB

#define REG_LED1_CTRL_MSB 0x50

◆ REG_LED1_CTRL_MSB_MSK

#define REG_LED1_CTRL_MSB_MSK NO_OS_GENMASK(15, 8)

◆ REG_LED2_CTRL_LSB

#define REG_LED2_CTRL_LSB 0x53

◆ REG_LED2_CTRL_LSB_MSK

#define REG_LED2_CTRL_LSB_MSK NO_OS_GENMASK(7, 0)

◆ REG_LED2_CTRL_MSB

#define REG_LED2_CTRL_MSB 0x52

◆ REG_LED2_CTRL_MSB_MSK

#define REG_LED2_CTRL_MSB_MSK NO_OS_GENMASK(15, 8)

◆ REG_MISC_CFG

#define REG_MISC_CFG 0x17

◆ REG_MISC_CTRL

#define REG_MISC_CTRL 0x5C

◆ REG_PDIN_DATA_RDY

#define REG_PDIN_DATA_RDY 0x36

◆ REG_PDIN_FIFO

#define REG_PDIN_FIFO 0x35

◆ REG_PDOUT_FIFO

#define REG_PDOUT_FIFO 0x37

◆ REG_PG1_DEVID1

#define REG_PG1_DEVID1 0x23

◆ REG_PG1_DEVID2

#define REG_PG1_DEVID2 0x24

◆ REG_PG1_DEVID3

#define REG_PG1_DEVID3 0x25

◆ REG_PG1_FUNCID1

#define REG_PG1_FUNCID1 0x26

◆ REG_PG1_FUNCID2

#define REG_PG1_FUNCID2 0x27

◆ REG_PG1_MINCYCTM

#define REG_PG1_MINCYCTM 0x1C

◆ REG_PG1_MSEQCAP

#define REG_PG1_MSEQCAP 0x1D

◆ REG_PG1_MSTCMD

#define REG_PG1_MSTCMD 0x1A

◆ REG_PG1_MSTCYCTM

#define REG_PG1_MSTCYCTM 0x1B

◆ REG_PG1_PDIN

#define REG_PG1_PDIN 0x1F

◆ REG_PG1_PDOUT

#define REG_PG1_PDOUT 0x20

◆ REG_PG1_RES1

#define REG_PG1_RES1 0x28

◆ REG_PG1_RES2

#define REG_PG1_RES2 0x29

◆ REG_PG1_REVID

#define REG_PG1_REVID 0x1E

◆ REG_PG1_VID1

#define REG_PG1_VID1 0x21

◆ REG_PG1_VID2

#define REG_PG1_VID2 0x22

◆ REG_REV_ID

#define REG_REV_ID 0x01

◆ REG_RX_CTRL

#define REG_RX_CTRL 0x5B

◆ REG_STATUS_CODE

#define REG_STATUS_CODE 0x2C

◆ REG_STATUS_CODE_DEF

#define REG_STATUS_CODE_DEF 0x2B

◆ REG_TX_CTRL

#define REG_TX_CTRL 0x5A

◆ REG_WATCHDOG

#define REG_WATCHDOG 0x15

◆ REG_WDG_EVENT

#define REG_WDG_EVENT 0x2A

◆ REG_WDGCLR

#define REG_WDGCLR 0x16

Function Documentation

◆ max22516_build_tcyc()

void max22516_build_tcyc	(	int16_t	t,
		uint8_t *	tmr )

MAX22516 build tcyc.

Parameters

t
tmr

◆ max22516_burst_read_register()

int max22516_burst_read_register	(	struct max22516_dev *	dev,
		uint8_t	reg_addr,
		uint8_t	count,
		uint8_t *	data )

MAX22516 burst read.

Parameters

dev	- The device structure.
reg_addr	- The register address.
count	- Nr. of bytes to be read.
data	- Data read from the device.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_burst_write_register()

int max22516_burst_write_register	(	struct max22516_dev *	dev,
		uint8_t	reg_addr,
		uint8_t	count,
		uint8_t *	data )

MAX22516 burst write.

Parameters

dev	- The device structure.
reg_addr	- The register address.
count	- Nr. of bytes to be written.
data	- Data to be written.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_clr_frm_err_cnt()

int max22516_clr_frm_err_cnt ( struct max22516_dev * dev )

MAX22516 clr frm err cnt.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_clr_iol_err_cnt()

int max22516_clr_iol_err_cnt ( struct max22516_dev * dev )

MAX22516 clr iol err cnt.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_decode_tcyc()

void max22516_decode_tcyc	(	uint8_t	tmr,
		int16_t *	t )

MAX22516 decode tcyc.

Parameters

t
tmr

◆ max22516_do_get()

int max22516_do_get	(	struct max22516_dev *	dev,
		uint8_t *	lvl )

MAX22516 do get.

Parameters

dev	- The device structure.
lvl

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_do_set()

int max22516_do_set	(	struct max22516_dev *	dev,
		uint8_t	lvl )

MAX22516 do set.

Parameters

dev	- The device structure.
lvl

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_get_cq()

int max22516_get_cq	(	struct max22516_dev *	dev,
		uint8_t *	cq )

MAX22516 get cq.

Parameters

dev	- The device structure.
cq

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_get_cq_stat()

int max22516_get_cq_stat	(	struct max22516_dev *	dev,
		uint8_t *	status3 )

MAX22516 get cq stat.

Parameters

dev	- The device structure.
status3

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_get_dl_mode()

int max22516_get_dl_mode	(	struct max22516_dev *	dev,
		uint8_t *	mode )

MAX22516 get dl mode.

Parameters

dev	- The device structure.
mode

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_get_do_stat()

int max22516_get_do_stat	(	struct max22516_dev *	dev,
		uint8_t *	status3 )

MAX22516 get do stat.

Parameters

dev	- The device structure.
status3

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_get_frm_err_cnt()

int max22516_get_frm_err_cnt	(	struct max22516_dev *	dev,
		uint8_t *	cnt )

MAX22516 get frm err cnt.

Parameters

dev	- The device structure.
cnt

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_get_iol_err_cnt()

int max22516_get_iol_err_cnt	(	struct max22516_dev *	dev,
		uint8_t *	cnt )

MAX22516 get iol err cnt.

Parameters

dev	- The device structure.
cnt

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_get_mst_ctmr()

int max22516_get_mst_ctmr	(	struct max22516_dev *	dev,
		uint16_t	min_t,
		int16_t *	c_tmr )

MAX22516 get mst ctmr.

Parameters

dev	- The device structure.
min_t
c_tmr

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_get_thd()

int max22516_get_thd	(	struct max22516_dev *	dev,
		uint8_t *	status3 )

MAX22516 get THD.

Parameters

dev	- The device structure.
status3

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_get_v24()

int max22516_get_v24	(	struct max22516_dev *	dev,
		uint8_t *	status3 )

MAX22516 get v24.

Parameters

dev	- The device structure.
status3

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_init()

int max22516_init	(	struct max22516_dev **	device,
		struct max22516_init_param *	init_param )

Initialize the MAX22516 device.

Parameters

device	- The device structure.
init_param	- The structure containing the device initial parameters.

Returns: Returns 0 in case of success or negative error code.

◆ max22516_read()

int max22516_read	(	struct max22516_dev *	dev,
		uint8_t	reg_addr,
		uint8_t *	data )

Reads data from max22516 over SPI.

Parameters

dev	- The device structure.
reg_addr	- The register address.
data	- Data read from the device.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_rebuild_min_cyct_to_us()

void max22516_rebuild_min_cyct_to_us	(	int16_t	t,
		uint32_t *	tmr )

MAX22516 rebuild min cyct to microseconds.

Parameters

t
tmr

◆ max22516_remove()

int max22516_remove ( struct max22516_dev * dev )

Free resoulces allocated for MAX22516.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code.

◆ max22516_set_cq()

int max22516_set_cq	(	struct max22516_dev *	dev,
		uint8_t	lvl )

MAX22516 set cq.

Parameters

dev	- The device structure.
lvl

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_set_event()

int max22516_set_event	(	struct max22516_dev *	dev,
		uint8_t	ev_qual,
		uint16_t	ev_code )

MAX22516 set event.

Parameters

dev	- The device structure.
ev_qual
ev_code

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_set_id()

int max22516_set_id	(	struct max22516_dev *	dev,
		uint16_t	vid,
		uint32_t	id,
		uint16_t	fid )

MAX22516 set id.

Parameters

dev	- The device structure.
vid
id
fid

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_set_led1()

int max22516_set_led1	(	struct max22516_dev *	dev,
		uint16_t	ltmr )

MAX22516 set led1.

Parameters

dev	- The device structure.
ltmr

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_set_led2()

int max22516_set_led2	(	struct max22516_dev *	dev,
		uint16_t	ltmr )

MAX22516 set led2.

Parameters

dev	- The device structure.
ltmr

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_set_min_ctmr()

int max22516_set_min_ctmr	(	struct max22516_dev *	dev,
		uint16_t	min_t )

MAX22516 set min ctmr.

Parameters

dev	- The device structure.
min_t

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_setup_cq_dis()

int max22516_setup_cq_dis ( struct max22516_dev * dev )

MAX22516 setup cq dis.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_setup_cq_npn()

int max22516_setup_cq_npn ( struct max22516_dev * dev )

MAX22516 setup cq npn.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_setup_cq_pnp()

int max22516_setup_cq_pnp ( struct max22516_dev * dev )

MAX22516 setup cq pnp.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_setup_cq_pp()

int max22516_setup_cq_pp ( struct max22516_dev * dev )

MAX22516 setup cq pp.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_setup_do_dis()

int max22516_setup_do_dis ( struct max22516_dev * dev )

MAX22516 setup do dis.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_setup_do_npn()

int max22516_setup_do_npn ( struct max22516_dev * dev )

MAX22516 setup do npn.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_setup_do_pnp()

int max22516_setup_do_pnp ( struct max22516_dev * dev )

MAX22516 setup do pnp.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_setup_do_pp()

int max22516_setup_do_pp ( struct max22516_dev * dev )

MAX22516 setup do pp.

Parameters

dev	- The device structure.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_setup_watchdog()

int max22516_setup_watchdog	(	struct max22516_dev *	dev,
		uint8_t	wd_timeout,
		uint8_t	wd_clr,
		uint8_t	wd_event_en,
		uint8_t	wd_event_flag )

MAX22516 setup watchdog.

Parameters

dev	- The device structure.
wd_timeout
wd_clr
wd_event_en
wd_event_flag

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_tx_get()

int max22516_tx_get	(	struct max22516_dev *	dev,
		uint8_t *	low_high )

MAX22516 tx get.

Parameters

dev	- The device structure.
low_high	- TX level

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_tx_set()

int max22516_tx_set	(	struct max22516_dev *	dev,
		uint8_t	low_high )

MAX22516 tx set.

Parameters

dev	- The device structure.
low_high

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_txen_set()

int max22516_txen_set	(	struct max22516_dev *	dev,
		uint8_t	lvl )

MAX22516 txen set.

Parameters

dev	- The device structure.
lvl

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_update()

int max22516_update	(	struct max22516_dev *	dev,
		uint8_t	reg_addr,
		uint8_t	mask,
		uint8_t	data )

Update MAX22516 register.

Parameters

dev	- The device structure.
reg_addr	- The register address.
mask	- Mask for specific register bits to be updated.
data	- Data read from the device.

Returns: Returns 0 in case of success or negative error code otherwise.

◆ max22516_write()

int max22516_write	(	struct max22516_dev *	dev,
		uint8_t	reg_addr,
		uint8_t	data )

Writes data to max22516 over SPI.

Parameters

dev	- The device structure.
reg_addr	- The register address.
data	- Data value to write.

Returns: Returns 0 in case of success or negative error code otherwise.

Classes

Macros

Functions

Detailed Description

Macro Definition Documentation

◆ BIT_CQ_AUTORTY

◆ BIT_CQ_AUTORTY_TIME_100MS

◆ BIT_CQ_AUTORTY_TIME_200MS

◆ BIT_CQ_AUTORTY_TIME_500MS

◆ BIT_CQ_AUTORTY_TIME_50MS

◆ BIT_CQ_CL_100MA

◆ BIT_CQ_CL_200MA

◆ BIT_CQ_CL_250MA

◆ BIT_CQ_CL_50MA

◆ BIT_CQ_CLBL_1000US

◆ BIT_CQ_CLBL_128US

◆ BIT_CQ_CLBL_5000US

◆ BIT_CQ_CLBL_500US

◆ BIT_CQCTRL1_CQ_EN

◆ BIT_CQCTRL1_CQ_INV

◆ BIT_CQCTRL1_CQ_NPN

◆ BIT_CQCTRL1_CQ_PD

◆ BIT_CQCTRL1_CQ_PP

◆ BIT_CQCTRL1_CQ_PU

◆ BIT_CQCTRL1_CQ_SLEW0

◆ BIT_CQCTRL1_CQ_SLEW1

◆ BIT_CQCTRL1_CQ_SLEW2

◆ BIT_CQCTRL1_CQ_SLEW3

◆ BIT_DO_AUTORTY

◆ BIT_DO_AUTORTY_TIME_100MS

◆ BIT_DO_AUTORTY_TIME_200MS

◆ BIT_DO_AUTORTY_TIME_500MS

◆ BIT_DO_AUTORTY_TIME_50MS

◆ BIT_DO_CL_100MA

◆ BIT_DO_CL_200MA

◆ BIT_DO_CL_250MA

◆ BIT_DO_CL_50MA

◆ BIT_DO_CLBL_1000US

◆ BIT_DO_CLBL_128US

◆ BIT_DO_CLBL_5000US

◆ BIT_DO_CLBL_500US

◆ BIT_DOCTRL1_DO_EN

◆ BIT_DOCTRL1_DO_INV

◆ BIT_DOCTRL1_DO_NPN

◆ BIT_DOCTRL1_DO_PD

◆ BIT_DOCTRL1_DO_PP

◆ BIT_DOCTRL1_DO_PU

◆ BIT_DOCTRL1_DO_SLEW0

◆ BIT_DOCTRL1_DO_SLEW1

◆ BIT_DOCTRL1_DO_SLEW2

◆ BIT_DOCTRL1_DO_SLEW3

◆ BIT_TXC_CQDOPAR

◆ BIT_TXC_CQDRVSEL

◆ BIT_TXC_CQTX

◆ BIT_TXC_CQTXEN

◆ BIT_TXC_DO_AV

◆ BIT_TXC_DODRVSEL

◆ BIT_TXC_DOTX

◆ DEV_STAT2_SET_CQFAULT

◆ DEV_STAT2_SET_DOFAULT

◆ DEV_STAT2_SET_THWARN [1/2]

◆ DEV_STAT2_SET_THWARN [2/2]

◆ DEV_STAT2_SET_TSHD [1/2]

◆ DEV_STAT2_SET_TSHD [2/2]

◆ DEV_STAT2_SET_V24ERR [1/2]

◆ DEV_STAT2_SET_V24ERR [2/2]

◆ DEV_STAT2_SET_VMERR

◆ DEV_STAT2_SET_VMWERR

◆ EVF_EVENT_FLG

◆ MAX22516_BUFF_SIZE_BYTES

◆ MAX22516_SPI_DUMMY_DATA

◆ MAX22516_SPI_READ_CMD

◆ PG1_DEVID1_MSK

◆ PG1_DEVID2_MSK

◆ PG1_DEVID3_MSK

◆ PG1_FUNCID1_LSB_MSK

◆ PG1_FUNCID1_MSB_MSK

◆ PG1_VID1_MSK

◆ PG1_VID2_MSK

◆ REG_CHIP_ID