no_os_i3c.h File Reference

Header file of I3C Interface. More...

#include <stdint.h>
#include "no_os_util.h"
#include "no_os_dma.h"

Include dependency graph for no_os_i3c.h:

This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes
union	no_os_i3c_ccc_info
struct	no_os_i3c_daa_lut
	Stores the PID + DA information to look-up during the DAA. Should be used only for device initialization, since it may go outdated. More...
struct	no_os_i3c_msg
	Item describing an I3C transfer. More...
struct	no_os_i3c_bus_desc
	Structure holding I3C bus descriptor. More...
struct	no_os_i3c_bus_init_param
	Structure holding the parameters for I3C initialization. More...
struct	no_os_i3c_init_param
	Structure holding the parameters for I3C initialization. Works like a device tree, the values are copied to no_os_i3c_desc during I3C initialization. Set is_static to 1 if the device provides a Static Address and is desired to use it instead of assigning a Dynamic Address during the DAA. is_i3c has higher precedence than is_static, and therefore is_static does not matter when is_i3c is 0. More...
struct	no_os_i3c_desc
	Structure holding I3C device descriptor. More...
struct	no_os_i3c_platform_ops
	Structure holding I3C function pointers that point to the platform specific function. More...

Macros
#define	NO_OS_I3C_MAX_BUS_NUMBER   3
#define	NO_OS_I3C_MAX_DEV_NUMBER   15
#define	NO_OS_I3C_I2C_MAX_ADDR   0x7F
#define	NO_OS_I3C_MAX_ADDR   NO_OS_I3C_I2C_MAX_ADDR
#define	NO_OS_I3C_BCAST_ADDR   0x7E
#define	NO_OS_I3C_ADDR_FLAG_SIZE   2
#define	NO_OS_I3C_ADDR_PER_SLOT   ((unsigned int)(sizeof(unsigned int)*8 / NO_OS_I3C_ADDR_FLAG_SIZE))
#define	NO_OS_I3C_ADDR_GET_SLOT(x)
#define	NO_OS_I3C_ADDR_GET_POS(x)
#define	NO_OS_I3C_ADDRSLOTS_SIZE    (NO_OS_I3C_I2C_MAX_ADDR / NO_OS_I3C_ADDR_PER_SLOT) + !!(NO_OS_I3C_I2C_MAX_ADDR % NO_OS_I3C_ADDR_PER_SLOT)
#define	NO_OS_I3C_CCC_BCAST   0
#define	NO_OS_I3C_CCC_DIRECT   NO_OS_BIT(7)
#define	NO_OS_I3C_CCC_ID(id, type)
#define	NO_OS_I3C_CCC_ADDR(x)
#define	NO_OS_I3C_CCC_GET_LEN(x)
#define	NO_OS_I3C_CCC_SET_LEN(x)
#define	NO_OS_I3C_CCC_GET_DEF(x)
#define	NO_OS_I3C_CCC_SET_DEF   NO_OS_BIT(17)
#define	NO_OS_I3C_CCC_GET_RNW(x)
#define	NO_OS_I3C_CCC_SET_RNW(x)
#define	NO_OS_I3C_CCC_ENEC_DIRECT   0x80 | NO_OS_I3C_CCC_SET_LEN(1)
#define	NO_OS_I3C_CCC_DISEC_DIRECT   0x81 | NO_OS_I3C_CCC_SET_LEN(1)
#define	NO_OS_I3C_CCC_ENEC_BCAST   0x00 | NO_OS_I3C_CCC_SET_DEF
#define	NO_OS_I3C_CCC_DISEC_BCAST   0x01 | NO_OS_I3C_CCC_SET_DEF
#define	NO_OS_I3C_CCC_ENTAS(as, type)
#define	NO_OS_I3C_CCC_RSTDAA(type)
#define	NO_OS_I3C_CCC_SETMWL(type)
#define	NO_OS_I3C_CCC_SETMRL(type)
#define	NO_OS_I3C_CCC_SETXTIME_BCAST   0x28 | NO_OS_I3C_CCC_SET_DEF
#define	NO_OS_I3C_CCC_SETXTIME_DIRECT   0x98 | NO_OS_I3C_CCC_SET_DEF
#define	NO_OS_I3C_CCC_RSTACT_BCAST   0x2a | NO_OS_I3C_CCC_SET_DEF
#define	NO_OS_I3C_CCC_RSTACT_DIRECT   0x9a | NO_OS_I3C_CCC_SET_DEF
#define	NO_OS_I3C_CCC_RSTACT_I3C_ONLY   0x1
#define	NO_OS_I3C_CCC_RSTACT_WHOLE_TARGET   0x2
#define	NO_OS_I3C_CCC_ENTDAA   NO_OS_I3C_CCC_ID(0x7, NO_OS_I3C_CCC_BCAST)
#define	NO_OS_I3C_CCC_DEFSLVS   NO_OS_I3C_CCC_ID(0x8, NO_OS_I3C_CCC_BCAST)
#define	NO_OS_I3C_CCC_ENTTM   NO_OS_I3C_CCC_ID(0xb, NO_OS_I3C_CCC_BCAST)
#define	NO_OS_I3C_CCC_ENTHDR(x)
#define	NO_OS_I3C_CCC_SETAASA   NO_OS_I3C_CCC_ID(0x29, NO_OS_I3C_CCC_BCAST)
#define	NO_OS_I3C_CCC_SETDASA   NO_OS_I3C_CCC_ID(0x7, NO_OS_I3C_CCC_DIRECT)
#define	NO_OS_I3C_CCC_SETNEWDA   NO_OS_I3C_CCC_ID(0x8, NO_OS_I3C_CCC_DIRECT)
#define	NO_OS_I3C_CCC_GETMWL   NO_OS_I3C_CCC_ID(0xb, NO_OS_I3C_CCC_DIRECT)
#define	NO_OS_I3C_CCC_GETMRL   NO_OS_I3C_CCC_ID(0xc, NO_OS_I3C_CCC_DIRECT)
#define	NO_OS_I3C_CCC_GETPID   (NO_OS_I3C_CCC_ID(0xd, NO_OS_I3C_CCC_DIRECT) | NO_OS_I3C_CCC_SET_LEN(6) | NO_OS_I3C_CCC_SET_RNW(1))
#define	NO_OS_I3C_CCC_GETBCR   (NO_OS_I3C_CCC_ID(0xe, NO_OS_I3C_CCC_DIRECT) | NO_OS_I3C_CCC_SET_LEN(1) | NO_OS_I3C_CCC_SET_RNW(1))
#define	NO_OS_I3C_CCC_GETDCR   (NO_OS_I3C_CCC_ID(0xf, NO_OS_I3C_CCC_DIRECT) | NO_OS_I3C_CCC_SET_LEN(1) | NO_OS_I3C_CCC_SET_RNW(1))
#define	NO_OS_I3C_CCC_GETSTATUS   (NO_OS_I3C_CCC_ID(0x10, NO_OS_I3C_CCC_DIRECT) | NO_OS_I3C_CCC_SET_LEN(2) | NO_OS_I3C_CCC_SET_RNW(1))
#define	NO_OS_I3C_CCC_GETACCMST   NO_OS_I3C_CCC_ID(0x11, NO_OS_I3C_CCC_DIRECT)
#define	NO_OS_I3C_CCC_SETBRGTGT   NO_OS_I3C_CCC_ID(0x13, NO_OS_I3C_CCC_DIRECT)
#define	NO_OS_I3C_CCC_GETMXDS   NO_OS_I3C_CCC_ID(0x14, NO_OS_I3C_CCC_DIRECT)
#define	NO_OS_I3C_CCC_GETHDRCAP   NO_OS_I3C_CCC_ID(0x15, NO_OS_I3C_CCC_DIRECT)
#define	NO_OS_I3C_CCC_GETXTIME   NO_OS_I3C_CCC_ID(0x19, NO_OS_I3C_CCC_DIRECT)
#define	NO_OS_I3C_CCC_EVENT_SIR   NO_OS_BIT(0)
#define	NO_OS_I3C_CCC_EVENT_MR   NO_OS_BIT(1)
#define	NO_OS_I3C_CCC_EVENT_HJ   NO_OS_BIT(3)
#define	NO_OS_I3C_IRQ_IBI   0x1
#define	NO_OS_I3C_IRQ_HJ   0x2
#define	NO_OS_I3C_IRQ_CR   0x4
#define	NO_OS_I3C_BCR_IBI_REQUEST_CAPABLE(bcr)
#define	NO_OS_I3C_BCR_IBI_PAYLOAD(bcr)
#define	NO_OS_I3C_BCR_DEVICE_ROLE(bcr)

Enumerations
enum	no_os_i3c_slot_status {   NO_OS_I3C_ADDR_SLOT_FREE ,   NO_OS_I3C_ADDR_SLOT_RSVD ,   NO_OS_I3C_ADDR_SLOT_I2C_DEV ,   NO_OS_I3C_ADDR_SLOT_I3C_DEV ,   NO_OS_I3C_ADDR_SLOT_STATUS_MASK = 3 }
	On an I3C bus, addresses are assigned dynamically, and we need to know which addresses are free to use and which ones are already assigned. More...

Functions
int	no_os_i3c_init (struct no_os_i3c_desc **desc, const struct no_os_i3c_init_param *param)
	Initialize the I3C device. If the bus of the I3C device is not initialized, it will call to init it.
int	no_os_i3c_init_bus (struct no_os_i3c_bus_desc **desc, const struct no_os_i3c_bus_init_param *param)
	Initialize the I3C bus.
int	no_os_i3c_remove (struct no_os_i3c_desc *desc)
	Free the resources allocated by no_os_i3c_init().
int	no_os_i3c_remove_bus (struct no_os_i3c_bus_desc *desc)
	Free the resources allocated by no_os_i3c_init_bus. Must remove all devices first, if not, -EBUSY is returned.
int	no_os_i3c_do_daa (struct no_os_i3c_bus_desc *desc, bool rstdaa)
	Do DAA to assign the dynamic addresses.
int	no_os_i3c_send_ccc (struct no_os_i3c_bus_desc *desc, uint8_t addr, uint32_t ccc, uint8_t *data)
	Send CCC, either to a device device or broadcast to all.
int	no_os_i3c_send_direct_ccc (struct no_os_i3c_desc *desc, uint32_t ccc, uint8_t *data)
	Send CCC to device device.
int	no_os_i3c_write (struct no_os_i3c_desc *desc, uint8_t *data, uint8_t size)
	Write data to device device.
int	no_os_i3c_read (struct no_os_i3c_desc *desc, uint8_t *data, uint8_t size)
	Read data from device device.
int	no_os_i3c_write_and_read (struct no_os_i3c_desc *desc, uint8_t *tx_data, uint8_t tx_data_len, uint8_t *rx_data, uint8_t rx_data_len)
	Read and write the device.
int	no_os_i3c_conf_irq (struct no_os_i3c_bus_desc *desc, uint8_t irq, bool en)
	Configure I3C interrupts.
int	no_os_i3c_wait_irq (struct no_os_i3c_bus_desc *desc, uint8_t irq)
	Wait I3C interrupt. Set async_irq on call to false to ensure single entry point.
int	no_os_i3c_call_irq (struct no_os_i3c_bus_desc *desc)
	Non-blocking I3C interrupt. Since a payload is always retrieved with it, also update the no_os_i3c_ccc_info fields.
int	no_os_i3c_async_irq (struct no_os_i3c_bus_desc *desc, bool en)
	Enable I3C non-blocking interrupts.
uint8_t	no_os_i3c_addr_get_free (struct no_os_i3c_bus_desc *desc, uint8_t start_addr)
	Get a free address.
void	no_os_i3c_addr_set_status (struct no_os_i3c_bus_desc *desc, uint8_t addr, enum no_os_i3c_slot_status status)
	Set status of an address.
void	no_os_i3c_attach_callback (struct no_os_i3c_desc *desc, void(*callback)(struct no_os_i3c_desc *, uint32_t, uint32_t))
	Attach event callback.
void	no_os_i3c_detach_callback (struct no_os_i3c_desc *desc)
	Detach event callback.
int32_t	no_os_i3c_transfer_dma_async (struct no_os_i3c_desc *desc, struct no_os_i3c_msg *msgs, uint32_t len, void(*callback)(void *), void *ctx)
	Transfer a list of messages using DMA. Non-blocking, invokes a callback after the last message is concluded.
int32_t	no_os_i3c_transfer_abort (struct no_os_i3c_desc *desc)
	Abort the ongoing DMA transaction.

Detailed Description

Header file of I3C Interface.

Author

Jorge Marques (jorge.nosp@m..mar.nosp@m.ques@.nosp@m.anal.nosp@m.og.co.nosp@m.m)

Copyright 2024(c) Analog Devices, Inc.

All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

• Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
• Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
• Neither the name of Analog Devices, Inc. nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
• The use of this software may or may not infringe the patent rights of one or more patent holders. This license does not release you from the requirement that you obtain separate licenses from these patent holders to use this software.
• Use of the software either in source or binary form, must be run on or directly connected to an Analog Devices Inc. component.

THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Macro Definition Documentation

NO_OS_I3C_ADDR_FLAG_SIZE

#define NO_OS_I3C_ADDR_FLAG_SIZE   2

NO_OS_I3C_ADDR_GET_POS

#define NO_OS_I3C_ADDR_GET_POS

(

x

)

Value:

(((x) % NO_OS_I3C_ADDR_PER_SLOT) * NO_OS_I3C_ADDR_FLAG_SIZE)

NO_OS_I3C_ADDR_GET_SLOT

#define NO_OS_I3C_ADDR_GET_SLOT

(

x

)

Value:

((x) / NO_OS_I3C_ADDR_PER_SLOT)

NO_OS_I3C_ADDR_PER_SLOT

#define NO_OS_I3C_ADDR_PER_SLOT   ((unsigned int)(sizeof(unsigned int)*8 / NO_OS_I3C_ADDR_FLAG_SIZE))

NO_OS_I3C_ADDRSLOTS_SIZE

#define NO_OS_I3C_ADDRSLOTS_SIZE    (NO_OS_I3C_I2C_MAX_ADDR / NO_OS_I3C_ADDR_PER_SLOT) + !!(NO_OS_I3C_I2C_MAX_ADDR % NO_OS_I3C_ADDR_PER_SLOT)

NO_OS_I3C_BCAST_ADDR

#define NO_OS_I3C_BCAST_ADDR   0x7E

NO_OS_I3C_BCR_DEVICE_ROLE

#define NO_OS_I3C_BCR_DEVICE_ROLE

(

bcr

)

Value:

(((bcr) && NO_OS_GENMASK(7,6)) >> 6)

NO_OS_I3C_BCR_IBI_PAYLOAD

#define NO_OS_I3C_BCR_IBI_PAYLOAD

(

bcr

)

Value:

!!((bcr) & (1 << 2))

NO_OS_I3C_BCR_IBI_REQUEST_CAPABLE

#define NO_OS_I3C_BCR_IBI_REQUEST_CAPABLE

(

bcr

)

Value:

!!((bcr) & (1 << 1))

Extract capabilities from BCR

NO_OS_I3C_CCC_ADDR

#define NO_OS_I3C_CCC_ADDR

(

x

)

Value:

((x) & 0xFF)

NO_OS_I3C_CCC_BCAST

#define NO_OS_I3C_CCC_BCAST   0

NO_OS_I3C_CCC_DEFSLVS

#define NO_OS_I3C_CCC_DEFSLVS   NO_OS_I3C_CCC_ID(0x8, NO_OS_I3C_CCC_BCAST)

NO_OS_I3C_CCC_DIRECT

#define NO_OS_I3C_CCC_DIRECT   NO_OS_BIT(7)

NO_OS_I3C_CCC_DISEC_BCAST

#define NO_OS_I3C_CCC_DISEC_BCAST   0x01 | NO_OS_I3C_CCC_SET_DEF

NO_OS_I3C_CCC_DISEC_DIRECT

#define NO_OS_I3C_CCC_DISEC_DIRECT   0x81 | NO_OS_I3C_CCC_SET_LEN(1)

NO_OS_I3C_CCC_ENEC_BCAST

#define NO_OS_I3C_CCC_ENEC_BCAST   0x00 | NO_OS_I3C_CCC_SET_DEF

NO_OS_I3C_CCC_ENEC_DIRECT

#define NO_OS_I3C_CCC_ENEC_DIRECT   0x80 | NO_OS_I3C_CCC_SET_LEN(1)

Commands valid in both broadcast and direct modes type: NO_OS_I3C_CCC_DIRECT, NO_OS_I3C_CCC_BCAST

NO_OS_I3C_CCC_ENTAS

#define NO_OS_I3C_CCC_ENTAS	(		as,
			type )

Value:

NO_OS_I3C_CCC_ID((0x2 + (as)), (type))

NO_OS_I3C_CCC_ENTDAA

#define NO_OS_I3C_CCC_ENTDAA   NO_OS_I3C_CCC_ID(0x7, NO_OS_I3C_CCC_BCAST)

NO_OS_I3C_CCC_ENTHDR

#define NO_OS_I3C_CCC_ENTHDR

(

x

)

Value:

NO_OS_I3C_CCC_ID((0x20 + (x)), NO_OS_I3C_CCC_BCAST)

NO_OS_I3C_CCC_ENTTM

#define NO_OS_I3C_CCC_ENTTM   NO_OS_I3C_CCC_ID(0xb, NO_OS_I3C_CCC_BCAST)

NO_OS_I3C_CCC_EVENT_HJ

#define NO_OS_I3C_CCC_EVENT_HJ   NO_OS_BIT(3)

NO_OS_I3C_CCC_EVENT_MR

#define NO_OS_I3C_CCC_EVENT_MR   NO_OS_BIT(1)

NO_OS_I3C_CCC_EVENT_SIR

#define NO_OS_I3C_CCC_EVENT_SIR   NO_OS_BIT(0)

NO_OS_I3C_CCC_GET_DEF

#define NO_OS_I3C_CCC_GET_DEF

(

x

)

Value:

(((x) >> 17) & NO_OS_BIT(0))

NO_OS_I3C_CCC_GET_LEN

#define NO_OS_I3C_CCC_GET_LEN

(

x

)

Value:

(((x) >> 8) & 0x0000FF)

NO_OS_I3C_CCC_GET_RNW

#define NO_OS_I3C_CCC_GET_RNW

(

x

)

Value:

(((x) >> 16) & NO_OS_BIT(0))

NO_OS_I3C_CCC_GETACCMST

#define NO_OS_I3C_CCC_GETACCMST   NO_OS_I3C_CCC_ID(0x11, NO_OS_I3C_CCC_DIRECT)

NO_OS_I3C_CCC_GETBCR

#define NO_OS_I3C_CCC_GETBCR   (NO_OS_I3C_CCC_ID(0xe, NO_OS_I3C_CCC_DIRECT) | NO_OS_I3C_CCC_SET_LEN(1) | NO_OS_I3C_CCC_SET_RNW(1))

NO_OS_I3C_CCC_GETDCR

#define NO_OS_I3C_CCC_GETDCR   (NO_OS_I3C_CCC_ID(0xf, NO_OS_I3C_CCC_DIRECT) | NO_OS_I3C_CCC_SET_LEN(1) | NO_OS_I3C_CCC_SET_RNW(1))

NO_OS_I3C_CCC_GETHDRCAP

#define NO_OS_I3C_CCC_GETHDRCAP   NO_OS_I3C_CCC_ID(0x15, NO_OS_I3C_CCC_DIRECT)

NO_OS_I3C_CCC_GETMRL

#define NO_OS_I3C_CCC_GETMRL   NO_OS_I3C_CCC_ID(0xc, NO_OS_I3C_CCC_DIRECT)

NO_OS_I3C_CCC_GETMWL

#define NO_OS_I3C_CCC_GETMWL   NO_OS_I3C_CCC_ID(0xb, NO_OS_I3C_CCC_DIRECT)

NO_OS_I3C_CCC_GETMXDS

#define NO_OS_I3C_CCC_GETMXDS   NO_OS_I3C_CCC_ID(0x14, NO_OS_I3C_CCC_DIRECT)

NO_OS_I3C_CCC_GETPID

#define NO_OS_I3C_CCC_GETPID   (NO_OS_I3C_CCC_ID(0xd, NO_OS_I3C_CCC_DIRECT) | NO_OS_I3C_CCC_SET_LEN(6) | NO_OS_I3C_CCC_SET_RNW(1))

NO_OS_I3C_CCC_GETSTATUS

#define NO_OS_I3C_CCC_GETSTATUS   (NO_OS_I3C_CCC_ID(0x10, NO_OS_I3C_CCC_DIRECT) | NO_OS_I3C_CCC_SET_LEN(2) | NO_OS_I3C_CCC_SET_RNW(1))

NO_OS_I3C_CCC_GETXTIME

#define NO_OS_I3C_CCC_GETXTIME   NO_OS_I3C_CCC_ID(0x19, NO_OS_I3C_CCC_DIRECT)

NO_OS_I3C_CCC_ID

#define NO_OS_I3C_CCC_ID	(		id,
			type )

Value:

((id) | (type))

NO_OS_I3C_CCC_RSTACT_BCAST

#define NO_OS_I3C_CCC_RSTACT_BCAST   0x2a | NO_OS_I3C_CCC_SET_DEF

NO_OS_I3C_CCC_RSTACT_DIRECT

#define NO_OS_I3C_CCC_RSTACT_DIRECT   0x9a | NO_OS_I3C_CCC_SET_DEF

NO_OS_I3C_CCC_RSTACT_I3C_ONLY

#define NO_OS_I3C_CCC_RSTACT_I3C_ONLY   0x1

NO_OS_I3C_CCC_RSTACT_WHOLE_TARGET

#define NO_OS_I3C_CCC_RSTACT_WHOLE_TARGET   0x2

NO_OS_I3C_CCC_RSTDAA

#define NO_OS_I3C_CCC_RSTDAA

(

type

)

Value:

NO_OS_I3C_CCC_ID(0x6, (type))

NO_OS_I3C_CCC_SET_DEF

#define NO_OS_I3C_CCC_SET_DEF   NO_OS_BIT(17)

NO_OS_I3C_CCC_SET_LEN

#define NO_OS_I3C_CCC_SET_LEN

(

x

)

Value:

(((x) << 8) & 0x00FF00)

NO_OS_I3C_CCC_SET_RNW

#define NO_OS_I3C_CCC_SET_RNW

(

x

)

Value:

(((x) << 16) & NO_OS_BIT(16))

NO_OS_I3C_CCC_SETAASA

#define NO_OS_I3C_CCC_SETAASA   NO_OS_I3C_CCC_ID(0x29, NO_OS_I3C_CCC_BCAST)

NO_OS_I3C_CCC_SETBRGTGT

#define NO_OS_I3C_CCC_SETBRGTGT   NO_OS_I3C_CCC_ID(0x13, NO_OS_I3C_CCC_DIRECT)

NO_OS_I3C_CCC_SETDASA

#define NO_OS_I3C_CCC_SETDASA   NO_OS_I3C_CCC_ID(0x7, NO_OS_I3C_CCC_DIRECT)

NO_OS_I3C_CCC_SETMRL

#define NO_OS_I3C_CCC_SETMRL

(

type

)

Value:

NO_OS_I3C_CCC_ID(0xa, (type)) | NO_OS_I3C_CCC_SET_LEN(2)

NO_OS_I3C_CCC_SETMWL

#define NO_OS_I3C_CCC_SETMWL

(

type

)

Value:

NO_OS_I3C_CCC_ID(0x9, (type)) | NO_OS_I3C_CCC_SET_LEN(2)

NO_OS_I3C_CCC_SETNEWDA

#define NO_OS_I3C_CCC_SETNEWDA   NO_OS_I3C_CCC_ID(0x8, NO_OS_I3C_CCC_DIRECT)

NO_OS_I3C_CCC_SETXTIME_BCAST

#define NO_OS_I3C_CCC_SETXTIME_BCAST   0x28 | NO_OS_I3C_CCC_SET_DEF

NO_OS_I3C_CCC_SETXTIME_DIRECT

#define NO_OS_I3C_CCC_SETXTIME_DIRECT   0x98 | NO_OS_I3C_CCC_SET_DEF

NO_OS_I3C_I2C_MAX_ADDR

#define NO_OS_I3C_I2C_MAX_ADDR   0x7F

NO_OS_I3C_IRQ_CR

#define NO_OS_I3C_IRQ_CR   0x4

NO_OS_I3C_IRQ_HJ

#define NO_OS_I3C_IRQ_HJ   0x2

NO_OS_I3C_IRQ_IBI

#define NO_OS_I3C_IRQ_IBI   0x1

List of possible IRQ events.

NO_OS_I3C_MAX_ADDR

#define NO_OS_I3C_MAX_ADDR   NO_OS_I3C_I2C_MAX_ADDR

NO_OS_I3C_MAX_BUS_NUMBER

#define NO_OS_I3C_MAX_BUS_NUMBER   3

NO_OS_I3C_MAX_DEV_NUMBER

#define NO_OS_I3C_MAX_DEV_NUMBER   15

Enumeration Type Documentation

no_os_i3c_slot_status

enum no_os_i3c_slot_status

On an I3C bus, addresses are assigned dynamically, and we need to know which addresses are free to use and which ones are already assigned.

• I3C address slot status

Addresses marked as reserved are those reserved by the I3C protocol (broadcast address, ...).

Enumerator
NO_OS_I3C_ADDR_SLOT_FREE	Address is free
NO_OS_I3C_ADDR_SLOT_RSVD	Address is reserved
NO_OS_I3C_ADDR_SLOT_I2C_DEV	Address is assigned to an I2C device
NO_OS_I3C_ADDR_SLOT_I3C_DEV	Address is assigned to an I3C device
NO_OS_I3C_ADDR_SLOT_STATUS_MASK	Address slot mask

Function Documentation

no_os_i3c_addr_get_free()

uint8_t no_os_i3c_addr_get_free	(	struct no_os_i3c_bus_desc *	desc,
		uint8_t	start_addr )

Get a free address.

Parameters

desc	- The I3C bus descriptor.
start_addr	- Start address to search from.

Returns

The free address or 0 if no address is available.

Here is the caller graph for this function:

no_os_i3c_addr_set_status()

void no_os_i3c_addr_set_status	(	struct no_os_i3c_bus_desc *	desc,
		uint8_t	addr,
		enum no_os_i3c_slot_status	status )

Set status of an address.

Parameters

desc	- The I3C bus descriptor.
addr	- The address to set.
status	- The value to write.

Here is the caller graph for this function:

no_os_i3c_async_irq()

int no_os_i3c_async_irq	(	struct no_os_i3c_bus_desc *	desc,
		bool	en )

Enable I3C non-blocking interrupts.

Parameters

desc	- The I3C descriptor.
en	- 1 to enable, 0 to disable async callback.

Returns

0 in case of success, -EINVAL otherwise.

no_os_i3c_attach_callback()

void no_os_i3c_attach_callback	(	struct no_os_i3c_desc *	desc,
		void(*	callback )(struct no_os_i3c_desc *, uint32_t, uint32_t) )

Attach event callback.

Parameters

desc	- The I3C device descriptor.
callback	- Method to call on event.

Here is the caller graph for this function:

no_os_i3c_call_irq()

int no_os_i3c_call_irq

(

struct no_os_i3c_bus_desc *

desc

)

Non-blocking I3C interrupt. Since a payload is always retrieved with it, also update the no_os_i3c_ccc_info fields.

Parameters

desc	- The I3C descriptor.

Returns

0 in case of success, error code otherwise.

Here is the caller graph for this function:

no_os_i3c_conf_irq()

int no_os_i3c_conf_irq	(	struct no_os_i3c_bus_desc *	desc,
		uint8_t	irq,
		bool	en )

Configure I3C interrupts.

Parameters

desc	- The I3C descriptor.
irq	- The interrupt type to enable.
en	- 1 to enable, 0 to disable irq type.

Returns

0 in case of success, -1 otherwise.

no_os_i3c_detach_callback()

void no_os_i3c_detach_callback

(

struct no_os_i3c_desc *

desc

)

Detach event callback.

Parameters

desc	- The I3C device descriptor.

no_os_i3c_do_daa()

int no_os_i3c_do_daa	(	struct no_os_i3c_bus_desc *	desc,
		bool	rstdaa )

Do DAA to assign the dynamic addresses.

Parameters

desc	- The I3C descriptor.
rstdaa	- Do RSTDAA CCC before the DAA.

Returns

0 in case of success, error code otherwise.

Here is the caller graph for this function:

no_os_i3c_init()

int no_os_i3c_init	(	struct no_os_i3c_desc **	desc,
		const struct no_os_i3c_init_param *	param )

Initialize the I3C device. If the bus of the I3C device is not initialized, it will call to init it.

Parameters

desc	- The I3C device descriptor.
param	- The structure that contains the I3C device parameters, to match PID.

Returns

0 in case of success, error code otherwise.

no_os_i3c_init_bus()

int no_os_i3c_init_bus	(	struct no_os_i3c_bus_desc **	desc,
		const struct no_os_i3c_bus_init_param *	param )

Initialize the I3C bus.

Parameters

desc	- The I3C bus descriptor.
param	- The structure that contains the I3C bus parameters.

Returns

0 in case of success, error code otherwise.

Here is the caller graph for this function:

no_os_i3c_read()

int no_os_i3c_read	(	struct no_os_i3c_desc *	desc,
		uint8_t *	data,
		uint8_t	size )

Read data from device device.

Parameters

desc	- The I3C descriptor.
data	- The buffer with the received data.
size	- Number of bytes to read.

Returns

0 in case of success, error code otherwise.

no_os_i3c_remove()

int no_os_i3c_remove

(

struct no_os_i3c_desc *

desc

)

Free the resources allocated by no_os_i3c_init().

Parameters

desc	- The I3C device descriptor.

Returns

0 in case of success, error code otherwise.

no_os_i3c_remove_bus()

int no_os_i3c_remove_bus

(

struct no_os_i3c_bus_desc *

desc

)

Free the resources allocated by no_os_i3c_init_bus. Must remove all devices first, if not, -EBUSY is returned.

Parameters

desc	- The I3C bus descriptor.

Returns

0 in case of success, error code otherwise.

Here is the caller graph for this function:

no_os_i3c_send_ccc()

int no_os_i3c_send_ccc	(	struct no_os_i3c_bus_desc *	desc,
		uint8_t	addr,
		uint32_t	ccc,
		uint8_t *	data )

Send CCC, either to a device device or broadcast to all.

Parameters

desc	- The I3C descriptor.
addr	- Device address or broadcast address.
ccc	- CCC RnW, CCC Length, CCC ID.
data	- The buffer with the transmitted/received data.

Returns

0 in case of success, error code otherwise.

Here is the caller graph for this function:

no_os_i3c_send_direct_ccc()

int no_os_i3c_send_direct_ccc	(	struct no_os_i3c_desc *	desc,
		uint32_t	ccc,
		uint8_t *	data )

Send CCC to device device.

Parameters

desc	- The I3C descriptor.
ccc	- CCC RnW, CCC length, CCC id.
data	- The buffer with the transmitted/received data.

Returns

0 in case of success, error code otherwise.

no_os_i3c_transfer_abort()

int32_t no_os_i3c_transfer_abort

(

struct no_os_i3c_desc *

desc

)

Abort the ongoing DMA transaction.

Parameters

desc	- The I3C descriptor.

Returns

0 in case of success, errno codes otherwise.

no_os_i3c_transfer_dma_async()

int32_t no_os_i3c_transfer_dma_async	(	struct no_os_i3c_desc *	desc,
		struct no_os_i3c_msg *	msgs,
		uint32_t	len,
		void(*	callback )(void *),
		void *	ctx )

Transfer a list of messages using DMA. Non-blocking, invokes a callback after the last message is concluded.

Parameters

desc	- The I3C descriptor.
msgs	- The list of messages to transfer.
len	- The number of messages to transfer.
callback	- The callback to invoke after the transfer is concluded.
ctx	- The context to pass to the callback.

Returns

0 in case of success, errno codes otherwise.

no_os_i3c_wait_irq()

int no_os_i3c_wait_irq	(	struct no_os_i3c_bus_desc *	desc,
		uint8_t	irq )

Wait I3C interrupt. Set async_irq on call to false to ensure single entry point.

Parameters

desc	- The I3C descriptor.
irq	- The interrupt to wait for.

Returns

0 in case of success, -EINVAL if in async mode or error codes.

no_os_i3c_write()

int no_os_i3c_write	(	struct no_os_i3c_desc *	desc,
		uint8_t *	data,
		uint8_t	size )

Write data to device device.

Parameters

desc	- The I3C descriptor.
data	- The buffer with the transmitted data.
size	- Number of bytes to write.

Returns

0 in case of success, error code otherwise.

no_os_i3c_write_and_read()

int no_os_i3c_write_and_read	(	struct no_os_i3c_desc *	desc,
		uint8_t *	tx_data,
		uint8_t	tx_data_len,
		uint8_t *	rx_data,
		uint8_t	rx_data_len )

Read and write the device.

Parameters

desc	- The I3C descriptor.
tx_data	- The buffer with the transmitted data.
tx_data_len	- Number of bytes to write.
rx_data	- The buffer with the received data.
rx_data_len	- Number of bytes to read.

Returns

0 in case of success, -1 otherwise.