no-OS
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Output channel configuration. More...
#include <ad9523.h>
Public Attributes | |
uint8_t | channel_num |
uint8_t | divider_output_invert_en |
uint8_t | sync_ignore_en |
uint8_t | low_power_mode_en |
uint8_t | use_alt_clock_src |
uint8_t | output_dis |
uint8_t | driver_mode |
uint8_t | divider_phase |
uint16_t | channel_divider |
int8_t | extended_name [16] |
Output channel configuration.
uint16_t ad9523_channel_spec::channel_divider |
10-bit channel divider.
uint8_t ad9523_channel_spec::channel_num |
Output channel number.
uint8_t ad9523_channel_spec::divider_output_invert_en |
Invert the polarity of the output clock.
uint8_t ad9523_channel_spec::divider_phase |
Divider initial phase after a SYNC. Range 0..63 LSB = 1/2 of a period of the divider input clock.
uint8_t ad9523_channel_spec::driver_mode |
Output driver mode (logic level family).
int8_t ad9523_channel_spec::extended_name[16] |
Optional descriptive channel name.
uint8_t ad9523_channel_spec::low_power_mode_en |
Reduce power used in the differential output modes.
uint8_t ad9523_channel_spec::output_dis |
Disables, powers down the entire channel.
uint8_t ad9523_channel_spec::sync_ignore_en |
Ignore chip-level SYNC signal.
uint8_t ad9523_channel_spec::use_alt_clock_src |
Channel divider uses alternative clk source: CH0..CH3 VCXO, CH4..CH9 VCO2