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mykonosJesd204bDeframerConfig_t Struct Reference

Data structure to hold the settings for the deserializer and deframer configuration. More...

#include <t_mykonos.h>

Public Attributes

uint8_t bankId
 
uint8_t deviceId
 
uint8_t lane0Id
 
uint8_t M
 
uint8_t K
 
uint8_t scramble
 
uint8_t externalSysref
 
uint8_t deserializerLanesEnabled
 
uint8_t deserializerLaneCrossbar
 
uint8_t EQSetting
 
uint8_t invertLanePolarity
 
uint8_t lmfcOffset
 
uint8_t newSysrefOnRelink
 
uint8_t enableAutoChanXbar
 
uint8_t txSyncbMode
 
uint8_t enableManualLaneXbar
 

Detailed Description

Data structure to hold the settings for the deserializer and deframer configuration.

EQ Settings 3GHz Loss (dB) 6GHz Loss (dB) max FR408HR Length (in) max FR4 Length (in)
0 6.5 14 20 12
1 11.5 21 30 20
2 18 31 46 32
3 21.5 38 56 40
4 22 39 60 43

Member Data Documentation

◆ bankId

uint8_t mykonosJesd204bDeframerConfig_t::bankId

Extension to Device ID. Range is 0..15

◆ deserializerLaneCrossbar

uint8_t mykonosJesd204bDeframerConfig_t::deserializerLaneCrossbar

Lane crossbar to map physical lanes to deframer lane inputs [1:0] = Deframer Input 0 Lane section, [3:2] = Deframer Input 1 lane select, etc

◆ deserializerLanesEnabled

uint8_t mykonosJesd204bDeframerConfig_t::deserializerLanesEnabled

Deserializer lane select bit field. Where, [0] = Lane0 enabled, [1] = Lane1 enabled, etc

◆ deviceId

uint8_t mykonosJesd204bDeframerConfig_t::deviceId

Link identification number. Range is 0..255

◆ enableAutoChanXbar

uint8_t mykonosJesd204bDeframerConfig_t::enableAutoChanXbar

Flag for determining if auto channel select for the xbar should be set. Where, if > 0 = set, '0' = not set

◆ enableManualLaneXbar

uint8_t mykonosJesd204bDeframerConfig_t::enableManualLaneXbar

Flag for determining if API will calculate the appropriate settings for deframer lane in to physical lanes. Where, if '0' = API will set automatic lane crossbar, '1' = set to manual mode and the value in deserializerLaneCrossbar will be used

◆ EQSetting

uint8_t mykonosJesd204bDeframerConfig_t::EQSetting

Equalizer setting. Applied to all deserializer lanes. Range is 0..4

◆ externalSysref

uint8_t mykonosJesd204bDeframerConfig_t::externalSysref

External SYSREF select. 0 = use internal SYSREF, 1 = external SYSREF

◆ invertLanePolarity

uint8_t mykonosJesd204bDeframerConfig_t::invertLanePolarity

PN inversion per each lane. bit[0] = 1 Invert PN of Lane 0, bit[1] = Invert PN of Lane 1, etc

◆ K

uint8_t mykonosJesd204bDeframerConfig_t::K

Number of frames in a multiframe. Default = 32, F*K = modulo 4. Where, F=2*M/numberOfLanes

◆ lane0Id

uint8_t mykonosJesd204bDeframerConfig_t::lane0Id

Lane0 ID. Range is 0..31

◆ lmfcOffset

uint8_t mykonosJesd204bDeframerConfig_t::lmfcOffset

LMFC offset value to adjust deterministic latency. Range is 0..31

◆ M

uint8_t mykonosJesd204bDeframerConfig_t::M

Number of DACs (0, 2, or 4) - 2 DACs per transmit chain (I and Q)

◆ newSysrefOnRelink

uint8_t mykonosJesd204bDeframerConfig_t::newSysrefOnRelink

Flag for determining if SYSREF on relink should be set. Where, if > 0 = set, '0' = not set

◆ scramble

uint8_t mykonosJesd204bDeframerConfig_t::scramble

Scrambling off if scramble = 0, if framerScramble > 0 scrambling is enabled

◆ txSyncbMode

uint8_t mykonosJesd204bDeframerConfig_t::txSyncbMode

Flag for determining if CMOS mode for TX Sync signal is used. Where, if > 0 = CMOS, '0' = LVDS


The documentation for this struct was generated from the following file: