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MAX32520 Peripheral Driver API
Peripheral Driver API for the MAX32520
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Control Register0.
#define MXC_F_I2C_CN_ACK ((uint32_t)(0x1UL << MXC_F_I2C_CN_ACK_POS)) |
CN_ACK Mask
#define MXC_F_I2C_CN_ACK_POS 4 |
CN_ACK Position
#define MXC_F_I2C_CN_GCEN ((uint32_t)(0x1UL << MXC_F_I2C_CN_GCEN_POS)) |
CN_GCEN Mask
#define MXC_F_I2C_CN_GCEN_POS 2 |
CN_GCEN Position
#define MXC_F_I2C_CN_I2CEN ((uint32_t)(0x1UL << MXC_F_I2C_CN_I2CEN_POS)) |
CN_I2CEN Mask
#define MXC_F_I2C_CN_I2CEN_POS 0 |
CN_I2CEN Position
#define MXC_F_I2C_CN_IRXM ((uint32_t)(0x1UL << MXC_F_I2C_CN_IRXM_POS)) |
CN_IRXM Mask
#define MXC_F_I2C_CN_IRXM_POS 3 |
CN_IRXM Position
#define MXC_F_I2C_CN_MST ((uint32_t)(0x1UL << MXC_F_I2C_CN_MST_POS)) |
CN_MST Mask
#define MXC_F_I2C_CN_MST_POS 1 |
CN_MST Position
#define MXC_F_I2C_CN_READ ((uint32_t)(0x1UL << MXC_F_I2C_CN_READ_POS)) |
CN_READ Mask
#define MXC_F_I2C_CN_READ_POS 11 |
CN_READ Position
#define MXC_F_I2C_CN_SCL ((uint32_t)(0x1UL << MXC_F_I2C_CN_SCL_POS)) |
CN_SCL Mask
#define MXC_F_I2C_CN_SCL_POS 8 |
CN_SCL Position
#define MXC_F_I2C_CN_SCLO ((uint32_t)(0x1UL << MXC_F_I2C_CN_SCLO_POS)) |
CN_SCLO Mask
#define MXC_F_I2C_CN_SCLO_POS 6 |
CN_SCLO Position
#define MXC_F_I2C_CN_SCLPPM ((uint32_t)(0x1UL << MXC_F_I2C_CN_SCLPPM_POS)) |
CN_SCLPPM Mask
#define MXC_F_I2C_CN_SCLPPM_POS 13 |
CN_SCLPPM Position
#define MXC_F_I2C_CN_SCLSTRD ((uint32_t)(0x1UL << MXC_F_I2C_CN_SCLSTRD_POS)) |
CN_SCLSTRD Mask
#define MXC_F_I2C_CN_SCLSTRD_POS 12 |
CN_SCLSTRD Position
#define MXC_F_I2C_CN_SDA ((uint32_t)(0x1UL << MXC_F_I2C_CN_SDA_POS)) |
CN_SDA Mask
#define MXC_F_I2C_CN_SDA_POS 9 |
CN_SDA Position
#define MXC_F_I2C_CN_SDAO ((uint32_t)(0x1UL << MXC_F_I2C_CN_SDAO_POS)) |
CN_SDAO Mask
#define MXC_F_I2C_CN_SDAO_POS 7 |
CN_SDAO Position
#define MXC_F_I2C_CN_SWOE ((uint32_t)(0x1UL << MXC_F_I2C_CN_SWOE_POS)) |
CN_SWOE Mask
#define MXC_F_I2C_CN_SWOE_POS 10 |
CN_SWOE Position