MAX32520 Peripheral Driver API
Peripheral Driver API for the MAX32520

Macros

#define MXC_R_SFE_CFG   ((uint32_t)0x00000400UL)
 
#define MXC_R_SFE_HFSA   ((uint32_t)0x00000408UL)
 
#define MXC_R_SFE_HRSA   ((uint32_t)0x0000040CUL)
 
#define MXC_R_SFE_SFDP_SBA   ((uint32_t)0x00000410UL)
 
#define MXC_R_SFE_FLASH_SBA   ((uint32_t)0x00000414UL)
 
#define MXC_R_SFE_FLASH_STA   ((uint32_t)0x00000418UL)
 
#define MXC_R_SFE_RAM_SBA   ((uint32_t)0x0000041CUL)
 
#define MXC_R_SFE_RAM_STA   ((uint32_t)0x00000420UL)
 

Detailed Description

SFE Peripheral Register Offsets from the SFE Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_SFE_CFG

#define MXC_R_SFE_CFG   ((uint32_t)0x00000400UL)

Offset from SFE Base Address: 0x0400

◆ MXC_R_SFE_FLASH_SBA

#define MXC_R_SFE_FLASH_SBA   ((uint32_t)0x00000414UL)

Offset from SFE Base Address: 0x0414

◆ MXC_R_SFE_FLASH_STA

#define MXC_R_SFE_FLASH_STA   ((uint32_t)0x00000418UL)

Offset from SFE Base Address: 0x0418

◆ MXC_R_SFE_HFSA

#define MXC_R_SFE_HFSA   ((uint32_t)0x00000408UL)

Offset from SFE Base Address: 0x0408

◆ MXC_R_SFE_HRSA

#define MXC_R_SFE_HRSA   ((uint32_t)0x0000040CUL)

Offset from SFE Base Address: 0x040C

◆ MXC_R_SFE_RAM_SBA

#define MXC_R_SFE_RAM_SBA   ((uint32_t)0x0000041CUL)

Offset from SFE Base Address: 0x041C

◆ MXC_R_SFE_RAM_STA

#define MXC_R_SFE_RAM_STA   ((uint32_t)0x00000420UL)

Offset from SFE Base Address: 0x0420

◆ MXC_R_SFE_SFDP_SBA

#define MXC_R_SFE_SFDP_SBA   ((uint32_t)0x00000410UL)

Offset from SFE Base Address: 0x0410