Register Offsets

Macros
#define	MXC_R_SPI_DATA32   ((uint32_t)0x00000000UL)
#define	MXC_R_SPI_DATA16   ((uint32_t)0x00000000UL)
#define	MXC_R_SPI_DATA8   ((uint32_t)0x00000000UL)
#define	MXC_R_SPI_MSTR_CNTL   ((uint32_t)0x00000004UL)
#define	MXC_R_SPI_TRNMT_SIZE   ((uint32_t)0x00000008UL)
#define	MXC_R_SPI_STATIC_CONFIG   ((uint32_t)0x0000000CUL)
#define	MXC_R_SPI_SS_TIME   ((uint32_t)0x00000010UL)
#define	MXC_R_SPI_CLK_CONFIG   ((uint32_t)0x00000014UL)
#define	MXC_R_SPI_DMA   ((uint32_t)0x0000001CUL)
#define	MXC_R_SPI_INT_FL   ((uint32_t)0x00000020UL)
#define	MXC_R_SPI_INT_EN   ((uint32_t)0x00000024UL)
#define	MXC_R_SPI_WAKE_FL   ((uint32_t)0x00000028UL)
#define	MXC_R_SPI_WAKE_EN   ((uint32_t)0x0000002CUL)
#define	MXC_R_SPI_STAT   ((uint32_t)0x00000030UL)

Detailed Description

SPI Peripheral Register Offsets from the SPI Base Peripheral Address.

Macro Definition Documentation

MXC_R_SPI_CLK_CONFIG

#define MXC_R_SPI_CLK_CONFIG   ((uint32_t)0x00000014UL)

Offset from SPI Base Address: 0x0014

MXC_R_SPI_DATA16

#define MXC_R_SPI_DATA16   ((uint32_t)0x00000000UL)

Offset from SPI Base Address: 0x0000

MXC_R_SPI_DATA32

#define MXC_R_SPI_DATA32   ((uint32_t)0x00000000UL)

Offset from SPI Base Address: 0x0000

MXC_R_SPI_DATA8

#define MXC_R_SPI_DATA8   ((uint32_t)0x00000000UL)

Offset from SPI Base Address: 0x0000

MXC_R_SPI_DMA

#define MXC_R_SPI_DMA   ((uint32_t)0x0000001CUL)

Offset from SPI Base Address: 0x001C

MXC_R_SPI_INT_EN

#define MXC_R_SPI_INT_EN   ((uint32_t)0x00000024UL)

Offset from SPI Base Address: 0x0024

MXC_R_SPI_INT_FL

#define MXC_R_SPI_INT_FL   ((uint32_t)0x00000020UL)

Offset from SPI Base Address: 0x0020

MXC_R_SPI_MSTR_CNTL

#define MXC_R_SPI_MSTR_CNTL   ((uint32_t)0x00000004UL)

Offset from SPI Base Address: 0x0004

MXC_R_SPI_SS_TIME

#define MXC_R_SPI_SS_TIME   ((uint32_t)0x00000010UL)

Offset from SPI Base Address: 0x0010

MXC_R_SPI_STAT

#define MXC_R_SPI_STAT   ((uint32_t)0x00000030UL)

Offset from SPI Base Address: 0x0030

MXC_R_SPI_STATIC_CONFIG

#define MXC_R_SPI_STATIC_CONFIG   ((uint32_t)0x0000000CUL)

Offset from SPI Base Address: 0x000C

MXC_R_SPI_TRNMT_SIZE

#define MXC_R_SPI_TRNMT_SIZE   ((uint32_t)0x00000008UL)

Offset from SPI Base Address: 0x0008

MXC_R_SPI_WAKE_EN

#define MXC_R_SPI_WAKE_EN   ((uint32_t)0x0000002CUL)

Offset from SPI Base Address: 0x002C

MXC_R_SPI_WAKE_FL

#define MXC_R_SPI_WAKE_FL   ((uint32_t)0x00000028UL)

Offset from SPI Base Address: 0x0028