MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
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ADC_CTRL
Analog Digital Converter (ADC) » ADC_Registers

Macros

#define MXC_F_ADC_CTRL_START_POS   0
 
#define MXC_F_ADC_CTRL_START   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_START_POS))
 
#define MXC_V_ADC_CTRL_START_INACTIVE   ((uint32_t)0x0UL)
 
#define MXC_S_ADC_CTRL_START_INACTIVE   (MXC_V_ADC_CTRL_START_INACTIVE << MXC_F_ADC_CTRL_START_POS)
 
#define MXC_V_ADC_CTRL_START_START   ((uint32_t)0x1UL)
 
#define MXC_S_ADC_CTRL_START_START   (MXC_V_ADC_CTRL_START_START << MXC_F_ADC_CTRL_START_POS)
 
#define MXC_F_ADC_CTRL_PWR_POS   1
 
#define MXC_F_ADC_CTRL_PWR   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_PWR_POS))
 
#define MXC_V_ADC_CTRL_PWR_ADC_OFF   ((uint32_t)0x0UL)
 
#define MXC_S_ADC_CTRL_PWR_ADC_OFF   (MXC_V_ADC_CTRL_PWR_ADC_OFF << MXC_F_ADC_CTRL_PWR_POS)
 
#define MXC_V_ADC_CTRL_PWR_ADC_ON   ((uint32_t)0x1UL)
 
#define MXC_S_ADC_CTRL_PWR_ADC_ON   (MXC_V_ADC_CTRL_PWR_ADC_ON << MXC_F_ADC_CTRL_PWR_POS)
 
#define MXC_F_ADC_CTRL_REFBUF_PWR_POS   3
 
#define MXC_F_ADC_CTRL_REFBUF_PWR   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REFBUF_PWR_POS))
 
#define MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_OFF   ((uint32_t)0x0UL)
 
#define MXC_S_ADC_CTRL_REFBUF_PWR_REFBUF_OFF   (MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_OFF << MXC_F_ADC_CTRL_REFBUF_PWR_POS)
 
#define MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_ON   ((uint32_t)0x1UL)
 
#define MXC_S_ADC_CTRL_REFBUF_PWR_REFBUF_ON   (MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_ON << MXC_F_ADC_CTRL_REFBUF_PWR_POS)
 
#define MXC_F_ADC_CTRL_REF_SEL_POS   4
 
#define MXC_F_ADC_CTRL_REF_SEL   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SEL_POS))
 
#define MXC_V_ADC_CTRL_REF_SEL_BANDGAP   ((uint32_t)0x0UL)
 
#define MXC_S_ADC_CTRL_REF_SEL_BANDGAP   (MXC_V_ADC_CTRL_REF_SEL_BANDGAP << MXC_F_ADC_CTRL_REF_SEL_POS)
 
#define MXC_V_ADC_CTRL_REF_SEL_VDD_DIV2   ((uint32_t)0x1UL)
 
#define MXC_S_ADC_CTRL_REF_SEL_VDD_DIV2   (MXC_V_ADC_CTRL_REF_SEL_VDD_DIV2 << MXC_F_ADC_CTRL_REF_SEL_POS)
 
#define MXC_F_ADC_CTRL_REF_SCALE_POS   8
 
#define MXC_F_ADC_CTRL_REF_SCALE   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SCALE_POS))
 
#define MXC_V_ADC_CTRL_REF_SCALE_DIV1   ((uint32_t)0x0UL)
 
#define MXC_S_ADC_CTRL_REF_SCALE_DIV1   (MXC_V_ADC_CTRL_REF_SCALE_DIV1 << MXC_F_ADC_CTRL_REF_SCALE_POS)
 
#define MXC_V_ADC_CTRL_REF_SCALE_DIV2   ((uint32_t)0x1UL)
 
#define MXC_S_ADC_CTRL_REF_SCALE_DIV2   (MXC_V_ADC_CTRL_REF_SCALE_DIV2 << MXC_F_ADC_CTRL_REF_SCALE_POS)
 
#define MXC_F_ADC_CTRL_INPUT_SCALE_POS   9
 
#define MXC_F_ADC_CTRL_INPUT_SCALE   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_INPUT_SCALE_POS))
 
#define MXC_V_ADC_CTRL_INPUT_SCALE_DIV1   ((uint32_t)0x0UL)
 
#define MXC_S_ADC_CTRL_INPUT_SCALE_DIV1   (MXC_V_ADC_CTRL_INPUT_SCALE_DIV1 << MXC_F_ADC_CTRL_INPUT_SCALE_POS)
 
#define MXC_V_ADC_CTRL_INPUT_SCALE_DIV2   ((uint32_t)0x1UL)
 
#define MXC_S_ADC_CTRL_INPUT_SCALE_DIV2   (MXC_V_ADC_CTRL_INPUT_SCALE_DIV2 << MXC_F_ADC_CTRL_INPUT_SCALE_POS)
 
#define MXC_F_ADC_CTRL_CLK_EN_POS   11
 
#define MXC_F_ADC_CTRL_CLK_EN   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_CLK_EN_POS))
 
#define MXC_V_ADC_CTRL_CLK_EN_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_ADC_CTRL_CLK_EN_DIS   (MXC_V_ADC_CTRL_CLK_EN_DIS << MXC_F_ADC_CTRL_CLK_EN_POS)
 
#define MXC_V_ADC_CTRL_CLK_EN_EN   ((uint32_t)0x1UL)
 
#define MXC_S_ADC_CTRL_CLK_EN_EN   (MXC_V_ADC_CTRL_CLK_EN_EN << MXC_F_ADC_CTRL_CLK_EN_POS)
 
#define MXC_F_ADC_CTRL_CH_SEL_POS   12
 
#define MXC_F_ADC_CTRL_CH_SEL   ((uint32_t)(0xFUL << MXC_F_ADC_CTRL_CH_SEL_POS))
 
#define MXC_V_ADC_CTRL_CH_SEL_AIN0   ((uint32_t)0x0UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_AIN0   (MXC_V_ADC_CTRL_CH_SEL_AIN0 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_AIN1   ((uint32_t)0x1UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_AIN1   (MXC_V_ADC_CTRL_CH_SEL_AIN1 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_AIN2   ((uint32_t)0x2UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_AIN2   (MXC_V_ADC_CTRL_CH_SEL_AIN2 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_AIN3   ((uint32_t)0x3UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_AIN3   (MXC_V_ADC_CTRL_CH_SEL_AIN3 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_AIN0_DIV5   ((uint32_t)0x4UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_AIN0_DIV5   (MXC_V_ADC_CTRL_CH_SEL_AIN0_DIV5 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_AIN1_DIV5   ((uint32_t)0x5UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_AIN1_DIV5   (MXC_V_ADC_CTRL_CH_SEL_AIN1_DIV5 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_VDDB_DIV4   ((uint32_t)0x6UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_VDDB_DIV4   (MXC_V_ADC_CTRL_CH_SEL_VDDB_DIV4 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_VDDA   ((uint32_t)0x7UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_VDDA   (MXC_V_ADC_CTRL_CH_SEL_VDDA << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_VCORE   ((uint32_t)0x8UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_VCORE   (MXC_V_ADC_CTRL_CH_SEL_VCORE << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_VRTC_DIV2   ((uint32_t)0x9UL)
 
#define MXC_S_ADC_CTRL_CH_SEL_VRTC_DIV2   (MXC_V_ADC_CTRL_CH_SEL_VRTC_DIV2 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_RSV_0XA   ((uint32_t)0xAUL)
 
#define MXC_S_ADC_CTRL_CH_SEL_RSV_0XA   (MXC_V_ADC_CTRL_CH_SEL_RSV_0XA << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_VDDIO_DIV4   ((uint32_t)0xBUL)
 
#define MXC_S_ADC_CTRL_CH_SEL_VDDIO_DIV4   (MXC_V_ADC_CTRL_CH_SEL_VDDIO_DIV4 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_V_ADC_CTRL_CH_SEL_VDDIOH_DIV4   ((uint32_t)0xCUL)
 
#define MXC_S_ADC_CTRL_CH_SEL_VDDIOH_DIV4   (MXC_V_ADC_CTRL_CH_SEL_VDDIOH_DIV4 << MXC_F_ADC_CTRL_CH_SEL_POS)
 
#define MXC_F_ADC_CTRL_DATA_ALIGN_POS   17
 
#define MXC_F_ADC_CTRL_DATA_ALIGN   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_DATA_ALIGN_POS))
 
#define MXC_V_ADC_CTRL_DATA_ALIGN_LSB_JUSTIFIED   ((uint32_t)0x0UL)
 
#define MXC_S_ADC_CTRL_DATA_ALIGN_LSB_JUSTIFIED   (MXC_V_ADC_CTRL_DATA_ALIGN_LSB_JUSTIFIED << MXC_F_ADC_CTRL_DATA_ALIGN_POS)
 
#define MXC_V_ADC_CTRL_DATA_ALIGN_MSB_JUSTIFIED   ((uint32_t)0x1UL)
 
#define MXC_S_ADC_CTRL_DATA_ALIGN_MSB_JUSTIFIED   (MXC_V_ADC_CTRL_DATA_ALIGN_MSB_JUSTIFIED << MXC_F_ADC_CTRL_DATA_ALIGN_POS)
 

Detailed Description

ADC Control.

Macro Definition Documentation

◆ MXC_F_ADC_CTRL_CH_SEL

#define MXC_F_ADC_CTRL_CH_SEL   ((uint32_t)(0xFUL << MXC_F_ADC_CTRL_CH_SEL_POS))

CTRL_CH_SEL Mask

◆ MXC_F_ADC_CTRL_CH_SEL_POS

#define MXC_F_ADC_CTRL_CH_SEL_POS   12

CTRL_CH_SEL Position

◆ MXC_F_ADC_CTRL_CLK_EN

#define MXC_F_ADC_CTRL_CLK_EN   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_CLK_EN_POS))

CTRL_CLK_EN Mask

◆ MXC_F_ADC_CTRL_CLK_EN_POS

#define MXC_F_ADC_CTRL_CLK_EN_POS   11

CTRL_CLK_EN Position

◆ MXC_F_ADC_CTRL_DATA_ALIGN

#define MXC_F_ADC_CTRL_DATA_ALIGN   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_DATA_ALIGN_POS))

CTRL_DATA_ALIGN Mask

◆ MXC_F_ADC_CTRL_DATA_ALIGN_POS

#define MXC_F_ADC_CTRL_DATA_ALIGN_POS   17

CTRL_DATA_ALIGN Position

◆ MXC_F_ADC_CTRL_INPUT_SCALE

#define MXC_F_ADC_CTRL_INPUT_SCALE   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_INPUT_SCALE_POS))

CTRL_INPUT_SCALE Mask

◆ MXC_F_ADC_CTRL_INPUT_SCALE_POS

#define MXC_F_ADC_CTRL_INPUT_SCALE_POS   9

CTRL_INPUT_SCALE Position

◆ MXC_F_ADC_CTRL_PWR

#define MXC_F_ADC_CTRL_PWR   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_PWR_POS))

CTRL_PWR Mask

◆ MXC_F_ADC_CTRL_PWR_POS

#define MXC_F_ADC_CTRL_PWR_POS   1

CTRL_PWR Position

◆ MXC_F_ADC_CTRL_REF_SCALE

#define MXC_F_ADC_CTRL_REF_SCALE   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SCALE_POS))

CTRL_REF_SCALE Mask

◆ MXC_F_ADC_CTRL_REF_SCALE_POS

#define MXC_F_ADC_CTRL_REF_SCALE_POS   8

CTRL_REF_SCALE Position

◆ MXC_F_ADC_CTRL_REF_SEL

#define MXC_F_ADC_CTRL_REF_SEL   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SEL_POS))

CTRL_REF_SEL Mask

◆ MXC_F_ADC_CTRL_REF_SEL_POS

#define MXC_F_ADC_CTRL_REF_SEL_POS   4

CTRL_REF_SEL Position

◆ MXC_F_ADC_CTRL_REFBUF_PWR

#define MXC_F_ADC_CTRL_REFBUF_PWR   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REFBUF_PWR_POS))

CTRL_REFBUF_PWR Mask

◆ MXC_F_ADC_CTRL_REFBUF_PWR_POS

#define MXC_F_ADC_CTRL_REFBUF_PWR_POS   3

CTRL_REFBUF_PWR Position

◆ MXC_F_ADC_CTRL_START

#define MXC_F_ADC_CTRL_START   ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_START_POS))

CTRL_START Mask

◆ MXC_F_ADC_CTRL_START_POS

#define MXC_F_ADC_CTRL_START_POS   0

CTRL_START Position

◆ MXC_S_ADC_CTRL_CH_SEL_AIN0

#define MXC_S_ADC_CTRL_CH_SEL_AIN0   (MXC_V_ADC_CTRL_CH_SEL_AIN0 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_AIN0 Setting

◆ MXC_S_ADC_CTRL_CH_SEL_AIN0_DIV5

#define MXC_S_ADC_CTRL_CH_SEL_AIN0_DIV5   (MXC_V_ADC_CTRL_CH_SEL_AIN0_DIV5 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_AIN0_DIV5 Setting

◆ MXC_S_ADC_CTRL_CH_SEL_AIN1

#define MXC_S_ADC_CTRL_CH_SEL_AIN1   (MXC_V_ADC_CTRL_CH_SEL_AIN1 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_AIN1 Setting

◆ MXC_S_ADC_CTRL_CH_SEL_AIN1_DIV5

#define MXC_S_ADC_CTRL_CH_SEL_AIN1_DIV5   (MXC_V_ADC_CTRL_CH_SEL_AIN1_DIV5 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_AIN1_DIV5 Setting

◆ MXC_S_ADC_CTRL_CH_SEL_AIN2

#define MXC_S_ADC_CTRL_CH_SEL_AIN2   (MXC_V_ADC_CTRL_CH_SEL_AIN2 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_AIN2 Setting

◆ MXC_S_ADC_CTRL_CH_SEL_AIN3

#define MXC_S_ADC_CTRL_CH_SEL_AIN3   (MXC_V_ADC_CTRL_CH_SEL_AIN3 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_AIN3 Setting

◆ MXC_S_ADC_CTRL_CH_SEL_RSV_0XA

#define MXC_S_ADC_CTRL_CH_SEL_RSV_0XA   (MXC_V_ADC_CTRL_CH_SEL_RSV_0XA << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_RSV_0XA Setting

◆ MXC_S_ADC_CTRL_CH_SEL_VCORE

#define MXC_S_ADC_CTRL_CH_SEL_VCORE   (MXC_V_ADC_CTRL_CH_SEL_VCORE << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_VCORE Setting

◆ MXC_S_ADC_CTRL_CH_SEL_VDDA

#define MXC_S_ADC_CTRL_CH_SEL_VDDA   (MXC_V_ADC_CTRL_CH_SEL_VDDA << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_VDDA Setting

◆ MXC_S_ADC_CTRL_CH_SEL_VDDB_DIV4

#define MXC_S_ADC_CTRL_CH_SEL_VDDB_DIV4   (MXC_V_ADC_CTRL_CH_SEL_VDDB_DIV4 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_VDDB_DIV4 Setting

◆ MXC_S_ADC_CTRL_CH_SEL_VDDIO_DIV4

#define MXC_S_ADC_CTRL_CH_SEL_VDDIO_DIV4   (MXC_V_ADC_CTRL_CH_SEL_VDDIO_DIV4 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_VDDIO_DIV4 Setting

◆ MXC_S_ADC_CTRL_CH_SEL_VDDIOH_DIV4

#define MXC_S_ADC_CTRL_CH_SEL_VDDIOH_DIV4   (MXC_V_ADC_CTRL_CH_SEL_VDDIOH_DIV4 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_VDDIOH_DIV4 Setting

◆ MXC_S_ADC_CTRL_CH_SEL_VRTC_DIV2

#define MXC_S_ADC_CTRL_CH_SEL_VRTC_DIV2   (MXC_V_ADC_CTRL_CH_SEL_VRTC_DIV2 << MXC_F_ADC_CTRL_CH_SEL_POS)

CTRL_CH_SEL_VRTC_DIV2 Setting

◆ MXC_S_ADC_CTRL_CLK_EN_DIS

#define MXC_S_ADC_CTRL_CLK_EN_DIS   (MXC_V_ADC_CTRL_CLK_EN_DIS << MXC_F_ADC_CTRL_CLK_EN_POS)

CTRL_CLK_EN_DIS Setting

◆ MXC_S_ADC_CTRL_CLK_EN_EN

#define MXC_S_ADC_CTRL_CLK_EN_EN   (MXC_V_ADC_CTRL_CLK_EN_EN << MXC_F_ADC_CTRL_CLK_EN_POS)

CTRL_CLK_EN_EN Setting

◆ MXC_S_ADC_CTRL_DATA_ALIGN_LSB_JUSTIFIED

#define MXC_S_ADC_CTRL_DATA_ALIGN_LSB_JUSTIFIED   (MXC_V_ADC_CTRL_DATA_ALIGN_LSB_JUSTIFIED << MXC_F_ADC_CTRL_DATA_ALIGN_POS)

CTRL_DATA_ALIGN_LSB_JUSTIFIED Setting

◆ MXC_S_ADC_CTRL_DATA_ALIGN_MSB_JUSTIFIED

#define MXC_S_ADC_CTRL_DATA_ALIGN_MSB_JUSTIFIED   (MXC_V_ADC_CTRL_DATA_ALIGN_MSB_JUSTIFIED << MXC_F_ADC_CTRL_DATA_ALIGN_POS)

CTRL_DATA_ALIGN_MSB_JUSTIFIED Setting

◆ MXC_S_ADC_CTRL_INPUT_SCALE_DIV1

#define MXC_S_ADC_CTRL_INPUT_SCALE_DIV1   (MXC_V_ADC_CTRL_INPUT_SCALE_DIV1 << MXC_F_ADC_CTRL_INPUT_SCALE_POS)

CTRL_INPUT_SCALE_DIV1 Setting

◆ MXC_S_ADC_CTRL_INPUT_SCALE_DIV2

#define MXC_S_ADC_CTRL_INPUT_SCALE_DIV2   (MXC_V_ADC_CTRL_INPUT_SCALE_DIV2 << MXC_F_ADC_CTRL_INPUT_SCALE_POS)

CTRL_INPUT_SCALE_DIV2 Setting

◆ MXC_S_ADC_CTRL_PWR_ADC_OFF

#define MXC_S_ADC_CTRL_PWR_ADC_OFF   (MXC_V_ADC_CTRL_PWR_ADC_OFF << MXC_F_ADC_CTRL_PWR_POS)

CTRL_PWR_ADC_OFF Setting

◆ MXC_S_ADC_CTRL_PWR_ADC_ON

#define MXC_S_ADC_CTRL_PWR_ADC_ON   (MXC_V_ADC_CTRL_PWR_ADC_ON << MXC_F_ADC_CTRL_PWR_POS)

CTRL_PWR_ADC_ON Setting

◆ MXC_S_ADC_CTRL_REF_SCALE_DIV1

#define MXC_S_ADC_CTRL_REF_SCALE_DIV1   (MXC_V_ADC_CTRL_REF_SCALE_DIV1 << MXC_F_ADC_CTRL_REF_SCALE_POS)

CTRL_REF_SCALE_DIV1 Setting

◆ MXC_S_ADC_CTRL_REF_SCALE_DIV2

#define MXC_S_ADC_CTRL_REF_SCALE_DIV2   (MXC_V_ADC_CTRL_REF_SCALE_DIV2 << MXC_F_ADC_CTRL_REF_SCALE_POS)

CTRL_REF_SCALE_DIV2 Setting

◆ MXC_S_ADC_CTRL_REF_SEL_BANDGAP

#define MXC_S_ADC_CTRL_REF_SEL_BANDGAP   (MXC_V_ADC_CTRL_REF_SEL_BANDGAP << MXC_F_ADC_CTRL_REF_SEL_POS)

CTRL_REF_SEL_BANDGAP Setting

◆ MXC_S_ADC_CTRL_REF_SEL_VDD_DIV2

#define MXC_S_ADC_CTRL_REF_SEL_VDD_DIV2   (MXC_V_ADC_CTRL_REF_SEL_VDD_DIV2 << MXC_F_ADC_CTRL_REF_SEL_POS)

CTRL_REF_SEL_VDD_DIV2 Setting

◆ MXC_S_ADC_CTRL_REFBUF_PWR_REFBUF_OFF

#define MXC_S_ADC_CTRL_REFBUF_PWR_REFBUF_OFF   (MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_OFF << MXC_F_ADC_CTRL_REFBUF_PWR_POS)

CTRL_REFBUF_PWR_REFBUF_OFF Setting

◆ MXC_S_ADC_CTRL_REFBUF_PWR_REFBUF_ON

#define MXC_S_ADC_CTRL_REFBUF_PWR_REFBUF_ON   (MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_ON << MXC_F_ADC_CTRL_REFBUF_PWR_POS)

CTRL_REFBUF_PWR_REFBUF_ON Setting

◆ MXC_S_ADC_CTRL_START_INACTIVE

#define MXC_S_ADC_CTRL_START_INACTIVE   (MXC_V_ADC_CTRL_START_INACTIVE << MXC_F_ADC_CTRL_START_POS)

CTRL_START_INACTIVE Setting

◆ MXC_S_ADC_CTRL_START_START

#define MXC_S_ADC_CTRL_START_START   (MXC_V_ADC_CTRL_START_START << MXC_F_ADC_CTRL_START_POS)

CTRL_START_START Setting

◆ MXC_V_ADC_CTRL_CH_SEL_AIN0

#define MXC_V_ADC_CTRL_CH_SEL_AIN0   ((uint32_t)0x0UL)

CTRL_CH_SEL_AIN0 Value

◆ MXC_V_ADC_CTRL_CH_SEL_AIN0_DIV5

#define MXC_V_ADC_CTRL_CH_SEL_AIN0_DIV5   ((uint32_t)0x4UL)

CTRL_CH_SEL_AIN0_DIV5 Value

◆ MXC_V_ADC_CTRL_CH_SEL_AIN1

#define MXC_V_ADC_CTRL_CH_SEL_AIN1   ((uint32_t)0x1UL)

CTRL_CH_SEL_AIN1 Value

◆ MXC_V_ADC_CTRL_CH_SEL_AIN1_DIV5

#define MXC_V_ADC_CTRL_CH_SEL_AIN1_DIV5   ((uint32_t)0x5UL)

CTRL_CH_SEL_AIN1_DIV5 Value

◆ MXC_V_ADC_CTRL_CH_SEL_AIN2

#define MXC_V_ADC_CTRL_CH_SEL_AIN2   ((uint32_t)0x2UL)

CTRL_CH_SEL_AIN2 Value

◆ MXC_V_ADC_CTRL_CH_SEL_AIN3

#define MXC_V_ADC_CTRL_CH_SEL_AIN3   ((uint32_t)0x3UL)

CTRL_CH_SEL_AIN3 Value

◆ MXC_V_ADC_CTRL_CH_SEL_RSV_0XA

#define MXC_V_ADC_CTRL_CH_SEL_RSV_0XA   ((uint32_t)0xAUL)

CTRL_CH_SEL_RSV_0XA Value

◆ MXC_V_ADC_CTRL_CH_SEL_VCORE

#define MXC_V_ADC_CTRL_CH_SEL_VCORE   ((uint32_t)0x8UL)

CTRL_CH_SEL_VCORE Value

◆ MXC_V_ADC_CTRL_CH_SEL_VDDA

#define MXC_V_ADC_CTRL_CH_SEL_VDDA   ((uint32_t)0x7UL)

CTRL_CH_SEL_VDDA Value

◆ MXC_V_ADC_CTRL_CH_SEL_VDDB_DIV4

#define MXC_V_ADC_CTRL_CH_SEL_VDDB_DIV4   ((uint32_t)0x6UL)

CTRL_CH_SEL_VDDB_DIV4 Value

◆ MXC_V_ADC_CTRL_CH_SEL_VDDIO_DIV4

#define MXC_V_ADC_CTRL_CH_SEL_VDDIO_DIV4   ((uint32_t)0xBUL)

CTRL_CH_SEL_VDDIO_DIV4 Value

◆ MXC_V_ADC_CTRL_CH_SEL_VDDIOH_DIV4

#define MXC_V_ADC_CTRL_CH_SEL_VDDIOH_DIV4   ((uint32_t)0xCUL)

CTRL_CH_SEL_VDDIOH_DIV4 Value

◆ MXC_V_ADC_CTRL_CH_SEL_VRTC_DIV2

#define MXC_V_ADC_CTRL_CH_SEL_VRTC_DIV2   ((uint32_t)0x9UL)

CTRL_CH_SEL_VRTC_DIV2 Value

◆ MXC_V_ADC_CTRL_CLK_EN_DIS

#define MXC_V_ADC_CTRL_CLK_EN_DIS   ((uint32_t)0x0UL)

CTRL_CLK_EN_DIS Value

◆ MXC_V_ADC_CTRL_CLK_EN_EN

#define MXC_V_ADC_CTRL_CLK_EN_EN   ((uint32_t)0x1UL)

CTRL_CLK_EN_EN Value

◆ MXC_V_ADC_CTRL_DATA_ALIGN_LSB_JUSTIFIED

#define MXC_V_ADC_CTRL_DATA_ALIGN_LSB_JUSTIFIED   ((uint32_t)0x0UL)

CTRL_DATA_ALIGN_LSB_JUSTIFIED Value

◆ MXC_V_ADC_CTRL_DATA_ALIGN_MSB_JUSTIFIED

#define MXC_V_ADC_CTRL_DATA_ALIGN_MSB_JUSTIFIED   ((uint32_t)0x1UL)

CTRL_DATA_ALIGN_MSB_JUSTIFIED Value

◆ MXC_V_ADC_CTRL_INPUT_SCALE_DIV1

#define MXC_V_ADC_CTRL_INPUT_SCALE_DIV1   ((uint32_t)0x0UL)

CTRL_INPUT_SCALE_DIV1 Value

◆ MXC_V_ADC_CTRL_INPUT_SCALE_DIV2

#define MXC_V_ADC_CTRL_INPUT_SCALE_DIV2   ((uint32_t)0x1UL)

CTRL_INPUT_SCALE_DIV2 Value

◆ MXC_V_ADC_CTRL_PWR_ADC_OFF

#define MXC_V_ADC_CTRL_PWR_ADC_OFF   ((uint32_t)0x0UL)

CTRL_PWR_ADC_OFF Value

◆ MXC_V_ADC_CTRL_PWR_ADC_ON

#define MXC_V_ADC_CTRL_PWR_ADC_ON   ((uint32_t)0x1UL)

CTRL_PWR_ADC_ON Value

◆ MXC_V_ADC_CTRL_REF_SCALE_DIV1

#define MXC_V_ADC_CTRL_REF_SCALE_DIV1   ((uint32_t)0x0UL)

CTRL_REF_SCALE_DIV1 Value

◆ MXC_V_ADC_CTRL_REF_SCALE_DIV2

#define MXC_V_ADC_CTRL_REF_SCALE_DIV2   ((uint32_t)0x1UL)

CTRL_REF_SCALE_DIV2 Value

◆ MXC_V_ADC_CTRL_REF_SEL_BANDGAP

#define MXC_V_ADC_CTRL_REF_SEL_BANDGAP   ((uint32_t)0x0UL)

CTRL_REF_SEL_BANDGAP Value

◆ MXC_V_ADC_CTRL_REF_SEL_VDD_DIV2

#define MXC_V_ADC_CTRL_REF_SEL_VDD_DIV2   ((uint32_t)0x1UL)

CTRL_REF_SEL_VDD_DIV2 Value

◆ MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_OFF

#define MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_OFF   ((uint32_t)0x0UL)

CTRL_REFBUF_PWR_REFBUF_OFF Value

◆ MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_ON

#define MXC_V_ADC_CTRL_REFBUF_PWR_REFBUF_ON   ((uint32_t)0x1UL)

CTRL_REFBUF_PWR_REFBUF_ON Value

◆ MXC_V_ADC_CTRL_START_INACTIVE

#define MXC_V_ADC_CTRL_START_INACTIVE   ((uint32_t)0x0UL)

CTRL_START_INACTIVE Value

◆ MXC_V_ADC_CTRL_START_START

#define MXC_V_ADC_CTRL_START_START   ((uint32_t)0x1UL)

CTRL_START_START Value