MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
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Macros

#define MXC_F_CLCD_CTRL_CLCD_ENABLE_POS   0
 
#define MXC_F_CLCD_CTRL_CLCD_ENABLE   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_CLCD_ENABLE_POS))
 
#define MXC_V_CLCD_CTRL_CLCD_ENABLE_DIS   ((uint32_t)0x0UL)
 
#define MXC_S_CLCD_CTRL_CLCD_ENABLE_DIS   (MXC_V_CLCD_CTRL_CLCD_ENABLE_DIS << MXC_F_CLCD_CTRL_CLCD_ENABLE_POS)
 
#define MXC_V_CLCD_CTRL_CLCD_ENABLE_EN   ((uint32_t)0x1UL)
 
#define MXC_S_CLCD_CTRL_CLCD_ENABLE_EN   (MXC_V_CLCD_CTRL_CLCD_ENABLE_EN << MXC_F_CLCD_CTRL_CLCD_ENABLE_POS)
 
#define MXC_F_CLCD_CTRL_VCI_SEL_POS   1
 
#define MXC_F_CLCD_CTRL_VCI_SEL   ((uint32_t)(0x3UL << MXC_F_CLCD_CTRL_VCI_SEL_POS))
 
#define MXC_V_CLCD_CTRL_VCI_SEL_ON_VSYNC   ((uint32_t)0x0UL)
 
#define MXC_S_CLCD_CTRL_VCI_SEL_ON_VSYNC   (MXC_V_CLCD_CTRL_VCI_SEL_ON_VSYNC << MXC_F_CLCD_CTRL_VCI_SEL_POS)
 
#define MXC_V_CLCD_CTRL_VCI_SEL_ON_VBP   ((uint32_t)0x1UL)
 
#define MXC_S_CLCD_CTRL_VCI_SEL_ON_VBP   (MXC_V_CLCD_CTRL_VCI_SEL_ON_VBP << MXC_F_CLCD_CTRL_VCI_SEL_POS)
 
#define MXC_V_CLCD_CTRL_VCI_SEL_ON_VDEN   ((uint32_t)0x2UL)
 
#define MXC_S_CLCD_CTRL_VCI_SEL_ON_VDEN   (MXC_V_CLCD_CTRL_VCI_SEL_ON_VDEN << MXC_F_CLCD_CTRL_VCI_SEL_POS)
 
#define MXC_V_CLCD_CTRL_VCI_SEL_ON_VFP   ((uint32_t)0x3UL)
 
#define MXC_S_CLCD_CTRL_VCI_SEL_ON_VFP   (MXC_V_CLCD_CTRL_VCI_SEL_ON_VFP << MXC_F_CLCD_CTRL_VCI_SEL_POS)
 
#define MXC_F_CLCD_CTRL_DISPTYPE_POS   4
 
#define MXC_F_CLCD_CTRL_DISPTYPE   ((uint32_t)(0xFUL << MXC_F_CLCD_CTRL_DISPTYPE_POS))
 
#define MXC_V_CLCD_CTRL_DISPTYPE_8BITCOLORSTN   ((uint32_t)0x4UL)
 
#define MXC_S_CLCD_CTRL_DISPTYPE_8BITCOLORSTN   (MXC_V_CLCD_CTRL_DISPTYPE_8BITCOLORSTN << MXC_F_CLCD_CTRL_DISPTYPE_POS)
 
#define MXC_V_CLCD_CTRL_DISPTYPE_TFT   ((uint32_t)0x8UL)
 
#define MXC_S_CLCD_CTRL_DISPTYPE_TFT   (MXC_V_CLCD_CTRL_DISPTYPE_TFT << MXC_F_CLCD_CTRL_DISPTYPE_POS)
 
#define MXC_F_CLCD_CTRL_BPP_POS   8
 
#define MXC_F_CLCD_CTRL_BPP   ((uint32_t)(0x7UL << MXC_F_CLCD_CTRL_BPP_POS))
 
#define MXC_V_CLCD_CTRL_BPP_BPP1   ((uint32_t)0x0UL)
 
#define MXC_S_CLCD_CTRL_BPP_BPP1   (MXC_V_CLCD_CTRL_BPP_BPP1 << MXC_F_CLCD_CTRL_BPP_POS)
 
#define MXC_V_CLCD_CTRL_BPP_BPP2   ((uint32_t)0x1UL)
 
#define MXC_S_CLCD_CTRL_BPP_BPP2   (MXC_V_CLCD_CTRL_BPP_BPP2 << MXC_F_CLCD_CTRL_BPP_POS)
 
#define MXC_V_CLCD_CTRL_BPP_BPP4   ((uint32_t)0x2UL)
 
#define MXC_S_CLCD_CTRL_BPP_BPP4   (MXC_V_CLCD_CTRL_BPP_BPP4 << MXC_F_CLCD_CTRL_BPP_POS)
 
#define MXC_V_CLCD_CTRL_BPP_BPP8   ((uint32_t)0x3UL)
 
#define MXC_S_CLCD_CTRL_BPP_BPP8   (MXC_V_CLCD_CTRL_BPP_BPP8 << MXC_F_CLCD_CTRL_BPP_POS)
 
#define MXC_V_CLCD_CTRL_BPP_BPP16   ((uint32_t)0x4UL)
 
#define MXC_S_CLCD_CTRL_BPP_BPP16   (MXC_V_CLCD_CTRL_BPP_BPP16 << MXC_F_CLCD_CTRL_BPP_POS)
 
#define MXC_V_CLCD_CTRL_BPP_BPP24   ((uint32_t)0x5UL)
 
#define MXC_S_CLCD_CTRL_BPP_BPP24   (MXC_V_CLCD_CTRL_BPP_BPP24 << MXC_F_CLCD_CTRL_BPP_POS)
 
#define MXC_F_CLCD_CTRL_MODE565_POS   11
 
#define MXC_F_CLCD_CTRL_MODE565   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_MODE565_POS))
 
#define MXC_V_CLCD_CTRL_MODE565_BGR556   ((uint32_t)0x0UL)
 
#define MXC_S_CLCD_CTRL_MODE565_BGR556   (MXC_V_CLCD_CTRL_MODE565_BGR556 << MXC_F_CLCD_CTRL_MODE565_POS)
 
#define MXC_V_CLCD_CTRL_MODE565_RGB565   ((uint32_t)0x1UL)
 
#define MXC_S_CLCD_CTRL_MODE565_RGB565   (MXC_V_CLCD_CTRL_MODE565_RGB565 << MXC_F_CLCD_CTRL_MODE565_POS)
 
#define MXC_F_CLCD_CTRL_ENDIAN_POS   12
 
#define MXC_F_CLCD_CTRL_ENDIAN   ((uint32_t)(0x3UL << MXC_F_CLCD_CTRL_ENDIAN_POS))
 
#define MXC_V_CLCD_CTRL_ENDIAN_LBLP   ((uint32_t)0x0UL)
 
#define MXC_S_CLCD_CTRL_ENDIAN_LBLP   (MXC_V_CLCD_CTRL_ENDIAN_LBLP << MXC_F_CLCD_CTRL_ENDIAN_POS)
 
#define MXC_V_CLCD_CTRL_ENDIAN_BBBP   ((uint32_t)0x1UL)
 
#define MXC_S_CLCD_CTRL_ENDIAN_BBBP   (MXC_V_CLCD_CTRL_ENDIAN_BBBP << MXC_F_CLCD_CTRL_ENDIAN_POS)
 
#define MXC_V_CLCD_CTRL_ENDIAN_LBBP   ((uint32_t)0x2UL)
 
#define MXC_S_CLCD_CTRL_ENDIAN_LBBP   (MXC_V_CLCD_CTRL_ENDIAN_LBBP << MXC_F_CLCD_CTRL_ENDIAN_POS)
 
#define MXC_V_CLCD_CTRL_ENDIAN_RFU   ((uint32_t)0x3UL)
 
#define MXC_S_CLCD_CTRL_ENDIAN_RFU   (MXC_V_CLCD_CTRL_ENDIAN_RFU << MXC_F_CLCD_CTRL_ENDIAN_POS)
 
#define MXC_F_CLCD_CTRL_COMPACT_24B_POS   15
 
#define MXC_F_CLCD_CTRL_COMPACT_24B   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_COMPACT_24B_POS))
 
#define MXC_V_CLCD_CTRL_COMPACT_24B_1_PFR   ((uint32_t)0x0UL)
 
#define MXC_S_CLCD_CTRL_COMPACT_24B_1_PFR   (MXC_V_CLCD_CTRL_COMPACT_24B_1_PFR << MXC_F_CLCD_CTRL_COMPACT_24B_POS)
 
#define MXC_V_CLCD_CTRL_COMPACT_24B_1ANDA3RD_PFR   ((uint32_t)0x1UL)
 
#define MXC_S_CLCD_CTRL_COMPACT_24B_1ANDA3RD_PFR   (MXC_V_CLCD_CTRL_COMPACT_24B_1ANDA3RD_PFR << MXC_F_CLCD_CTRL_COMPACT_24B_POS)
 
#define MXC_F_CLCD_CTRL_BURST_SIZE_POS   19
 
#define MXC_F_CLCD_CTRL_BURST_SIZE   ((uint32_t)(0x3UL << MXC_F_CLCD_CTRL_BURST_SIZE_POS))
 
#define MXC_V_CLCD_CTRL_BURST_SIZE_4WORDS   ((uint32_t)0x0UL)
 
#define MXC_S_CLCD_CTRL_BURST_SIZE_4WORDS   (MXC_V_CLCD_CTRL_BURST_SIZE_4WORDS << MXC_F_CLCD_CTRL_BURST_SIZE_POS)
 
#define MXC_V_CLCD_CTRL_BURST_SIZE_8WORDS   ((uint32_t)0x1UL)
 
#define MXC_S_CLCD_CTRL_BURST_SIZE_8WORDS   (MXC_V_CLCD_CTRL_BURST_SIZE_8WORDS << MXC_F_CLCD_CTRL_BURST_SIZE_POS)
 
#define MXC_V_CLCD_CTRL_BURST_SIZE_16WORDS   ((uint32_t)0x2UL)
 
#define MXC_S_CLCD_CTRL_BURST_SIZE_16WORDS   (MXC_V_CLCD_CTRL_BURST_SIZE_16WORDS << MXC_F_CLCD_CTRL_BURST_SIZE_POS)
 
#define MXC_F_CLCD_CTRL_LEND_POL_POS   21
 
#define MXC_F_CLCD_CTRL_LEND_POL   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_LEND_POL_POS))
 
#define MXC_V_CLCD_CTRL_LEND_POL_ACTIVELO   ((uint32_t)0x0UL)
 
#define MXC_S_CLCD_CTRL_LEND_POL_ACTIVELO   (MXC_V_CLCD_CTRL_LEND_POL_ACTIVELO << MXC_F_CLCD_CTRL_LEND_POL_POS)
 
#define MXC_V_CLCD_CTRL_LEND_POL_ACTIVEHI   ((uint32_t)0x1UL)
 
#define MXC_S_CLCD_CTRL_LEND_POL_ACTIVEHI   (MXC_V_CLCD_CTRL_LEND_POL_ACTIVEHI << MXC_F_CLCD_CTRL_LEND_POL_POS)
 
#define MXC_F_CLCD_CTRL_PWR_ENABLE_POS   22
 
#define MXC_F_CLCD_CTRL_PWR_ENABLE   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_PWR_ENABLE_POS))
 
#define MXC_V_CLCD_CTRL_PWR_ENABLE_LO   ((uint32_t)0x0UL)
 
#define MXC_S_CLCD_CTRL_PWR_ENABLE_LO   (MXC_V_CLCD_CTRL_PWR_ENABLE_LO << MXC_F_CLCD_CTRL_PWR_ENABLE_POS)
 
#define MXC_V_CLCD_CTRL_PWR_ENABLE_HI   ((uint32_t)0x1UL)
 
#define MXC_S_CLCD_CTRL_PWR_ENABLE_HI   (MXC_V_CLCD_CTRL_PWR_ENABLE_HI << MXC_F_CLCD_CTRL_PWR_ENABLE_POS)
 

Detailed Description

LCD Control Register.

Macro Definition Documentation

◆ MXC_F_CLCD_CTRL_BPP

#define MXC_F_CLCD_CTRL_BPP   ((uint32_t)(0x7UL << MXC_F_CLCD_CTRL_BPP_POS))

CTRL_BPP Mask

◆ MXC_F_CLCD_CTRL_BPP_POS

#define MXC_F_CLCD_CTRL_BPP_POS   8

CTRL_BPP Position

◆ MXC_F_CLCD_CTRL_BURST_SIZE

#define MXC_F_CLCD_CTRL_BURST_SIZE   ((uint32_t)(0x3UL << MXC_F_CLCD_CTRL_BURST_SIZE_POS))

CTRL_BURST_SIZE Mask

◆ MXC_F_CLCD_CTRL_BURST_SIZE_POS

#define MXC_F_CLCD_CTRL_BURST_SIZE_POS   19

CTRL_BURST_SIZE Position

◆ MXC_F_CLCD_CTRL_CLCD_ENABLE

#define MXC_F_CLCD_CTRL_CLCD_ENABLE   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_CLCD_ENABLE_POS))

CTRL_CLCD_ENABLE Mask

◆ MXC_F_CLCD_CTRL_CLCD_ENABLE_POS

#define MXC_F_CLCD_CTRL_CLCD_ENABLE_POS   0

CTRL_CLCD_ENABLE Position

◆ MXC_F_CLCD_CTRL_COMPACT_24B

#define MXC_F_CLCD_CTRL_COMPACT_24B   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_COMPACT_24B_POS))

CTRL_COMPACT_24B Mask

◆ MXC_F_CLCD_CTRL_COMPACT_24B_POS

#define MXC_F_CLCD_CTRL_COMPACT_24B_POS   15

CTRL_COMPACT_24B Position

◆ MXC_F_CLCD_CTRL_DISPTYPE

#define MXC_F_CLCD_CTRL_DISPTYPE   ((uint32_t)(0xFUL << MXC_F_CLCD_CTRL_DISPTYPE_POS))

CTRL_DISPTYPE Mask

◆ MXC_F_CLCD_CTRL_DISPTYPE_POS

#define MXC_F_CLCD_CTRL_DISPTYPE_POS   4

CTRL_DISPTYPE Position

◆ MXC_F_CLCD_CTRL_ENDIAN

#define MXC_F_CLCD_CTRL_ENDIAN   ((uint32_t)(0x3UL << MXC_F_CLCD_CTRL_ENDIAN_POS))

CTRL_ENDIAN Mask

◆ MXC_F_CLCD_CTRL_ENDIAN_POS

#define MXC_F_CLCD_CTRL_ENDIAN_POS   12

CTRL_ENDIAN Position

◆ MXC_F_CLCD_CTRL_LEND_POL

#define MXC_F_CLCD_CTRL_LEND_POL   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_LEND_POL_POS))

CTRL_LEND_POL Mask

◆ MXC_F_CLCD_CTRL_LEND_POL_POS

#define MXC_F_CLCD_CTRL_LEND_POL_POS   21

CTRL_LEND_POL Position

◆ MXC_F_CLCD_CTRL_MODE565

#define MXC_F_CLCD_CTRL_MODE565   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_MODE565_POS))

CTRL_MODE565 Mask

◆ MXC_F_CLCD_CTRL_MODE565_POS

#define MXC_F_CLCD_CTRL_MODE565_POS   11

CTRL_MODE565 Position

◆ MXC_F_CLCD_CTRL_PWR_ENABLE

#define MXC_F_CLCD_CTRL_PWR_ENABLE   ((uint32_t)(0x1UL << MXC_F_CLCD_CTRL_PWR_ENABLE_POS))

CTRL_PWR_ENABLE Mask

◆ MXC_F_CLCD_CTRL_PWR_ENABLE_POS

#define MXC_F_CLCD_CTRL_PWR_ENABLE_POS   22

CTRL_PWR_ENABLE Position

◆ MXC_F_CLCD_CTRL_VCI_SEL

#define MXC_F_CLCD_CTRL_VCI_SEL   ((uint32_t)(0x3UL << MXC_F_CLCD_CTRL_VCI_SEL_POS))

CTRL_VCI_SEL Mask

◆ MXC_F_CLCD_CTRL_VCI_SEL_POS

#define MXC_F_CLCD_CTRL_VCI_SEL_POS   1

CTRL_VCI_SEL Position

◆ MXC_S_CLCD_CTRL_BPP_BPP1

#define MXC_S_CLCD_CTRL_BPP_BPP1   (MXC_V_CLCD_CTRL_BPP_BPP1 << MXC_F_CLCD_CTRL_BPP_POS)

CTRL_BPP_BPP1 Setting

◆ MXC_S_CLCD_CTRL_BPP_BPP16

#define MXC_S_CLCD_CTRL_BPP_BPP16   (MXC_V_CLCD_CTRL_BPP_BPP16 << MXC_F_CLCD_CTRL_BPP_POS)

CTRL_BPP_BPP16 Setting

◆ MXC_S_CLCD_CTRL_BPP_BPP2

#define MXC_S_CLCD_CTRL_BPP_BPP2   (MXC_V_CLCD_CTRL_BPP_BPP2 << MXC_F_CLCD_CTRL_BPP_POS)

CTRL_BPP_BPP2 Setting

◆ MXC_S_CLCD_CTRL_BPP_BPP24

#define MXC_S_CLCD_CTRL_BPP_BPP24   (MXC_V_CLCD_CTRL_BPP_BPP24 << MXC_F_CLCD_CTRL_BPP_POS)

CTRL_BPP_BPP24 Setting

◆ MXC_S_CLCD_CTRL_BPP_BPP4

#define MXC_S_CLCD_CTRL_BPP_BPP4   (MXC_V_CLCD_CTRL_BPP_BPP4 << MXC_F_CLCD_CTRL_BPP_POS)

CTRL_BPP_BPP4 Setting

◆ MXC_S_CLCD_CTRL_BPP_BPP8

#define MXC_S_CLCD_CTRL_BPP_BPP8   (MXC_V_CLCD_CTRL_BPP_BPP8 << MXC_F_CLCD_CTRL_BPP_POS)

CTRL_BPP_BPP8 Setting

◆ MXC_S_CLCD_CTRL_BURST_SIZE_16WORDS

#define MXC_S_CLCD_CTRL_BURST_SIZE_16WORDS   (MXC_V_CLCD_CTRL_BURST_SIZE_16WORDS << MXC_F_CLCD_CTRL_BURST_SIZE_POS)

CTRL_BURST_SIZE_16WORDS Setting

◆ MXC_S_CLCD_CTRL_BURST_SIZE_4WORDS

#define MXC_S_CLCD_CTRL_BURST_SIZE_4WORDS   (MXC_V_CLCD_CTRL_BURST_SIZE_4WORDS << MXC_F_CLCD_CTRL_BURST_SIZE_POS)

CTRL_BURST_SIZE_4WORDS Setting

◆ MXC_S_CLCD_CTRL_BURST_SIZE_8WORDS

#define MXC_S_CLCD_CTRL_BURST_SIZE_8WORDS   (MXC_V_CLCD_CTRL_BURST_SIZE_8WORDS << MXC_F_CLCD_CTRL_BURST_SIZE_POS)

CTRL_BURST_SIZE_8WORDS Setting

◆ MXC_S_CLCD_CTRL_CLCD_ENABLE_DIS

#define MXC_S_CLCD_CTRL_CLCD_ENABLE_DIS   (MXC_V_CLCD_CTRL_CLCD_ENABLE_DIS << MXC_F_CLCD_CTRL_CLCD_ENABLE_POS)

CTRL_CLCD_ENABLE_DIS Setting

◆ MXC_S_CLCD_CTRL_CLCD_ENABLE_EN

#define MXC_S_CLCD_CTRL_CLCD_ENABLE_EN   (MXC_V_CLCD_CTRL_CLCD_ENABLE_EN << MXC_F_CLCD_CTRL_CLCD_ENABLE_POS)

CTRL_CLCD_ENABLE_EN Setting

◆ MXC_S_CLCD_CTRL_COMPACT_24B_1_PFR

#define MXC_S_CLCD_CTRL_COMPACT_24B_1_PFR   (MXC_V_CLCD_CTRL_COMPACT_24B_1_PFR << MXC_F_CLCD_CTRL_COMPACT_24B_POS)

CTRL_COMPACT_24B_1_PFR Setting

◆ MXC_S_CLCD_CTRL_COMPACT_24B_1ANDA3RD_PFR

#define MXC_S_CLCD_CTRL_COMPACT_24B_1ANDA3RD_PFR   (MXC_V_CLCD_CTRL_COMPACT_24B_1ANDA3RD_PFR << MXC_F_CLCD_CTRL_COMPACT_24B_POS)

CTRL_COMPACT_24B_1ANDA3RD_PFR Setting

◆ MXC_S_CLCD_CTRL_DISPTYPE_8BITCOLORSTN

#define MXC_S_CLCD_CTRL_DISPTYPE_8BITCOLORSTN   (MXC_V_CLCD_CTRL_DISPTYPE_8BITCOLORSTN << MXC_F_CLCD_CTRL_DISPTYPE_POS)

CTRL_DISPTYPE_8BITCOLORSTN Setting

◆ MXC_S_CLCD_CTRL_DISPTYPE_TFT

#define MXC_S_CLCD_CTRL_DISPTYPE_TFT   (MXC_V_CLCD_CTRL_DISPTYPE_TFT << MXC_F_CLCD_CTRL_DISPTYPE_POS)

CTRL_DISPTYPE_TFT Setting

◆ MXC_S_CLCD_CTRL_ENDIAN_BBBP

#define MXC_S_CLCD_CTRL_ENDIAN_BBBP   (MXC_V_CLCD_CTRL_ENDIAN_BBBP << MXC_F_CLCD_CTRL_ENDIAN_POS)

CTRL_ENDIAN_BBBP Setting

◆ MXC_S_CLCD_CTRL_ENDIAN_LBBP

#define MXC_S_CLCD_CTRL_ENDIAN_LBBP   (MXC_V_CLCD_CTRL_ENDIAN_LBBP << MXC_F_CLCD_CTRL_ENDIAN_POS)

CTRL_ENDIAN_LBBP Setting

◆ MXC_S_CLCD_CTRL_ENDIAN_LBLP

#define MXC_S_CLCD_CTRL_ENDIAN_LBLP   (MXC_V_CLCD_CTRL_ENDIAN_LBLP << MXC_F_CLCD_CTRL_ENDIAN_POS)

CTRL_ENDIAN_LBLP Setting

◆ MXC_S_CLCD_CTRL_ENDIAN_RFU

#define MXC_S_CLCD_CTRL_ENDIAN_RFU   (MXC_V_CLCD_CTRL_ENDIAN_RFU << MXC_F_CLCD_CTRL_ENDIAN_POS)

CTRL_ENDIAN_RFU Setting

◆ MXC_S_CLCD_CTRL_LEND_POL_ACTIVEHI

#define MXC_S_CLCD_CTRL_LEND_POL_ACTIVEHI   (MXC_V_CLCD_CTRL_LEND_POL_ACTIVEHI << MXC_F_CLCD_CTRL_LEND_POL_POS)

CTRL_LEND_POL_ACTIVEHI Setting

◆ MXC_S_CLCD_CTRL_LEND_POL_ACTIVELO

#define MXC_S_CLCD_CTRL_LEND_POL_ACTIVELO   (MXC_V_CLCD_CTRL_LEND_POL_ACTIVELO << MXC_F_CLCD_CTRL_LEND_POL_POS)

CTRL_LEND_POL_ACTIVELO Setting

◆ MXC_S_CLCD_CTRL_MODE565_BGR556

#define MXC_S_CLCD_CTRL_MODE565_BGR556   (MXC_V_CLCD_CTRL_MODE565_BGR556 << MXC_F_CLCD_CTRL_MODE565_POS)

CTRL_MODE565_BGR556 Setting

◆ MXC_S_CLCD_CTRL_MODE565_RGB565

#define MXC_S_CLCD_CTRL_MODE565_RGB565   (MXC_V_CLCD_CTRL_MODE565_RGB565 << MXC_F_CLCD_CTRL_MODE565_POS)

CTRL_MODE565_RGB565 Setting

◆ MXC_S_CLCD_CTRL_PWR_ENABLE_HI

#define MXC_S_CLCD_CTRL_PWR_ENABLE_HI   (MXC_V_CLCD_CTRL_PWR_ENABLE_HI << MXC_F_CLCD_CTRL_PWR_ENABLE_POS)

CTRL_PWR_ENABLE_HI Setting

◆ MXC_S_CLCD_CTRL_PWR_ENABLE_LO

#define MXC_S_CLCD_CTRL_PWR_ENABLE_LO   (MXC_V_CLCD_CTRL_PWR_ENABLE_LO << MXC_F_CLCD_CTRL_PWR_ENABLE_POS)

CTRL_PWR_ENABLE_LO Setting

◆ MXC_S_CLCD_CTRL_VCI_SEL_ON_VBP

#define MXC_S_CLCD_CTRL_VCI_SEL_ON_VBP   (MXC_V_CLCD_CTRL_VCI_SEL_ON_VBP << MXC_F_CLCD_CTRL_VCI_SEL_POS)

CTRL_VCI_SEL_ON_VBP Setting

◆ MXC_S_CLCD_CTRL_VCI_SEL_ON_VDEN

#define MXC_S_CLCD_CTRL_VCI_SEL_ON_VDEN   (MXC_V_CLCD_CTRL_VCI_SEL_ON_VDEN << MXC_F_CLCD_CTRL_VCI_SEL_POS)

CTRL_VCI_SEL_ON_VDEN Setting

◆ MXC_S_CLCD_CTRL_VCI_SEL_ON_VFP

#define MXC_S_CLCD_CTRL_VCI_SEL_ON_VFP   (MXC_V_CLCD_CTRL_VCI_SEL_ON_VFP << MXC_F_CLCD_CTRL_VCI_SEL_POS)

CTRL_VCI_SEL_ON_VFP Setting

◆ MXC_S_CLCD_CTRL_VCI_SEL_ON_VSYNC

#define MXC_S_CLCD_CTRL_VCI_SEL_ON_VSYNC   (MXC_V_CLCD_CTRL_VCI_SEL_ON_VSYNC << MXC_F_CLCD_CTRL_VCI_SEL_POS)

CTRL_VCI_SEL_ON_VSYNC Setting

◆ MXC_V_CLCD_CTRL_BPP_BPP1

#define MXC_V_CLCD_CTRL_BPP_BPP1   ((uint32_t)0x0UL)

CTRL_BPP_BPP1 Value

◆ MXC_V_CLCD_CTRL_BPP_BPP16

#define MXC_V_CLCD_CTRL_BPP_BPP16   ((uint32_t)0x4UL)

CTRL_BPP_BPP16 Value

◆ MXC_V_CLCD_CTRL_BPP_BPP2

#define MXC_V_CLCD_CTRL_BPP_BPP2   ((uint32_t)0x1UL)

CTRL_BPP_BPP2 Value

◆ MXC_V_CLCD_CTRL_BPP_BPP24

#define MXC_V_CLCD_CTRL_BPP_BPP24   ((uint32_t)0x5UL)

CTRL_BPP_BPP24 Value

◆ MXC_V_CLCD_CTRL_BPP_BPP4

#define MXC_V_CLCD_CTRL_BPP_BPP4   ((uint32_t)0x2UL)

CTRL_BPP_BPP4 Value

◆ MXC_V_CLCD_CTRL_BPP_BPP8

#define MXC_V_CLCD_CTRL_BPP_BPP8   ((uint32_t)0x3UL)

CTRL_BPP_BPP8 Value

◆ MXC_V_CLCD_CTRL_BURST_SIZE_16WORDS

#define MXC_V_CLCD_CTRL_BURST_SIZE_16WORDS   ((uint32_t)0x2UL)

CTRL_BURST_SIZE_16WORDS Value

◆ MXC_V_CLCD_CTRL_BURST_SIZE_4WORDS

#define MXC_V_CLCD_CTRL_BURST_SIZE_4WORDS   ((uint32_t)0x0UL)

CTRL_BURST_SIZE_4WORDS Value

◆ MXC_V_CLCD_CTRL_BURST_SIZE_8WORDS

#define MXC_V_CLCD_CTRL_BURST_SIZE_8WORDS   ((uint32_t)0x1UL)

CTRL_BURST_SIZE_8WORDS Value

◆ MXC_V_CLCD_CTRL_CLCD_ENABLE_DIS

#define MXC_V_CLCD_CTRL_CLCD_ENABLE_DIS   ((uint32_t)0x0UL)

CTRL_CLCD_ENABLE_DIS Value

◆ MXC_V_CLCD_CTRL_CLCD_ENABLE_EN

#define MXC_V_CLCD_CTRL_CLCD_ENABLE_EN   ((uint32_t)0x1UL)

CTRL_CLCD_ENABLE_EN Value

◆ MXC_V_CLCD_CTRL_COMPACT_24B_1_PFR

#define MXC_V_CLCD_CTRL_COMPACT_24B_1_PFR   ((uint32_t)0x0UL)

CTRL_COMPACT_24B_1_PFR Value

◆ MXC_V_CLCD_CTRL_COMPACT_24B_1ANDA3RD_PFR

#define MXC_V_CLCD_CTRL_COMPACT_24B_1ANDA3RD_PFR   ((uint32_t)0x1UL)

CTRL_COMPACT_24B_1ANDA3RD_PFR Value

◆ MXC_V_CLCD_CTRL_DISPTYPE_8BITCOLORSTN

#define MXC_V_CLCD_CTRL_DISPTYPE_8BITCOLORSTN   ((uint32_t)0x4UL)

CTRL_DISPTYPE_8BITCOLORSTN Value

◆ MXC_V_CLCD_CTRL_DISPTYPE_TFT

#define MXC_V_CLCD_CTRL_DISPTYPE_TFT   ((uint32_t)0x8UL)

CTRL_DISPTYPE_TFT Value

◆ MXC_V_CLCD_CTRL_ENDIAN_BBBP

#define MXC_V_CLCD_CTRL_ENDIAN_BBBP   ((uint32_t)0x1UL)

CTRL_ENDIAN_BBBP Value

◆ MXC_V_CLCD_CTRL_ENDIAN_LBBP

#define MXC_V_CLCD_CTRL_ENDIAN_LBBP   ((uint32_t)0x2UL)

CTRL_ENDIAN_LBBP Value

◆ MXC_V_CLCD_CTRL_ENDIAN_LBLP

#define MXC_V_CLCD_CTRL_ENDIAN_LBLP   ((uint32_t)0x0UL)

CTRL_ENDIAN_LBLP Value

◆ MXC_V_CLCD_CTRL_ENDIAN_RFU

#define MXC_V_CLCD_CTRL_ENDIAN_RFU   ((uint32_t)0x3UL)

CTRL_ENDIAN_RFU Value

◆ MXC_V_CLCD_CTRL_LEND_POL_ACTIVEHI

#define MXC_V_CLCD_CTRL_LEND_POL_ACTIVEHI   ((uint32_t)0x1UL)

CTRL_LEND_POL_ACTIVEHI Value

◆ MXC_V_CLCD_CTRL_LEND_POL_ACTIVELO

#define MXC_V_CLCD_CTRL_LEND_POL_ACTIVELO   ((uint32_t)0x0UL)

CTRL_LEND_POL_ACTIVELO Value

◆ MXC_V_CLCD_CTRL_MODE565_BGR556

#define MXC_V_CLCD_CTRL_MODE565_BGR556   ((uint32_t)0x0UL)

CTRL_MODE565_BGR556 Value

◆ MXC_V_CLCD_CTRL_MODE565_RGB565

#define MXC_V_CLCD_CTRL_MODE565_RGB565   ((uint32_t)0x1UL)

CTRL_MODE565_RGB565 Value

◆ MXC_V_CLCD_CTRL_PWR_ENABLE_HI

#define MXC_V_CLCD_CTRL_PWR_ENABLE_HI   ((uint32_t)0x1UL)

CTRL_PWR_ENABLE_HI Value

◆ MXC_V_CLCD_CTRL_PWR_ENABLE_LO

#define MXC_V_CLCD_CTRL_PWR_ENABLE_LO   ((uint32_t)0x0UL)

CTRL_PWR_ENABLE_LO Value

◆ MXC_V_CLCD_CTRL_VCI_SEL_ON_VBP

#define MXC_V_CLCD_CTRL_VCI_SEL_ON_VBP   ((uint32_t)0x1UL)

CTRL_VCI_SEL_ON_VBP Value

◆ MXC_V_CLCD_CTRL_VCI_SEL_ON_VDEN

#define MXC_V_CLCD_CTRL_VCI_SEL_ON_VDEN   ((uint32_t)0x2UL)

CTRL_VCI_SEL_ON_VDEN Value

◆ MXC_V_CLCD_CTRL_VCI_SEL_ON_VFP

#define MXC_V_CLCD_CTRL_VCI_SEL_ON_VFP   ((uint32_t)0x3UL)

CTRL_VCI_SEL_ON_VFP Value

◆ MXC_V_CLCD_CTRL_VCI_SEL_ON_VSYNC

#define MXC_V_CLCD_CTRL_VCI_SEL_ON_VSYNC   ((uint32_t)0x0UL)

CTRL_VCI_SEL_ON_VSYNC Value