Macros
#define	MXC_F_DMA_ST_CH_ST_POS 0

#define	MXC_F_DMA_ST_CH_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_CH_ST_POS))

#define	MXC_V_DMA_ST_CH_ST_DISABLED ((uint32_t)0x0UL)

#define	MXC_S_DMA_ST_CH_ST_DISABLED (MXC_V_DMA_ST_CH_ST_DISABLED << MXC_F_DMA_ST_CH_ST_POS)

#define	MXC_V_DMA_ST_CH_ST_ENABLED ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_CH_ST_ENABLED (MXC_V_DMA_ST_CH_ST_ENABLED << MXC_F_DMA_ST_CH_ST_POS)

#define	MXC_F_DMA_ST_IPEND_POS 1

#define	MXC_F_DMA_ST_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_ST_IPEND_POS))

#define	MXC_V_DMA_ST_IPEND_INACTIVE ((uint32_t)0x0UL)

#define	MXC_S_DMA_ST_IPEND_INACTIVE (MXC_V_DMA_ST_IPEND_INACTIVE << MXC_F_DMA_ST_IPEND_POS)

#define	MXC_V_DMA_ST_IPEND_PENDING ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_IPEND_PENDING (MXC_V_DMA_ST_IPEND_PENDING << MXC_F_DMA_ST_IPEND_POS)

#define	MXC_F_DMA_ST_CTZ_ST_POS 2

#define	MXC_F_DMA_ST_CTZ_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_CTZ_ST_POS))

#define	MXC_V_DMA_ST_CTZ_ST_NOEVENT ((uint32_t)0x0UL)

#define	MXC_S_DMA_ST_CTZ_ST_NOEVENT (MXC_V_DMA_ST_CTZ_ST_NOEVENT << MXC_F_DMA_ST_CTZ_ST_POS)

#define	MXC_V_DMA_ST_CTZ_ST_CTZ_OCCUR ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_CTZ_ST_CTZ_OCCUR (MXC_V_DMA_ST_CTZ_ST_CTZ_OCCUR << MXC_F_DMA_ST_CTZ_ST_POS)

#define	MXC_V_DMA_ST_CTZ_ST_CLEAR ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_CTZ_ST_CLEAR (MXC_V_DMA_ST_CTZ_ST_CLEAR << MXC_F_DMA_ST_CTZ_ST_POS)

#define	MXC_F_DMA_ST_RLD_ST_POS 3

#define	MXC_F_DMA_ST_RLD_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_RLD_ST_POS))

#define	MXC_V_DMA_ST_RLD_ST_NOEVENT ((uint32_t)0x0UL)

#define	MXC_S_DMA_ST_RLD_ST_NOEVENT (MXC_V_DMA_ST_RLD_ST_NOEVENT << MXC_F_DMA_ST_RLD_ST_POS)

#define	MXC_V_DMA_ST_RLD_ST_RELOADED ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_RLD_ST_RELOADED (MXC_V_DMA_ST_RLD_ST_RELOADED << MXC_F_DMA_ST_RLD_ST_POS)

#define	MXC_V_DMA_ST_RLD_ST_CLEAR ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_RLD_ST_CLEAR (MXC_V_DMA_ST_RLD_ST_CLEAR << MXC_F_DMA_ST_RLD_ST_POS)

#define	MXC_F_DMA_ST_BUS_ERR_POS 4

#define	MXC_F_DMA_ST_BUS_ERR ((uint32_t)(0x1UL << MXC_F_DMA_ST_BUS_ERR_POS))

#define	MXC_V_DMA_ST_BUS_ERR_NOEVENT ((uint32_t)0x0UL)

#define	MXC_S_DMA_ST_BUS_ERR_NOEVENT (MXC_V_DMA_ST_BUS_ERR_NOEVENT << MXC_F_DMA_ST_BUS_ERR_POS)

#define	MXC_V_DMA_ST_BUS_ERR_BUS_ERR ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_BUS_ERR_BUS_ERR (MXC_V_DMA_ST_BUS_ERR_BUS_ERR << MXC_F_DMA_ST_BUS_ERR_POS)

#define	MXC_V_DMA_ST_BUS_ERR_CLEAR ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_BUS_ERR_CLEAR (MXC_V_DMA_ST_BUS_ERR_CLEAR << MXC_F_DMA_ST_BUS_ERR_POS)

#define	MXC_F_DMA_ST_TO_ST_POS 6

#define	MXC_F_DMA_ST_TO_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_TO_ST_POS))

#define	MXC_V_DMA_ST_TO_ST_NOEVENT ((uint32_t)0x0UL)

#define	MXC_S_DMA_ST_TO_ST_NOEVENT (MXC_V_DMA_ST_TO_ST_NOEVENT << MXC_F_DMA_ST_TO_ST_POS)

#define	MXC_V_DMA_ST_TO_ST_EXPIRED ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_TO_ST_EXPIRED (MXC_V_DMA_ST_TO_ST_EXPIRED << MXC_F_DMA_ST_TO_ST_POS)

#define	MXC_V_DMA_ST_TO_ST_CLEAR ((uint32_t)0x1UL)

#define	MXC_S_DMA_ST_TO_ST_CLEAR (MXC_V_DMA_ST_TO_ST_CLEAR << MXC_F_DMA_ST_TO_ST_POS)

Detailed Description

DMA Channel Status Register.

Macro Definition Documentation

◆ MXC_F_DMA_ST_BUS_ERR

#define MXC_F_DMA_ST_BUS_ERR ((uint32_t)(0x1UL << MXC_F_DMA_ST_BUS_ERR_POS))

ST_BUS_ERR Mask

◆ MXC_F_DMA_ST_BUS_ERR_POS

#define MXC_F_DMA_ST_BUS_ERR_POS 4

ST_BUS_ERR Position

◆ MXC_F_DMA_ST_CH_ST

#define MXC_F_DMA_ST_CH_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_CH_ST_POS))

ST_CH_ST Mask

◆ MXC_F_DMA_ST_CH_ST_POS

#define MXC_F_DMA_ST_CH_ST_POS 0

ST_CH_ST Position

◆ MXC_F_DMA_ST_CTZ_ST

#define MXC_F_DMA_ST_CTZ_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_CTZ_ST_POS))

ST_CTZ_ST Mask

◆ MXC_F_DMA_ST_CTZ_ST_POS

#define MXC_F_DMA_ST_CTZ_ST_POS 2

ST_CTZ_ST Position

◆ MXC_F_DMA_ST_IPEND

#define MXC_F_DMA_ST_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_ST_IPEND_POS))

ST_IPEND Mask

◆ MXC_F_DMA_ST_IPEND_POS

#define MXC_F_DMA_ST_IPEND_POS 1

ST_IPEND Position

◆ MXC_F_DMA_ST_RLD_ST

#define MXC_F_DMA_ST_RLD_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_RLD_ST_POS))

ST_RLD_ST Mask

◆ MXC_F_DMA_ST_RLD_ST_POS

#define MXC_F_DMA_ST_RLD_ST_POS 3

ST_RLD_ST Position

◆ MXC_F_DMA_ST_TO_ST

#define MXC_F_DMA_ST_TO_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_TO_ST_POS))

ST_TO_ST Mask

◆ MXC_F_DMA_ST_TO_ST_POS

#define MXC_F_DMA_ST_TO_ST_POS 6

ST_TO_ST Position

◆ MXC_S_DMA_ST_BUS_ERR_BUS_ERR

#define MXC_S_DMA_ST_BUS_ERR_BUS_ERR (MXC_V_DMA_ST_BUS_ERR_BUS_ERR << MXC_F_DMA_ST_BUS_ERR_POS)

ST_BUS_ERR_BUS_ERR Setting

◆ MXC_S_DMA_ST_BUS_ERR_CLEAR

#define MXC_S_DMA_ST_BUS_ERR_CLEAR (MXC_V_DMA_ST_BUS_ERR_CLEAR << MXC_F_DMA_ST_BUS_ERR_POS)

ST_BUS_ERR_CLEAR Setting

◆ MXC_S_DMA_ST_BUS_ERR_NOEVENT

#define MXC_S_DMA_ST_BUS_ERR_NOEVENT (MXC_V_DMA_ST_BUS_ERR_NOEVENT << MXC_F_DMA_ST_BUS_ERR_POS)

ST_BUS_ERR_NOEVENT Setting

◆ MXC_S_DMA_ST_CH_ST_DISABLED

#define MXC_S_DMA_ST_CH_ST_DISABLED (MXC_V_DMA_ST_CH_ST_DISABLED << MXC_F_DMA_ST_CH_ST_POS)

ST_CH_ST_DISABLED Setting

◆ MXC_S_DMA_ST_CH_ST_ENABLED

#define MXC_S_DMA_ST_CH_ST_ENABLED (MXC_V_DMA_ST_CH_ST_ENABLED << MXC_F_DMA_ST_CH_ST_POS)

ST_CH_ST_ENABLED Setting

◆ MXC_S_DMA_ST_CTZ_ST_CLEAR

#define MXC_S_DMA_ST_CTZ_ST_CLEAR (MXC_V_DMA_ST_CTZ_ST_CLEAR << MXC_F_DMA_ST_CTZ_ST_POS)

ST_CTZ_ST_CLEAR Setting

◆ MXC_S_DMA_ST_CTZ_ST_CTZ_OCCUR

#define MXC_S_DMA_ST_CTZ_ST_CTZ_OCCUR (MXC_V_DMA_ST_CTZ_ST_CTZ_OCCUR << MXC_F_DMA_ST_CTZ_ST_POS)

ST_CTZ_ST_CTZ_OCCUR Setting

◆ MXC_S_DMA_ST_CTZ_ST_NOEVENT

#define MXC_S_DMA_ST_CTZ_ST_NOEVENT (MXC_V_DMA_ST_CTZ_ST_NOEVENT << MXC_F_DMA_ST_CTZ_ST_POS)

ST_CTZ_ST_NOEVENT Setting

◆ MXC_S_DMA_ST_IPEND_INACTIVE

#define MXC_S_DMA_ST_IPEND_INACTIVE (MXC_V_DMA_ST_IPEND_INACTIVE << MXC_F_DMA_ST_IPEND_POS)

ST_IPEND_INACTIVE Setting

◆ MXC_S_DMA_ST_IPEND_PENDING

#define MXC_S_DMA_ST_IPEND_PENDING (MXC_V_DMA_ST_IPEND_PENDING << MXC_F_DMA_ST_IPEND_POS)

ST_IPEND_PENDING Setting

◆ MXC_S_DMA_ST_RLD_ST_CLEAR

#define MXC_S_DMA_ST_RLD_ST_CLEAR (MXC_V_DMA_ST_RLD_ST_CLEAR << MXC_F_DMA_ST_RLD_ST_POS)

ST_RLD_ST_CLEAR Setting

◆ MXC_S_DMA_ST_RLD_ST_NOEVENT

#define MXC_S_DMA_ST_RLD_ST_NOEVENT (MXC_V_DMA_ST_RLD_ST_NOEVENT << MXC_F_DMA_ST_RLD_ST_POS)

ST_RLD_ST_NOEVENT Setting

◆ MXC_S_DMA_ST_RLD_ST_RELOADED

#define MXC_S_DMA_ST_RLD_ST_RELOADED (MXC_V_DMA_ST_RLD_ST_RELOADED << MXC_F_DMA_ST_RLD_ST_POS)

ST_RLD_ST_RELOADED Setting

◆ MXC_S_DMA_ST_TO_ST_CLEAR

#define MXC_S_DMA_ST_TO_ST_CLEAR (MXC_V_DMA_ST_TO_ST_CLEAR << MXC_F_DMA_ST_TO_ST_POS)

ST_TO_ST_CLEAR Setting

◆ MXC_S_DMA_ST_TO_ST_EXPIRED

#define MXC_S_DMA_ST_TO_ST_EXPIRED (MXC_V_DMA_ST_TO_ST_EXPIRED << MXC_F_DMA_ST_TO_ST_POS)

ST_TO_ST_EXPIRED Setting

◆ MXC_S_DMA_ST_TO_ST_NOEVENT

#define MXC_S_DMA_ST_TO_ST_NOEVENT (MXC_V_DMA_ST_TO_ST_NOEVENT << MXC_F_DMA_ST_TO_ST_POS)

ST_TO_ST_NOEVENT Setting

◆ MXC_V_DMA_ST_BUS_ERR_BUS_ERR

#define MXC_V_DMA_ST_BUS_ERR_BUS_ERR ((uint32_t)0x1UL)

ST_BUS_ERR_BUS_ERR Value

◆ MXC_V_DMA_ST_BUS_ERR_CLEAR

#define MXC_V_DMA_ST_BUS_ERR_CLEAR ((uint32_t)0x1UL)

ST_BUS_ERR_CLEAR Value

◆ MXC_V_DMA_ST_BUS_ERR_NOEVENT

#define MXC_V_DMA_ST_BUS_ERR_NOEVENT ((uint32_t)0x0UL)

ST_BUS_ERR_NOEVENT Value

◆ MXC_V_DMA_ST_CH_ST_DISABLED

#define MXC_V_DMA_ST_CH_ST_DISABLED ((uint32_t)0x0UL)

ST_CH_ST_DISABLED Value

◆ MXC_V_DMA_ST_CH_ST_ENABLED

#define MXC_V_DMA_ST_CH_ST_ENABLED ((uint32_t)0x1UL)

ST_CH_ST_ENABLED Value

◆ MXC_V_DMA_ST_CTZ_ST_CLEAR

#define MXC_V_DMA_ST_CTZ_ST_CLEAR ((uint32_t)0x1UL)

ST_CTZ_ST_CLEAR Value

◆ MXC_V_DMA_ST_CTZ_ST_CTZ_OCCUR

#define MXC_V_DMA_ST_CTZ_ST_CTZ_OCCUR ((uint32_t)0x1UL)

ST_CTZ_ST_CTZ_OCCUR Value

◆ MXC_V_DMA_ST_CTZ_ST_NOEVENT

#define MXC_V_DMA_ST_CTZ_ST_NOEVENT ((uint32_t)0x0UL)

ST_CTZ_ST_NOEVENT Value

◆ MXC_V_DMA_ST_IPEND_INACTIVE

#define MXC_V_DMA_ST_IPEND_INACTIVE ((uint32_t)0x0UL)

ST_IPEND_INACTIVE Value

◆ MXC_V_DMA_ST_IPEND_PENDING

#define MXC_V_DMA_ST_IPEND_PENDING ((uint32_t)0x1UL)

ST_IPEND_PENDING Value

◆ MXC_V_DMA_ST_RLD_ST_CLEAR

#define MXC_V_DMA_ST_RLD_ST_CLEAR ((uint32_t)0x1UL)

ST_RLD_ST_CLEAR Value

◆ MXC_V_DMA_ST_RLD_ST_NOEVENT

#define MXC_V_DMA_ST_RLD_ST_NOEVENT ((uint32_t)0x0UL)

ST_RLD_ST_NOEVENT Value

◆ MXC_V_DMA_ST_RLD_ST_RELOADED

#define MXC_V_DMA_ST_RLD_ST_RELOADED ((uint32_t)0x1UL)

ST_RLD_ST_RELOADED Value

◆ MXC_V_DMA_ST_TO_ST_CLEAR

#define MXC_V_DMA_ST_TO_ST_CLEAR ((uint32_t)0x1UL)

ST_TO_ST_CLEAR Value

◆ MXC_V_DMA_ST_TO_ST_EXPIRED

#define MXC_V_DMA_ST_TO_ST_EXPIRED ((uint32_t)0x1UL)

ST_TO_ST_EXPIRED Value

◆ MXC_V_DMA_ST_TO_ST_NOEVENT

#define MXC_V_DMA_ST_TO_ST_NOEVENT ((uint32_t)0x0UL)

ST_TO_ST_NOEVENT Value

Macros