MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
Macros
Register Offsets
External Memory Cache Controller (EMCC) » EMCC_Registers

Macros

#define MXC_R_EMCC_CACHE_ID   ((uint32_t)0x00000000UL)
 
#define MXC_R_EMCC_MEM_SIZE   ((uint32_t)0x00000004UL)
 
#define MXC_R_EMCC_CACHE_CTRL   ((uint32_t)0x00000100UL)
 
#define MXC_R_EMCC_INVALIDATE   ((uint32_t)0x00000700UL)
 

Detailed Description

EMCC Peripheral Register Offsets from the EMCC Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_EMCC_CACHE_CTRL

#define MXC_R_EMCC_CACHE_CTRL   ((uint32_t)0x00000100UL)

Offset from EMCC Base Address: 0x0100

◆ MXC_R_EMCC_CACHE_ID

#define MXC_R_EMCC_CACHE_ID   ((uint32_t)0x00000000UL)

Offset from EMCC Base Address: 0x0000

◆ MXC_R_EMCC_INVALIDATE

#define MXC_R_EMCC_INVALIDATE   ((uint32_t)0x00000700UL)

Offset from EMCC Base Address: 0x0700

◆ MXC_R_EMCC_MEM_SIZE

#define MXC_R_EMCC_MEM_SIZE   ((uint32_t)0x00000004UL)

Offset from EMCC Base Address: 0x0004