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MAX32650 Peripheral Driver API
Peripheral Driver API for the MAX32650
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Macros | |
| #define | MXC_F_HPB_INTEN_ERRINTE_POS 1 |
| #define | MXC_F_HPB_INTEN_ERRINTE ((uint32_t)(0x1UL << MXC_F_HPB_INTEN_ERRINTE_POS)) |
| #define | MXC_V_HPB_INTEN_ERRINTE_DIS ((uint32_t)0x0UL) |
| #define | MXC_S_HPB_INTEN_ERRINTE_DIS (MXC_V_HPB_INTEN_ERRINTE_DIS << MXC_F_HPB_INTEN_ERRINTE_POS) |
| #define | MXC_V_HPB_INTEN_ERRINTE_EN ((uint32_t)0x1UL) |
| #define | MXC_S_HPB_INTEN_ERRINTE_EN (MXC_V_HPB_INTEN_ERRINTE_EN << MXC_F_HPB_INTEN_ERRINTE_POS) |
HPB Interrupt Enable.
| #define MXC_F_HPB_INTEN_ERRINTE ((uint32_t)(0x1UL << MXC_F_HPB_INTEN_ERRINTE_POS)) |
INTEN_ERRINTE Mask
| #define MXC_F_HPB_INTEN_ERRINTE_POS 1 |
INTEN_ERRINTE Position
| #define MXC_S_HPB_INTEN_ERRINTE_DIS (MXC_V_HPB_INTEN_ERRINTE_DIS << MXC_F_HPB_INTEN_ERRINTE_POS) |
INTEN_ERRINTE_DIS Setting
| #define MXC_S_HPB_INTEN_ERRINTE_EN (MXC_V_HPB_INTEN_ERRINTE_EN << MXC_F_HPB_INTEN_ERRINTE_POS) |
INTEN_ERRINTE_EN Setting
| #define MXC_V_HPB_INTEN_ERRINTE_DIS ((uint32_t)0x0UL) |
INTEN_ERRINTE_DIS Value
| #define MXC_V_HPB_INTEN_ERRINTE_EN ((uint32_t)0x1UL) |
INTEN_ERRINTE_EN Value