HPB_MTR

Macros
#define	MXC_F_HPB_MTR_LATENCY_POS   0
#define	MXC_F_HPB_MTR_LATENCY   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_LATENCY_POS))
#define	MXC_V_HPB_MTR_LATENCY_5CLK   ((uint32_t)0x0UL)
#define	MXC_S_HPB_MTR_LATENCY_5CLK   (MXC_V_HPB_MTR_LATENCY_5CLK << MXC_F_HPB_MTR_LATENCY_POS)
#define	MXC_V_HPB_MTR_LATENCY_6CLK   ((uint32_t)0x1UL)
#define	MXC_S_HPB_MTR_LATENCY_6CLK   (MXC_V_HPB_MTR_LATENCY_6CLK << MXC_F_HPB_MTR_LATENCY_POS)
#define	MXC_V_HPB_MTR_LATENCY_3CLK   ((uint32_t)0xEUL)
#define	MXC_S_HPB_MTR_LATENCY_3CLK   (MXC_V_HPB_MTR_LATENCY_3CLK << MXC_F_HPB_MTR_LATENCY_POS)
#define	MXC_V_HPB_MTR_LATENCY_4CLK   ((uint32_t)0xFUL)
#define	MXC_S_HPB_MTR_LATENCY_4CLK   (MXC_V_HPB_MTR_LATENCY_4CLK << MXC_F_HPB_MTR_LATENCY_POS)
#define	MXC_F_HPB_MTR_WCSH_POS   8
#define	MXC_F_HPB_MTR_WCSH   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_WCSH_POS))
#define	MXC_F_HPB_MTR_RCSH_POS   12
#define	MXC_F_HPB_MTR_RCSH   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_RCSH_POS))
#define	MXC_F_HPB_MTR_WCSS_POS   16
#define	MXC_F_HPB_MTR_WCSS   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_WCSS_POS))
#define	MXC_F_HPB_MTR_RCSS_POS   20
#define	MXC_F_HPB_MTR_RCSS   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_RCSS_POS))
#define	MXC_F_HPB_MTR_WCSHI_POS   24
#define	MXC_F_HPB_MTR_WCSHI   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_WCSHI_POS))
#define	MXC_F_HPB_MTR_RCSHI_POS   28
#define	MXC_F_HPB_MTR_RCSHI   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_RCSHI_POS))

Detailed Description

HPB Memory Timing Register.

Macro Definition Documentation

MXC_F_HPB_MTR_LATENCY

#define MXC_F_HPB_MTR_LATENCY   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_LATENCY_POS))

MTR_LATENCY Mask

MXC_F_HPB_MTR_LATENCY_POS

#define MXC_F_HPB_MTR_LATENCY_POS   0

MTR_LATENCY Position

MXC_F_HPB_MTR_RCSH

#define MXC_F_HPB_MTR_RCSH   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_RCSH_POS))

MTR_RCSH Mask

MXC_F_HPB_MTR_RCSH_POS

#define MXC_F_HPB_MTR_RCSH_POS   12

MTR_RCSH Position

MXC_F_HPB_MTR_RCSHI

#define MXC_F_HPB_MTR_RCSHI   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_RCSHI_POS))

MTR_RCSHI Mask

MXC_F_HPB_MTR_RCSHI_POS

#define MXC_F_HPB_MTR_RCSHI_POS   28

MTR_RCSHI Position

MXC_F_HPB_MTR_RCSS

#define MXC_F_HPB_MTR_RCSS   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_RCSS_POS))

MTR_RCSS Mask

MXC_F_HPB_MTR_RCSS_POS

#define MXC_F_HPB_MTR_RCSS_POS   20

MTR_RCSS Position

MXC_F_HPB_MTR_WCSH

#define MXC_F_HPB_MTR_WCSH   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_WCSH_POS))

MTR_WCSH Mask

MXC_F_HPB_MTR_WCSH_POS

#define MXC_F_HPB_MTR_WCSH_POS   8

MTR_WCSH Position

MXC_F_HPB_MTR_WCSHI

#define MXC_F_HPB_MTR_WCSHI   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_WCSHI_POS))

MTR_WCSHI Mask

MXC_F_HPB_MTR_WCSHI_POS

#define MXC_F_HPB_MTR_WCSHI_POS   24

MTR_WCSHI Position

MXC_F_HPB_MTR_WCSS

#define MXC_F_HPB_MTR_WCSS   ((uint32_t)(0xFUL << MXC_F_HPB_MTR_WCSS_POS))

MTR_WCSS Mask

MXC_F_HPB_MTR_WCSS_POS

#define MXC_F_HPB_MTR_WCSS_POS   16

MTR_WCSS Position

MXC_S_HPB_MTR_LATENCY_3CLK

#define MXC_S_HPB_MTR_LATENCY_3CLK   (MXC_V_HPB_MTR_LATENCY_3CLK << MXC_F_HPB_MTR_LATENCY_POS)

MTR_LATENCY_3CLK Setting

MXC_S_HPB_MTR_LATENCY_4CLK

#define MXC_S_HPB_MTR_LATENCY_4CLK   (MXC_V_HPB_MTR_LATENCY_4CLK << MXC_F_HPB_MTR_LATENCY_POS)

MTR_LATENCY_4CLK Setting

MXC_S_HPB_MTR_LATENCY_5CLK

#define MXC_S_HPB_MTR_LATENCY_5CLK   (MXC_V_HPB_MTR_LATENCY_5CLK << MXC_F_HPB_MTR_LATENCY_POS)

MTR_LATENCY_5CLK Setting

MXC_S_HPB_MTR_LATENCY_6CLK

#define MXC_S_HPB_MTR_LATENCY_6CLK   (MXC_V_HPB_MTR_LATENCY_6CLK << MXC_F_HPB_MTR_LATENCY_POS)

MTR_LATENCY_6CLK Setting

MXC_V_HPB_MTR_LATENCY_3CLK

#define MXC_V_HPB_MTR_LATENCY_3CLK   ((uint32_t)0xEUL)

MTR_LATENCY_3CLK Value

MXC_V_HPB_MTR_LATENCY_4CLK

#define MXC_V_HPB_MTR_LATENCY_4CLK   ((uint32_t)0xFUL)

MTR_LATENCY_4CLK Value

MXC_V_HPB_MTR_LATENCY_5CLK

#define MXC_V_HPB_MTR_LATENCY_5CLK   ((uint32_t)0x0UL)

MTR_LATENCY_5CLK Value

MXC_V_HPB_MTR_LATENCY_6CLK

#define MXC_V_HPB_MTR_LATENCY_6CLK   ((uint32_t)0x1UL)

MTR_LATENCY_6CLK Value