I2C_CTRL0

Macros
#define	MXC_F_I2C_CTRL0_I2CEN_POS   0
#define	MXC_F_I2C_CTRL0_I2CEN   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_I2CEN_POS))
#define	MXC_V_I2C_CTRL0_I2CEN_DIS   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_I2CEN_DIS   (MXC_V_I2C_CTRL0_I2CEN_DIS << MXC_F_I2C_CTRL0_I2CEN_POS)
#define	MXC_V_I2C_CTRL0_I2CEN_EN   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_I2CEN_EN   (MXC_V_I2C_CTRL0_I2CEN_EN << MXC_F_I2C_CTRL0_I2CEN_POS)
#define	MXC_F_I2C_CTRL0_MST_POS   1
#define	MXC_F_I2C_CTRL0_MST   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_MST_POS))
#define	MXC_V_I2C_CTRL0_MST_SLAVE_MODE   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_MST_SLAVE_MODE   (MXC_V_I2C_CTRL0_MST_SLAVE_MODE << MXC_F_I2C_CTRL0_MST_POS)
#define	MXC_V_I2C_CTRL0_MST_MASTER_MODE   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_MST_MASTER_MODE   (MXC_V_I2C_CTRL0_MST_MASTER_MODE << MXC_F_I2C_CTRL0_MST_POS)
#define	MXC_F_I2C_CTRL0_GCEN_POS   2
#define	MXC_F_I2C_CTRL0_GCEN   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_GCEN_POS))
#define	MXC_V_I2C_CTRL0_GCEN_DIS   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_GCEN_DIS   (MXC_V_I2C_CTRL0_GCEN_DIS << MXC_F_I2C_CTRL0_GCEN_POS)
#define	MXC_V_I2C_CTRL0_GCEN_EN   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_GCEN_EN   (MXC_V_I2C_CTRL0_GCEN_EN << MXC_F_I2C_CTRL0_GCEN_POS)
#define	MXC_F_I2C_CTRL0_IRXM_POS   3
#define	MXC_F_I2C_CTRL0_IRXM   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_IRXM_POS))
#define	MXC_V_I2C_CTRL0_IRXM_DIS   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_IRXM_DIS   (MXC_V_I2C_CTRL0_IRXM_DIS << MXC_F_I2C_CTRL0_IRXM_POS)
#define	MXC_V_I2C_CTRL0_IRXM_EN   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_IRXM_EN   (MXC_V_I2C_CTRL0_IRXM_EN << MXC_F_I2C_CTRL0_IRXM_POS)
#define	MXC_F_I2C_CTRL0_ACK_POS   4
#define	MXC_F_I2C_CTRL0_ACK   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_ACK_POS))
#define	MXC_V_I2C_CTRL0_ACK_ACK   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_ACK_ACK   (MXC_V_I2C_CTRL0_ACK_ACK << MXC_F_I2C_CTRL0_ACK_POS)
#define	MXC_V_I2C_CTRL0_ACK_NACK   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_ACK_NACK   (MXC_V_I2C_CTRL0_ACK_NACK << MXC_F_I2C_CTRL0_ACK_POS)
#define	MXC_F_I2C_CTRL0_SCL_OUT_POS   6
#define	MXC_F_I2C_CTRL0_SCL_OUT   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_OUT_POS))
#define	MXC_V_I2C_CTRL0_SCL_OUT_LOW   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_SCL_OUT_LOW   (MXC_V_I2C_CTRL0_SCL_OUT_LOW << MXC_F_I2C_CTRL0_SCL_OUT_POS)
#define	MXC_V_I2C_CTRL0_SCL_OUT_HIGH   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_SCL_OUT_HIGH   (MXC_V_I2C_CTRL0_SCL_OUT_HIGH << MXC_F_I2C_CTRL0_SCL_OUT_POS)
#define	MXC_F_I2C_CTRL0_SDA_OUT_POS   7
#define	MXC_F_I2C_CTRL0_SDA_OUT   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SDA_OUT_POS))
#define	MXC_V_I2C_CTRL0_SDA_OUT_LOW   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_SDA_OUT_LOW   (MXC_V_I2C_CTRL0_SDA_OUT_LOW << MXC_F_I2C_CTRL0_SDA_OUT_POS)
#define	MXC_V_I2C_CTRL0_SDA_OUT_HIGH   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_SDA_OUT_HIGH   (MXC_V_I2C_CTRL0_SDA_OUT_HIGH << MXC_F_I2C_CTRL0_SDA_OUT_POS)
#define	MXC_F_I2C_CTRL0_SCL_POS   8
#define	MXC_F_I2C_CTRL0_SCL   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_POS))
#define	MXC_V_I2C_CTRL0_SCL_LOW   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_SCL_LOW   (MXC_V_I2C_CTRL0_SCL_LOW << MXC_F_I2C_CTRL0_SCL_POS)
#define	MXC_V_I2C_CTRL0_SCL_HIGH   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_SCL_HIGH   (MXC_V_I2C_CTRL0_SCL_HIGH << MXC_F_I2C_CTRL0_SCL_POS)
#define	MXC_F_I2C_CTRL0_SDA_POS   9
#define	MXC_F_I2C_CTRL0_SDA   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SDA_POS))
#define	MXC_V_I2C_CTRL0_SDA_LOW   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_SDA_LOW   (MXC_V_I2C_CTRL0_SDA_LOW << MXC_F_I2C_CTRL0_SDA_POS)
#define	MXC_V_I2C_CTRL0_SDA_HIGH   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_SDA_HIGH   (MXC_V_I2C_CTRL0_SDA_HIGH << MXC_F_I2C_CTRL0_SDA_POS)
#define	MXC_F_I2C_CTRL0_SWOE_POS   10
#define	MXC_F_I2C_CTRL0_SWOE   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SWOE_POS))
#define	MXC_V_I2C_CTRL0_SWOE_DIS   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_SWOE_DIS   (MXC_V_I2C_CTRL0_SWOE_DIS << MXC_F_I2C_CTRL0_SWOE_POS)
#define	MXC_V_I2C_CTRL0_SWOE_EN   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_SWOE_EN   (MXC_V_I2C_CTRL0_SWOE_EN << MXC_F_I2C_CTRL0_SWOE_POS)
#define	MXC_F_I2C_CTRL0_READ_POS   11
#define	MXC_F_I2C_CTRL0_READ   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_READ_POS))
#define	MXC_V_I2C_CTRL0_READ_WRITE   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_READ_WRITE   (MXC_V_I2C_CTRL0_READ_WRITE << MXC_F_I2C_CTRL0_READ_POS)
#define	MXC_V_I2C_CTRL0_READ_READ   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_READ_READ   (MXC_V_I2C_CTRL0_READ_READ << MXC_F_I2C_CTRL0_READ_POS)
#define	MXC_F_I2C_CTRL0_SCL_STRD_POS   12
#define	MXC_F_I2C_CTRL0_SCL_STRD   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_STRD_POS))
#define	MXC_V_I2C_CTRL0_SCL_STRD_EN   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_SCL_STRD_EN   (MXC_V_I2C_CTRL0_SCL_STRD_EN << MXC_F_I2C_CTRL0_SCL_STRD_POS)
#define	MXC_V_I2C_CTRL0_SCL_STRD_DIS   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_SCL_STRD_DIS   (MXC_V_I2C_CTRL0_SCL_STRD_DIS << MXC_F_I2C_CTRL0_SCL_STRD_POS)
#define	MXC_F_I2C_CTRL0_SCL_PPM_POS   13
#define	MXC_F_I2C_CTRL0_SCL_PPM   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_PPM_POS))
#define	MXC_V_I2C_CTRL0_SCL_PPM_DIS   ((uint32_t)0x0UL)
#define	MXC_S_I2C_CTRL0_SCL_PPM_DIS   (MXC_V_I2C_CTRL0_SCL_PPM_DIS << MXC_F_I2C_CTRL0_SCL_PPM_POS)
#define	MXC_V_I2C_CTRL0_SCL_PPM_EN   ((uint32_t)0x1UL)
#define	MXC_S_I2C_CTRL0_SCL_PPM_EN   (MXC_V_I2C_CTRL0_SCL_PPM_EN << MXC_F_I2C_CTRL0_SCL_PPM_POS)

Detailed Description

Control Register 0.

Macro Definition Documentation

MXC_F_I2C_CTRL0_ACK

#define MXC_F_I2C_CTRL0_ACK   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_ACK_POS))

CTRL0_ACK Mask

MXC_F_I2C_CTRL0_ACK_POS

#define MXC_F_I2C_CTRL0_ACK_POS   4

CTRL0_ACK Position

MXC_F_I2C_CTRL0_GCEN

#define MXC_F_I2C_CTRL0_GCEN   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_GCEN_POS))

CTRL0_GCEN Mask

MXC_F_I2C_CTRL0_GCEN_POS

#define MXC_F_I2C_CTRL0_GCEN_POS   2

CTRL0_GCEN Position

MXC_F_I2C_CTRL0_I2CEN

#define MXC_F_I2C_CTRL0_I2CEN   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_I2CEN_POS))

CTRL0_I2CEN Mask

MXC_F_I2C_CTRL0_I2CEN_POS

#define MXC_F_I2C_CTRL0_I2CEN_POS   0

CTRL0_I2CEN Position

MXC_F_I2C_CTRL0_IRXM

#define MXC_F_I2C_CTRL0_IRXM   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_IRXM_POS))

CTRL0_IRXM Mask

MXC_F_I2C_CTRL0_IRXM_POS

#define MXC_F_I2C_CTRL0_IRXM_POS   3

CTRL0_IRXM Position

MXC_F_I2C_CTRL0_MST

#define MXC_F_I2C_CTRL0_MST   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_MST_POS))

CTRL0_MST Mask

MXC_F_I2C_CTRL0_MST_POS

#define MXC_F_I2C_CTRL0_MST_POS   1

CTRL0_MST Position

MXC_F_I2C_CTRL0_READ

#define MXC_F_I2C_CTRL0_READ   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_READ_POS))

CTRL0_READ Mask

MXC_F_I2C_CTRL0_READ_POS

#define MXC_F_I2C_CTRL0_READ_POS   11

CTRL0_READ Position

MXC_F_I2C_CTRL0_SCL

#define MXC_F_I2C_CTRL0_SCL   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_POS))

CTRL0_SCL Mask

MXC_F_I2C_CTRL0_SCL_OUT

#define MXC_F_I2C_CTRL0_SCL_OUT   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_OUT_POS))

CTRL0_SCL_OUT Mask

MXC_F_I2C_CTRL0_SCL_OUT_POS

#define MXC_F_I2C_CTRL0_SCL_OUT_POS   6

CTRL0_SCL_OUT Position

MXC_F_I2C_CTRL0_SCL_POS

#define MXC_F_I2C_CTRL0_SCL_POS   8

CTRL0_SCL Position

MXC_F_I2C_CTRL0_SCL_PPM

#define MXC_F_I2C_CTRL0_SCL_PPM   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_PPM_POS))

CTRL0_SCL_PPM Mask

MXC_F_I2C_CTRL0_SCL_PPM_POS

#define MXC_F_I2C_CTRL0_SCL_PPM_POS   13

CTRL0_SCL_PPM Position

MXC_F_I2C_CTRL0_SCL_STRD

#define MXC_F_I2C_CTRL0_SCL_STRD   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_STRD_POS))

CTRL0_SCL_STRD Mask

MXC_F_I2C_CTRL0_SCL_STRD_POS

#define MXC_F_I2C_CTRL0_SCL_STRD_POS   12

CTRL0_SCL_STRD Position

MXC_F_I2C_CTRL0_SDA

#define MXC_F_I2C_CTRL0_SDA   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SDA_POS))

CTRL0_SDA Mask

MXC_F_I2C_CTRL0_SDA_OUT

#define MXC_F_I2C_CTRL0_SDA_OUT   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SDA_OUT_POS))

CTRL0_SDA_OUT Mask

MXC_F_I2C_CTRL0_SDA_OUT_POS

#define MXC_F_I2C_CTRL0_SDA_OUT_POS   7

CTRL0_SDA_OUT Position

MXC_F_I2C_CTRL0_SDA_POS

#define MXC_F_I2C_CTRL0_SDA_POS   9

CTRL0_SDA Position

MXC_F_I2C_CTRL0_SWOE

#define MXC_F_I2C_CTRL0_SWOE   ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SWOE_POS))

CTRL0_SWOE Mask

MXC_F_I2C_CTRL0_SWOE_POS

#define MXC_F_I2C_CTRL0_SWOE_POS   10

CTRL0_SWOE Position

MXC_S_I2C_CTRL0_ACK_ACK

#define MXC_S_I2C_CTRL0_ACK_ACK   (MXC_V_I2C_CTRL0_ACK_ACK << MXC_F_I2C_CTRL0_ACK_POS)

CTRL0_ACK_ACK Setting

MXC_S_I2C_CTRL0_ACK_NACK

#define MXC_S_I2C_CTRL0_ACK_NACK   (MXC_V_I2C_CTRL0_ACK_NACK << MXC_F_I2C_CTRL0_ACK_POS)

CTRL0_ACK_NACK Setting

MXC_S_I2C_CTRL0_GCEN_DIS

#define MXC_S_I2C_CTRL0_GCEN_DIS   (MXC_V_I2C_CTRL0_GCEN_DIS << MXC_F_I2C_CTRL0_GCEN_POS)

CTRL0_GCEN_DIS Setting

MXC_S_I2C_CTRL0_GCEN_EN

#define MXC_S_I2C_CTRL0_GCEN_EN   (MXC_V_I2C_CTRL0_GCEN_EN << MXC_F_I2C_CTRL0_GCEN_POS)

CTRL0_GCEN_EN Setting

MXC_S_I2C_CTRL0_I2CEN_DIS

#define MXC_S_I2C_CTRL0_I2CEN_DIS   (MXC_V_I2C_CTRL0_I2CEN_DIS << MXC_F_I2C_CTRL0_I2CEN_POS)

CTRL0_I2CEN_DIS Setting

MXC_S_I2C_CTRL0_I2CEN_EN

#define MXC_S_I2C_CTRL0_I2CEN_EN   (MXC_V_I2C_CTRL0_I2CEN_EN << MXC_F_I2C_CTRL0_I2CEN_POS)

CTRL0_I2CEN_EN Setting

MXC_S_I2C_CTRL0_IRXM_DIS

#define MXC_S_I2C_CTRL0_IRXM_DIS   (MXC_V_I2C_CTRL0_IRXM_DIS << MXC_F_I2C_CTRL0_IRXM_POS)

CTRL0_IRXM_DIS Setting

MXC_S_I2C_CTRL0_IRXM_EN

#define MXC_S_I2C_CTRL0_IRXM_EN   (MXC_V_I2C_CTRL0_IRXM_EN << MXC_F_I2C_CTRL0_IRXM_POS)

CTRL0_IRXM_EN Setting

MXC_S_I2C_CTRL0_MST_MASTER_MODE

#define MXC_S_I2C_CTRL0_MST_MASTER_MODE   (MXC_V_I2C_CTRL0_MST_MASTER_MODE << MXC_F_I2C_CTRL0_MST_POS)

CTRL0_MST_MASTER_MODE Setting

MXC_S_I2C_CTRL0_MST_SLAVE_MODE

#define MXC_S_I2C_CTRL0_MST_SLAVE_MODE   (MXC_V_I2C_CTRL0_MST_SLAVE_MODE << MXC_F_I2C_CTRL0_MST_POS)

CTRL0_MST_SLAVE_MODE Setting

MXC_S_I2C_CTRL0_READ_READ

#define MXC_S_I2C_CTRL0_READ_READ   (MXC_V_I2C_CTRL0_READ_READ << MXC_F_I2C_CTRL0_READ_POS)

CTRL0_READ_READ Setting

MXC_S_I2C_CTRL0_READ_WRITE

#define MXC_S_I2C_CTRL0_READ_WRITE   (MXC_V_I2C_CTRL0_READ_WRITE << MXC_F_I2C_CTRL0_READ_POS)

CTRL0_READ_WRITE Setting

MXC_S_I2C_CTRL0_SCL_HIGH

#define MXC_S_I2C_CTRL0_SCL_HIGH   (MXC_V_I2C_CTRL0_SCL_HIGH << MXC_F_I2C_CTRL0_SCL_POS)

CTRL0_SCL_HIGH Setting

MXC_S_I2C_CTRL0_SCL_LOW

#define MXC_S_I2C_CTRL0_SCL_LOW   (MXC_V_I2C_CTRL0_SCL_LOW << MXC_F_I2C_CTRL0_SCL_POS)

CTRL0_SCL_LOW Setting

MXC_S_I2C_CTRL0_SCL_OUT_HIGH

#define MXC_S_I2C_CTRL0_SCL_OUT_HIGH   (MXC_V_I2C_CTRL0_SCL_OUT_HIGH << MXC_F_I2C_CTRL0_SCL_OUT_POS)

CTRL0_SCL_OUT_HIGH Setting

MXC_S_I2C_CTRL0_SCL_OUT_LOW

#define MXC_S_I2C_CTRL0_SCL_OUT_LOW   (MXC_V_I2C_CTRL0_SCL_OUT_LOW << MXC_F_I2C_CTRL0_SCL_OUT_POS)

CTRL0_SCL_OUT_LOW Setting

MXC_S_I2C_CTRL0_SCL_PPM_DIS

#define MXC_S_I2C_CTRL0_SCL_PPM_DIS   (MXC_V_I2C_CTRL0_SCL_PPM_DIS << MXC_F_I2C_CTRL0_SCL_PPM_POS)

CTRL0_SCL_PPM_DIS Setting

MXC_S_I2C_CTRL0_SCL_PPM_EN

#define MXC_S_I2C_CTRL0_SCL_PPM_EN   (MXC_V_I2C_CTRL0_SCL_PPM_EN << MXC_F_I2C_CTRL0_SCL_PPM_POS)

CTRL0_SCL_PPM_EN Setting

MXC_S_I2C_CTRL0_SCL_STRD_DIS

#define MXC_S_I2C_CTRL0_SCL_STRD_DIS   (MXC_V_I2C_CTRL0_SCL_STRD_DIS << MXC_F_I2C_CTRL0_SCL_STRD_POS)

CTRL0_SCL_STRD_DIS Setting

MXC_S_I2C_CTRL0_SCL_STRD_EN

#define MXC_S_I2C_CTRL0_SCL_STRD_EN   (MXC_V_I2C_CTRL0_SCL_STRD_EN << MXC_F_I2C_CTRL0_SCL_STRD_POS)

CTRL0_SCL_STRD_EN Setting

MXC_S_I2C_CTRL0_SDA_HIGH

#define MXC_S_I2C_CTRL0_SDA_HIGH   (MXC_V_I2C_CTRL0_SDA_HIGH << MXC_F_I2C_CTRL0_SDA_POS)

CTRL0_SDA_HIGH Setting

MXC_S_I2C_CTRL0_SDA_LOW

#define MXC_S_I2C_CTRL0_SDA_LOW   (MXC_V_I2C_CTRL0_SDA_LOW << MXC_F_I2C_CTRL0_SDA_POS)

CTRL0_SDA_LOW Setting

MXC_S_I2C_CTRL0_SDA_OUT_HIGH

#define MXC_S_I2C_CTRL0_SDA_OUT_HIGH   (MXC_V_I2C_CTRL0_SDA_OUT_HIGH << MXC_F_I2C_CTRL0_SDA_OUT_POS)

CTRL0_SDA_OUT_HIGH Setting

MXC_S_I2C_CTRL0_SDA_OUT_LOW

#define MXC_S_I2C_CTRL0_SDA_OUT_LOW   (MXC_V_I2C_CTRL0_SDA_OUT_LOW << MXC_F_I2C_CTRL0_SDA_OUT_POS)

CTRL0_SDA_OUT_LOW Setting

MXC_S_I2C_CTRL0_SWOE_DIS

#define MXC_S_I2C_CTRL0_SWOE_DIS   (MXC_V_I2C_CTRL0_SWOE_DIS << MXC_F_I2C_CTRL0_SWOE_POS)

CTRL0_SWOE_DIS Setting

MXC_S_I2C_CTRL0_SWOE_EN

#define MXC_S_I2C_CTRL0_SWOE_EN   (MXC_V_I2C_CTRL0_SWOE_EN << MXC_F_I2C_CTRL0_SWOE_POS)

CTRL0_SWOE_EN Setting

MXC_V_I2C_CTRL0_ACK_ACK

#define MXC_V_I2C_CTRL0_ACK_ACK   ((uint32_t)0x0UL)

CTRL0_ACK_ACK Value

MXC_V_I2C_CTRL0_ACK_NACK

#define MXC_V_I2C_CTRL0_ACK_NACK   ((uint32_t)0x1UL)

CTRL0_ACK_NACK Value

MXC_V_I2C_CTRL0_GCEN_DIS

#define MXC_V_I2C_CTRL0_GCEN_DIS   ((uint32_t)0x0UL)

CTRL0_GCEN_DIS Value

MXC_V_I2C_CTRL0_GCEN_EN

#define MXC_V_I2C_CTRL0_GCEN_EN   ((uint32_t)0x1UL)

CTRL0_GCEN_EN Value

MXC_V_I2C_CTRL0_I2CEN_DIS

#define MXC_V_I2C_CTRL0_I2CEN_DIS   ((uint32_t)0x0UL)

CTRL0_I2CEN_DIS Value

MXC_V_I2C_CTRL0_I2CEN_EN

#define MXC_V_I2C_CTRL0_I2CEN_EN   ((uint32_t)0x1UL)

CTRL0_I2CEN_EN Value

MXC_V_I2C_CTRL0_IRXM_DIS

#define MXC_V_I2C_CTRL0_IRXM_DIS   ((uint32_t)0x0UL)

CTRL0_IRXM_DIS Value

MXC_V_I2C_CTRL0_IRXM_EN

#define MXC_V_I2C_CTRL0_IRXM_EN   ((uint32_t)0x1UL)

CTRL0_IRXM_EN Value

MXC_V_I2C_CTRL0_MST_MASTER_MODE

#define MXC_V_I2C_CTRL0_MST_MASTER_MODE   ((uint32_t)0x1UL)

CTRL0_MST_MASTER_MODE Value

MXC_V_I2C_CTRL0_MST_SLAVE_MODE

#define MXC_V_I2C_CTRL0_MST_SLAVE_MODE   ((uint32_t)0x0UL)

CTRL0_MST_SLAVE_MODE Value

MXC_V_I2C_CTRL0_READ_READ

#define MXC_V_I2C_CTRL0_READ_READ   ((uint32_t)0x1UL)

CTRL0_READ_READ Value

MXC_V_I2C_CTRL0_READ_WRITE

#define MXC_V_I2C_CTRL0_READ_WRITE   ((uint32_t)0x0UL)

CTRL0_READ_WRITE Value

MXC_V_I2C_CTRL0_SCL_HIGH

#define MXC_V_I2C_CTRL0_SCL_HIGH   ((uint32_t)0x1UL)

CTRL0_SCL_HIGH Value

MXC_V_I2C_CTRL0_SCL_LOW

#define MXC_V_I2C_CTRL0_SCL_LOW   ((uint32_t)0x0UL)

CTRL0_SCL_LOW Value

MXC_V_I2C_CTRL0_SCL_OUT_HIGH

#define MXC_V_I2C_CTRL0_SCL_OUT_HIGH   ((uint32_t)0x1UL)

CTRL0_SCL_OUT_HIGH Value

MXC_V_I2C_CTRL0_SCL_OUT_LOW

#define MXC_V_I2C_CTRL0_SCL_OUT_LOW   ((uint32_t)0x0UL)

CTRL0_SCL_OUT_LOW Value

MXC_V_I2C_CTRL0_SCL_PPM_DIS

#define MXC_V_I2C_CTRL0_SCL_PPM_DIS   ((uint32_t)0x0UL)

CTRL0_SCL_PPM_DIS Value

MXC_V_I2C_CTRL0_SCL_PPM_EN

#define MXC_V_I2C_CTRL0_SCL_PPM_EN   ((uint32_t)0x1UL)

CTRL0_SCL_PPM_EN Value

MXC_V_I2C_CTRL0_SCL_STRD_DIS

#define MXC_V_I2C_CTRL0_SCL_STRD_DIS   ((uint32_t)0x1UL)

CTRL0_SCL_STRD_DIS Value

MXC_V_I2C_CTRL0_SCL_STRD_EN

#define MXC_V_I2C_CTRL0_SCL_STRD_EN   ((uint32_t)0x0UL)

CTRL0_SCL_STRD_EN Value

MXC_V_I2C_CTRL0_SDA_HIGH

#define MXC_V_I2C_CTRL0_SDA_HIGH   ((uint32_t)0x1UL)

CTRL0_SDA_HIGH Value

MXC_V_I2C_CTRL0_SDA_LOW

#define MXC_V_I2C_CTRL0_SDA_LOW   ((uint32_t)0x0UL)

CTRL0_SDA_LOW Value

MXC_V_I2C_CTRL0_SDA_OUT_HIGH

#define MXC_V_I2C_CTRL0_SDA_OUT_HIGH   ((uint32_t)0x1UL)

CTRL0_SDA_OUT_HIGH Value

MXC_V_I2C_CTRL0_SDA_OUT_LOW

#define MXC_V_I2C_CTRL0_SDA_OUT_LOW   ((uint32_t)0x0UL)

CTRL0_SDA_OUT_LOW Value

MXC_V_I2C_CTRL0_SWOE_DIS

#define MXC_V_I2C_CTRL0_SWOE_DIS   ((uint32_t)0x0UL)

CTRL0_SWOE_DIS Value

MXC_V_I2C_CTRL0_SWOE_EN

#define MXC_V_I2C_CTRL0_SWOE_EN   ((uint32_t)0x1UL)

CTRL0_SWOE_EN Value