I2C_TX_CTRL0

Macros
#define	MXC_F_I2C_TX_CTRL0_TXPRELD_POS   0
#define	MXC_F_I2C_TX_CTRL0_TXPRELD   ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TXPRELD_POS))
#define	MXC_V_I2C_TX_CTRL0_TXPRELD_NORMAL   ((uint32_t)0x0UL)
#define	MXC_S_I2C_TX_CTRL0_TXPRELD_NORMAL   (MXC_V_I2C_TX_CTRL0_TXPRELD_NORMAL << MXC_F_I2C_TX_CTRL0_TXPRELD_POS)
#define	MXC_V_I2C_TX_CTRL0_TXPRELD_PRELOAD   ((uint32_t)0x1UL)
#define	MXC_S_I2C_TX_CTRL0_TXPRELD_PRELOAD   (MXC_V_I2C_TX_CTRL0_TXPRELD_PRELOAD << MXC_F_I2C_TX_CTRL0_TXPRELD_POS)
#define	MXC_F_I2C_TX_CTRL0_TXFSH_POS   7
#define	MXC_F_I2C_TX_CTRL0_TXFSH   ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TXFSH_POS))
#define	MXC_V_I2C_TX_CTRL0_TXFSH_NOT_FLUSHED   ((uint32_t)0x0UL)
#define	MXC_S_I2C_TX_CTRL0_TXFSH_NOT_FLUSHED   (MXC_V_I2C_TX_CTRL0_TXFSH_NOT_FLUSHED << MXC_F_I2C_TX_CTRL0_TXFSH_POS)
#define	MXC_V_I2C_TX_CTRL0_TXFSH_FLUSH   ((uint32_t)0x1UL)
#define	MXC_S_I2C_TX_CTRL0_TXFSH_FLUSH   (MXC_V_I2C_TX_CTRL0_TXFSH_FLUSH << MXC_F_I2C_TX_CTRL0_TXFSH_POS)
#define	MXC_F_I2C_TX_CTRL0_TXTH_POS   8
#define	MXC_F_I2C_TX_CTRL0_TXTH   ((uint32_t)(0xFUL << MXC_F_I2C_TX_CTRL0_TXTH_POS))

Detailed Description

Transmit Control Register 0.

Macro Definition Documentation

MXC_F_I2C_TX_CTRL0_TXFSH

#define MXC_F_I2C_TX_CTRL0_TXFSH   ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TXFSH_POS))

TX_CTRL0_TXFSH Mask

MXC_F_I2C_TX_CTRL0_TXFSH_POS

#define MXC_F_I2C_TX_CTRL0_TXFSH_POS   7

TX_CTRL0_TXFSH Position

MXC_F_I2C_TX_CTRL0_TXPRELD

#define MXC_F_I2C_TX_CTRL0_TXPRELD   ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TXPRELD_POS))

TX_CTRL0_TXPRELD Mask

MXC_F_I2C_TX_CTRL0_TXPRELD_POS

#define MXC_F_I2C_TX_CTRL0_TXPRELD_POS   0

TX_CTRL0_TXPRELD Position

MXC_F_I2C_TX_CTRL0_TXTH

#define MXC_F_I2C_TX_CTRL0_TXTH   ((uint32_t)(0xFUL << MXC_F_I2C_TX_CTRL0_TXTH_POS))

TX_CTRL0_TXTH Mask

MXC_F_I2C_TX_CTRL0_TXTH_POS

#define MXC_F_I2C_TX_CTRL0_TXTH_POS   8

TX_CTRL0_TXTH Position

MXC_S_I2C_TX_CTRL0_TXFSH_FLUSH

#define MXC_S_I2C_TX_CTRL0_TXFSH_FLUSH   (MXC_V_I2C_TX_CTRL0_TXFSH_FLUSH << MXC_F_I2C_TX_CTRL0_TXFSH_POS)

TX_CTRL0_TXFSH_FLUSH Setting

MXC_S_I2C_TX_CTRL0_TXFSH_NOT_FLUSHED

#define MXC_S_I2C_TX_CTRL0_TXFSH_NOT_FLUSHED   (MXC_V_I2C_TX_CTRL0_TXFSH_NOT_FLUSHED << MXC_F_I2C_TX_CTRL0_TXFSH_POS)

TX_CTRL0_TXFSH_NOT_FLUSHED Setting

MXC_S_I2C_TX_CTRL0_TXPRELD_NORMAL

#define MXC_S_I2C_TX_CTRL0_TXPRELD_NORMAL   (MXC_V_I2C_TX_CTRL0_TXPRELD_NORMAL << MXC_F_I2C_TX_CTRL0_TXPRELD_POS)

TX_CTRL0_TXPRELD_NORMAL Setting

MXC_S_I2C_TX_CTRL0_TXPRELD_PRELOAD

#define MXC_S_I2C_TX_CTRL0_TXPRELD_PRELOAD   (MXC_V_I2C_TX_CTRL0_TXPRELD_PRELOAD << MXC_F_I2C_TX_CTRL0_TXPRELD_POS)

TX_CTRL0_TXPRELD_PRELOAD Setting

MXC_V_I2C_TX_CTRL0_TXFSH_FLUSH

#define MXC_V_I2C_TX_CTRL0_TXFSH_FLUSH   ((uint32_t)0x1UL)

TX_CTRL0_TXFSH_FLUSH Value

MXC_V_I2C_TX_CTRL0_TXFSH_NOT_FLUSHED

#define MXC_V_I2C_TX_CTRL0_TXFSH_NOT_FLUSHED   ((uint32_t)0x0UL)

TX_CTRL0_TXFSH_NOT_FLUSHED Value

MXC_V_I2C_TX_CTRL0_TXPRELD_NORMAL

#define MXC_V_I2C_TX_CTRL0_TXPRELD_NORMAL   ((uint32_t)0x0UL)

TX_CTRL0_TXPRELD_NORMAL Value

MXC_V_I2C_TX_CTRL0_TXPRELD_PRELOAD

#define MXC_V_I2C_TX_CTRL0_TXPRELD_PRELOAD   ((uint32_t)0x1UL)

TX_CTRL0_TXPRELD_PRELOAD Value